Academic literature on the topic 'Transistor'

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Journal articles on the topic "Transistor"

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Knyaginin, D. A., E. A. Kulchenkov, S. B. Rybalka, and A. A. Demidov. "Study of characteristics of n-p-n type bipolar power transistor in small-sized metalpolymeric package type SOT-89." Journal of Physics: Conference Series 2086, no. 1 (2021): 012057. http://dx.doi.org/10.1088/1742-6596/2086/1/012057.

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Abstract In this study the input, output and current gain characteristics of silicon n-p-n type medium power bipolar junction transistors KT242A91 made by the "GRUPPA KREMNY EL" in modern small-sized metalpolymeric package type (SOT-89) have been obtained. The SPICE model that allows simulating realistic transistor behaviour of n-p-n type transistor KT242A91 has been proposed. It is shown that established experimental characteristics for KT242A91 transistor correspond to similar transistor’s type characteristics.
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Horng. "Thin Film Transistor." Crystals 9, no. 8 (2019): 415. http://dx.doi.org/10.3390/cryst9080415.

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The special issue is "Thin Film Transistor". There are eight contributed papers. They focus on organic thin film transistors, fluorinated oligothiophenes transistors, surface treated or hydrogen effect on oxide-semiconductor-based thin film transistors, and their corresponding application in flat panel displays and optical detecting. The present special issue on “Thin Film Transistor” can be considered as a status report reviewing the progress that has been made recently on thin film transistor technology. These papers can provide the readers with more research information and corresponding ap
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BLALOCK, BENJAMIN J., SORIN CRISTOLOVEANU, BRIAN M. DUFRENE, F. ALLIBERT, and MOHAMMAD M. MOJARRADI. "THE MULTIPLE-GATE MOS-JFET TRANSISTOR." International Journal of High Speed Electronics and Systems 12, no. 02 (2002): 511–20. http://dx.doi.org/10.1142/s0129156402001423.

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A new SOI device, the MOS-JFET, has been developed that combines two different transistors, JFET and MOSFET, superimposed in a single silicon island so that they share the same body. A unique attribute of the MOS-JFET is that it can be viewed as a four gate transistor (two side junction-based gates, the top MOS gate, and the back gate activated by SOI substrate biasing). Each of these four gates can control the conduction characteristics of the transistor. This novel transistor's multiple gate inputs give rise to exciting circuit opportunities for analog, RF, mixed-signal, and digital applicat
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Maftunzada, S. A. L. "The Structure and Working Principle of a Bipolar Junction Transistor (BJT)." Physical Science International Journal 26, no. 11-12 (2022): 35–39. http://dx.doi.org/10.9734/psij/2022/v26i11-12772.

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We studied bipolar junction transistors. We will see that the bipolar junction transistor, often referred to by its short name, transistor, actually functions as a current-controlled current source. We will also see that in the current generation of bipolar junction transistors, both majority and minority carriers are involved. For this reason, they gave this name to this type of transistor. In order to get enough information about this part, in the first two parts we will examine the construction and working method of the transistor. After that, we dedicate sections to how the transistor is p
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Arunabala, Dr C. "Design of a 4 bit Arithmetic and Logical unit with Low Power and High Speed." International Journal of Innovative Technology and Exploring Engineering 10, no. 5 (2021): 87–92. http://dx.doi.org/10.35940/ijitee.e8660.0310521.

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In this presented work we designed the 4- bit Arithmetic & Logical Unit (ALU) by using the different modules. The Various modules are AND gate & OR gate designed with six transistors, While the XOR modules is designed with both eight transistors & six transistors. The six transistor XOR module gives optimized results. Another one is the four by one multiplexer designed with eight transistors implemented using Pass transistor logic (PTL) style. The full adder module is designed by using 18 transistors implemented through PTL style. Here because of PTL style the number of transistor
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Dr.C.Arunabala*, Ch.Jyothirmayi, N. S. V. Sreeja.T D, Burra Hrithika Suma, Udumula Reddy, and I.R.AnushaDevi. "Design of a 4 bit Arithmetic and Logical unit with Low Power and High Speed." International Journal of Innovative Technology and Exploring Engineering (IJITEE) 10, no. 5 (2021): 87–92. https://doi.org/10.35940/ijitee.E8660.0310521.

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In this presented work we designed the 4- bit Arithmetic & Logical Unit (ALU) by using the different modules. The Various modules are AND gate & OR gate designed with six transistors, While the XOR modules is designed with both eight transistors & six transistors. The six transistor XOR module gives optimized results. Another one is the four by one multiplexer designed with eight transistors implemented using Pass transistor logic (PTL) style. The full adder module is designed by using 18 transistors implemented through PTL style. Here because of PTL style the number of transistor
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Vukic, Vladimir, and Predrag Osmokrovic. "Power lateral pnp transistor operating with high current density in irradiated voltage regulator." Nuclear Technology and Radiation Protection 28, no. 2 (2013): 146–57. http://dx.doi.org/10.2298/ntrp1302146v.

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The operation of power lateral pnp transistors in gamma radiation field was examined by detection of the minimum dropout voltage on heavily loaded low-dropout voltage regulators LM2940CT5, clearly demonstrating their low radiation hardness, with unacceptably low values of output voltage and collector-emitter voltage volatility. In conjunction with previous results on base current and forward emitter current gain of serial transistors, it was possible to determine the positive influence of high load current on a slight improvement of voltage regulator LM2940CT5 radiation hardness. The high-curr
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Wang, Qingyu. "Application of the quantum effects of single-electron transistors in low-power." Applied and Computational Engineering 130, no. 1 (2025): 102–7. https://doi.org/10.54254/2755-2721/2025.20293.

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As the feature size of transistors approaches the 2nm limit, quantum effects become more pronounced as a result of devices that cannot work properly. Conventional MOSFET architectures are difficult to solve the problems. Therefore, new transistor architectures need to be developed. As a new transistor architecture, the single-electron transistor (SET) working based on quantum effects and has a very low power consumption. This paper analyzed working principle of single-electron transistor (SET) and compared the advantages of its extremely low power consumption in quantum computing with MOSFET.
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Gardashbekova, Nailya Adem, and Sadi Gachay Zeynalov. "METAL-DIELECTRIC-SEMICONDUCTOR TRANSISTORS IN INTEGRAL CIRCUITS." Deutsche internationale Zeitschrift für zeitgenössische Wissenschaft 98 (February 22, 2025): 67–69. https://doi.org/10.5281/zenodo.14911007.

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Induced n-type channel MDY-transistors are widely used in the development of microcircuits. Induced nand p-type channel transistors are mainly used in complementary MDY-microcircuits. Of the n- and p-type channel transistors with the same structure, the n-type channel transistor has a higher frequency and larger curvature characteristic than the p-type channel transistor, making it superior to the p-type channel transistor. This advantage is explained by the fact that the mobility of electrons in the crystal is greater than that of holes. MDY-transistors differ from bipolar transistors in
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Balti, M., D. Pasquet, and A. Samet. "PROPAGATION EFFECTS ON Z PARAMETERS IN AN FET EQUIVALENT CIRCUIT." SYNCHROINFO JOURNAL 7, no. 5 (2021): 21–25. http://dx.doi.org/10.36724/2664-066x-2021-7-5-21-25.

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The design of microwave circuits needs a good analysis of the performances of the field-effect transistor equivalent circuit. Indeed the small signal equivalent circuit of the field-effect transistors makes it possible to easily determine their performances such as the gain and the noise figure. A field-effect transistor constitutes a propagation structure along its gate width. Telegraphists’ equations are solved for this structure. One deduces from this the effect of the propagation on the transistor Z-parameters which can be taken into account in electric simulations and which may improve th
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Dissertations / Theses on the topic "Transistor"

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Pratapgarhwala, Mustansir M. "Characterization of Transistor Matching in Silicon-Germanium Heterojunction Bipolar Transistors." Thesis, Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7536.

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Transistor mismatch is a crucial design issue in high precision analog circuits, and is investigated here for the first time in SiGe HBTs. The goal of this work is to study the effects of mismatch under extreme conditions including radiation, high temperature, and low temperature. One portion of this work reports collector current mismatch data as a function of emitter geometry both before and after 63 MeV proton exposure for first-generation SiGe HBTs with a peak cut-off frequency of 60 GHz. However, minimal changes in device-to-device mismatch after radiation exposure were experienced. An
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Cerutti, Robin. "Transistors à grilles multiples adaptés à la conception." Grenoble INPG, 2006. http://www.theses.fr/2006INPG0174.

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"En technologie MOS sur silicium, les transistors de type "double grille" (DG) sont considérés comme les meilleurs candidats pour les nœuds technologiques 32 et 22 nm de ITRS. Avec l'apparition de différentes architectures (FINFET, TriGate, Planar DG,. . . ) il est important de concevoir une intégration simple et compatible avec les requêtes circuit. Ce travail de thèse prend en compte les intéractions entre la conception et la technologie afin de définir des technologies tridimensionelles basées sur le module SON ("Silicon On Nothing"). De nouveaux transistors ont été inventés et développés e
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Hanna, Jennifer. "Movement transistor." This title; PDF viewer required. Home page for entire collection, 2006. http://archives.udmercy.edu:8080/dspace/handle/10429/9.

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Razafindrakoto, Mirijason Richard. "Modèle hydrodynamique de transistor MOSFET et méthodes numériques, pour l'émission et la détection d'onde électromagnétique THz." Thesis, Montpellier, 2017. http://www.theses.fr/2017MONTS035/document.

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Du fait de ses propriétés intéressantes, le domaine de fréquence térahertz (THz) du spectre électromagnétique peut avoir de nombreuses applications technologiques, de l'imagerie à la spectroscopie en passant par les télécommunications. Toutefois, les contraintes technologiques empêchant l'émission et la détection efficaces de ces ondes par des systèmes conventionnels ont valu à cette partie du spectre électromagnétique le nom de gap THz. Au cours des deux dernières décennies, plusieurs solutions novatrices sont apparues. Parmi elles, l'utilisation de transistors à effet de champ s'est imposée
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Huang, Yong. "InAlGaAs/InP light emitting transistors and transistor lasers operating near 1.55 μm". Diss., Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/37298.

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Light emitting transistors (LETs) and transistor lasers (TLs) are newly-emerging optoelectronic devices capable of emitting spontaneous or stimulated light while performing transistor actions. This dissertation describes the design, growth, and performances of long wavelength LETs and TLs based on InAlGaAs/InP material system. First, the doping behaviors of zinc (Zn) and carbon (C) in InAlGaAs layers for p-type doping were investigated. Using both dopants, the N-InP/p-In0.52(AlxGa1-x)0.48As/N-In0.52Al0.48As LETs with InGaAs quantum wells (QWs) in the base demonstrate both light emission and
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Zhang, Dawei. "Insulator channel transistor /." May be available electronically:, 2008. http://proquest.umi.com/login?COPT=REJTPTU1MTUmSU5UPTAmVkVSPTI=&clientId=12498.

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Li, Jian Ming. "Evaluation des possibilités fréquentielles des transistors bipolaires de puissance haute tension." Grenoble INPG, 1989. http://www.theses.fr/1989INPG0049.

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Cette étude vise les possibilités d'utilisation des T. B. P. H. T. Dans les convertisseurs à résonance à des fréquences de quelques centaines de kHz et des puissances de quelques dizaines de kw. Pour atteindre cet objectif, une modélisation analytique uni-dimensionnelle du semi-conducteur est proposée: elle permet d'obtenir les caractéristiques de la commande de base aux fréquences correspondantes et d'analyser les performances fréquentielles des circuits de base aux fréquences correspondantes et d'analyser les performances fréquentielles des circuits de base classiques. Les synthèses de comma
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Deshpande, Veeresh. "Intégration de transistor mono-électronique et transistor à atome unique sur CMOS." Phd thesis, Université de Grenoble, 2012. http://tel.archives-ouvertes.fr/tel-00844406.

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La réduction (" scaling ") continue des dimensions des transistors MOSFET nous a conduits à l'ère de la nanoélectronique. Le transistor à effet de champ multi-grilles (MultiGate FET, MuGFET) avec l'architecture "nanofil canal" est considéré comme un candidat possible pour le scaling des MOSFET jusqu'à la fin de la roadmap. Parallèlement au scaling des CMOS classiques ou scaling suivant la loi de Moore, de nombreuses propositions de nouveaux dispositifs, exploitant des phénomènes nanométriques, ont été faites. Ainsi, le transistor monoélectronique (SET), utilisant le phénomène de "blocage de Co
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Lamontagne, Maurice. "Development of a statistical model for NPN bipolar transistor mismatch." Link to electronic thesis, 2007. http://www.wpi.edu/Pubs/ETD/Available/etd-053007-105648/.

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Cho, Hanho. "Optically Powered Logic Transistor." Diss., CLICK HERE for online access, 2008. http://contentdm.lib.byu.edu/ETD/image/etd2525.pdf.

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Books on the topic "Transistor"

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Welter, Michael. Transistor dictionary: Bipolar transistors. International Thomson, 1996.

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(Firm), Knovel, ed. Understanding modern transistors and diodes. Cambridge University Press, 2010.

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Fickers, Andreas. Der "Transistor" als technisches und kulturelles Phänomen: Die Transistorisierung der Radio- und Fernsehempfänger in der deutschen Rundfunkindustrie 1955 bis 1965. Verlag für Geschichte der Naturwissenschaften und der Technik, 1998.

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Ritchie, G. J. Transistor Circuit Techniques. Springer US, 1993. http://dx.doi.org/10.1007/978-1-4899-6890-6.

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Saro-Wiwa, Ken. The transistor radio. Saros International Publishers, 1989.

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Wilkins, Jon. Transistor rodeo: Poems. University of Utah Press, 2010.

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Samsung. Transistor data book. Samsung Electronics, 1989.

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Tunbridge, F. C. Practical transistor 1986. Technical Information Services, 1986.

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Grebennikov, Andrei. RF and microwave transistor oscillator design. John Wiley & Sons, Ltd, 2007.

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Shvart͡s, N. Z. Usiliteli SVCh na polevykh tranzistorakh. Radio i sviazʹ, 1987.

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Book chapters on the topic "Transistor"

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Weik, Martin H. "transistor-transistor logic." In Computer Science and Communications Dictionary. Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_19941.

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Weik, Martin H. "transistor." In Computer Science and Communications Dictionary. Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_19938.

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O’Regan, Gerard. "Transistor." In The Innovation in Computing Companion. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-030-02619-6_52.

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Meitinger, Thomas Heinz. "Transistor." In Elektronik. Hightech in Patenten. Springer Berlin Heidelberg, 2024. http://dx.doi.org/10.1007/978-3-662-69755-9_4.

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Julien, Levisse Alexandre Sébastien, Xifan Tang, and Pierre-Emmanuel Gaillardon. "Innovative Memory Architectures Using Functionality Enhanced Devices." In Emerging Computing: From Devices to Systems. Springer Nature Singapore, 2022. http://dx.doi.org/10.1007/978-981-16-7487-7_3.

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AbstractSince the introduction of the transistor, the semiconductor industry has always been able to propose an increasingly higher level of circuit performance while keeping cost constant by scaling the transistor’s area. This scaling process (named Moore’s law) has been followed since the 80s. However, it has been facing new constraints and challenges since 2012. Standard sub-30nm bulk CMOS technologies cannot provide sufficient performance while remaining industrially profitable. Thereby, various solutions, such as FinFETs (Auth et al. 2012) or Fully Depleted Silicon On Insulator (FDSOI) (F
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Cook, David. "Transistor Switches." In Robot Building for Beginners. Apress, 2015. http://dx.doi.org/10.1007/978-1-4842-1359-9_16.

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Floberg, Henrik. "Transistor Models." In Symbolic Analysis in Analog Integrated Circuit Design. Springer US, 1997. http://dx.doi.org/10.1007/978-1-4615-6211-5_7.

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Sobot, Robert. "Transistor Biasing." In Wireless Communication Electronics. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-48630-3_5.

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Giebel, Thomas. "MOS-Transistor." In Grundlagen der CMOS-Technologie. Vieweg+Teubner Verlag, 2002. http://dx.doi.org/10.1007/978-3-663-07914-9_4.

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Hsu, John Y. "Transistor Circuits." In Computer Logic. Springer New York, 2002. http://dx.doi.org/10.1007/978-1-4613-0047-2_3.

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Conference papers on the topic "Transistor"

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Moiseev, Grigor. "MODELLING OF STRUCTURE BASED ON JUNCTIONLESS TRANSISTOR IN TCAD SYSTEM." In International Forum “Microelectronics – 2020”. Joung Scientists Scholarship “Microelectronics – 2020”. XIII International conference «Silicon – 2020». XII young scientists scholarship for silicon nanostructures and devices physics, material science, process and analysis. LLC MAKS Press, 2020. http://dx.doi.org/10.29003/m1662.silicon-2020/397-399.

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The purpose of this work is to synthesize a transistor with a lower leakage current. The paper describes a new type of transistors that do not contain p-n junctions - junctionless transistors. The physical principles of operation of such devices are briefly stated. On the basis of the junctionless transistor, a structure is proposed that has a lower leakage current as compared to the junctionless transistors. Numerical modeling of the proposed structure in the TCAD system is carried out. The current-voltage characteristic (CVC) of the proposed structure is calculated. It is clearly shown that
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(Jane) Li, Yuanjing, John Aguada, Jiafang Lu, Jessica Yang, Roy Ng, and Howard Lee Marks. "Capturing Defects in Flip-Chip CMOS Devices Using Backside EBAC Technique and SEM Microscopy." In ISTFA 2016. ASM International, 2016. http://dx.doi.org/10.31399/asm.cp.istfa2016p0118.

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Abstract This paper presents backside physical failure analysis methods for capturing anomalies and defects in advanced flip-chip packaged, bulk silicon CMOS devices. Sample preparation involves chemically removing all the silicon, including the diffusions, to expose the source/drain contact silicide and the gate of the transistors from the backside. Scanning Electron Microscopy (SEM) is used to form high resolution secondary and/or backscattered electron images of the transistor structures on and beneath the exposed surface. If no visual defects/anomalies are found at the transistor level, th
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Belić, Milivoj R., Milan Petrović, Jörg Leonardy, and Friedemann Kaiser. "Optical Transistor Based on a Photorefractive Ring Cavity." In The European Conference on Lasers and Electro-Optics. Optica Publishing Group, 1996. http://dx.doi.org/10.1364/cleo_europe.1996.ctue6.

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The invention of electronic transistors revolutionized the field of electronics. There have been many attempts to achieve transistor action in different optical circuits [1]. Photorefractive materials possess features (strong response at low power levels and parallel processing) which are convenient for realization of optical circuits that, are functionally similar to different, electronic devices [2]. We use these advantages to propose an optical transistor based on a bidirectional PR ring resonator, whose operation is functionally similar to the operation of a bipolar junction transistor.
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Kim, Jong Eun, Jong Hak Lee, Jong Kyu Cho, et al. "Analysis of SRAM Function Failure Due to Unformed CoSi2 Using Nanoprober and Transmission Electron Microscopy." In ISTFA 2016. ASM International, 2016. http://dx.doi.org/10.31399/asm.cp.istfa2016p0137.

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Abstract In this article, an analysis of a failure in the embedded SRAM in a CMOS Image Sensor is investigated. The failure was due to unformed CoSi2. Because unformed CoSi2 causes a varying degree of response, a nano-prober was used to find the abnormally operating transistors among a 1-bit SRAM cell consisting of six transistors(6T). After measuring and analyzing the current-voltage relationships between each transistor, the current magnitude of one pull-down transistor was found to be less than the expected range and particularly lower than that of a connected access transistor. To visualiz
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Neychev, V. F., and A. A. Gavrikov. "FEATURES OF MEASURING THERMAL IMPEDANCE OF POWER TRANSISTOR MODULES." In Actual problems of physical and functional electronics. Ulyanovsk State Technical University, 2024. http://dx.doi.org/10.61527/appfe-2024.19-20.

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The results of experimental studies of the thermal-electric properties of power transistor modules are presented, aimed at improving the methods and means for measuring cross-thermal impedances between module transistors.
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Sergeev, V. A., I. V. Frolov та A. A. Kazankov. "ЕFFECT OF METALLIZATION RESISTANCE ON THE UNIFORMITY AND STABILITY OF THE CURRENT DISTRIBUTION IN THE COMB STRUCTURES OF BIPOLAR AND HETEROBIPOLAR MICROWAVE TRANSISTORS". У Actual problems of physical and functional electronics. Ulyanovsk State Technical University, 2023. http://dx.doi.org/10.61527/appfe-2023.26-28.

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An expression is obtained for the current flowing into an elementary transistor of the comb structure of a bipolar microwave transistor, depending on the resistance of the emitter path of metallization. The influence of the technological spread of the track resistances on the uneven distribution of the total current of the transistor between elementary transistors is estimated, which, in turn, leads to a decrease in the thermal stability of the current distribution.
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Desplats, Romain, Alban Eral, Felix Beaudoin, et al. "IC Diagnostic with Time Resolved Photon Emission and CAD Auto-Channeling." In ISTFA 2003. ASM International, 2003. http://dx.doi.org/10.31399/asm.cp.istfa2003p0045.

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Abstract The use of time resolved photon emission (TRPE) to compare internal measurements with simulations can dramatically reduce the time required for IC analysis. During debug, this technique makes it possible to probe only transistors of interest. Two limitations must be overcome: precise location of transistor photon emission areas and distinction between photons emitted by closely spaced transistors. Otherwise results may be seriously biased. Introducing CAD auto-channeling for TRPE makes it possible to generate virtual layers where emissions are expected. As a result, transistor TRPE ar
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Campbell, Ann N., Paiboon Tangyunyong, Jeffrey R. Jessing, et al. "Focused Ion Beam Induced Effects on MOS Transistor Parameters." In ISTFA 1999. ASM International, 1999. http://dx.doi.org/10.31399/asm.cp.istfa1999p0273.

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Abstract We report on recent studies of the effects of 50 keV focused ion beam (FIB) exposure on MOS transistors. We demonstrate that the changes in transistor parameters (such as threshold voltage, Vt) are essentially the same for exposure to a Ga+ ion beam at 30 and 50 keV under the same exposure conditions. We characterize the effects of FIB exposure on test transistors fabricated in both 0.5 μm and 0.225 μm technologies from two different vendors. We report on the effectiveness of overlying metal layers in screening MOS transistors from FIB-induced damage and examine the importance of ion
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Oarethu, Johns, Zhigang Song, Pat McGinnis, et al. "Investigation of Thermal Laser Stimulation (TLS) Effects on 7nm FinFET Transistor Parameters." In ISTFA 2022. ASM International, 2022. http://dx.doi.org/10.31399/asm.cp.istfa2022p0129.

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Abstract Thermal Laser Stimulation (TLS) is employed extensively in semiconductor device fault isolation techniques such as TIVA (Thermal Induced Voltage Alteration), OBIRCH (Optical Beam Induced Resistance Change), SDL (Soft Defect localization), CPA (Critical Parameter Analysis), LADA (Laser Assisted Device Alteration), and LVI (Laser Voltage Imaging), etc. To investigate the TLS effects on 7nm FinFET transistor parameters, several transistors of 7nm FinFET inline ET (Electrical Test) macros were tested while employing TLS of various energy values. The test was done in linear mode so that th
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Strogonov, A. V., V. V. Maltsev, and R. P. Alekseev. "SIMULATION OF Si-SiO2 INTERFACE DEPASSIVATION IN LDMOS TRANSISTORS." In Actual problems of physical and functional electronics. Ulyanovsk State Technical University, 2024. http://dx.doi.org/10.61527/appfe-2024.231-233.

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Reliability of microwave LDMOS transistors is one of the key tasks in their design. Modeling of transistor structures using specialized CAD tools allows predicting the service life of devices under various test conditions, which helps to reduce the number of defective products. One of the main factors in the degradation of the electrophysical characteristics of transistors is the rupture of hydrogen bonds at the interfaces, which leads to an increase in interband traps. Modeling of broken bonds was carried out on a test structure of an LDMOS transistor developed using the technology of JSC NII
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Reports on the topic "Transistor"

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Pincus, Jonathan. Transistor Sizing. Defense Technical Information Center, 1986. http://dx.doi.org/10.21236/ada611783.

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Malliaras, George G., and Graciela B. Blanchet. The Pickup Stick Transistor. Defense Technical Information Center, 2011. http://dx.doi.org/10.21236/ada590147.

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Tengesdal, Morten. Frå transistor til datamaskin. University of Stavanger, 2018. http://dx.doi.org/10.31265/usps.196.

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Abstract:
Dette skrivet prøver å gi ei forståing av korleis datamaskinar er oppbygde og virkar. Ein ser også på korleis ein kan programmera mindre datamaskinar brukte til styring og overvaking av prosessar. Skrivet er laga for bruk i emnet Datamaskinarkitektur ved Universitetet i Stavanger (UiS). Det kan også brukast til å gi ei innføring i digitalteknikk generelt og som ein del av dette, mikroprosessoren sin struktur og virkemåte. Ein får også ei innføring i grunnlaget for konstruksjon av datamaskinar. Ein har prøvd å gjera framstillinga kort og klar. Hovudfokus er på dei ulike byggjesteinane i ein dat
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Mainieri, R. Designing a Micro-Mechanical Transistor. Office of Scientific and Technical Information (OSTI), 1999. http://dx.doi.org/10.2172/763245.

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Bennett, G., M. Thompson, T. Larkin, and J. Hedstrom. Rf transistor thermal/electrical characterization. Office of Scientific and Technical Information (OSTI), 1989. http://dx.doi.org/10.2172/5413222.

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Hembree, Charles E., Alan Mar, and Perry J. Robertson. High Accuracy Transistor Compact Model Calibrations. Office of Scientific and Technical Information (OSTI), 2015. http://dx.doi.org/10.2172/1222177.

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Mishra, Umesh K. Current Apertured Vertical Electron Transistor (CAVET). Defense Technical Information Center, 2001. http://dx.doi.org/10.21236/ada408527.

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Lipson, Michal. An All-Optical Silicon Nano-Transistor. Defense Technical Information Center, 2004. http://dx.doi.org/10.21236/ada427641.

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Iyer, Shanthi, and Jay Lewis. Oxide Based Transistor for Flexible Displays. Defense Technical Information Center, 2014. http://dx.doi.org/10.21236/ada617273.

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Atcitty, Stanley. SiC-Based Transistor-Rectifier Semiconductor Switch. Office of Scientific and Technical Information (OSTI), 2019. http://dx.doi.org/10.2172/1762605.

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