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Overstreet, William Patton. "VHF bipolar transistor power amplifiers: measurement, modeling, and design." Diss., Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/71166.
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Widely used design techniques for radio frequency power amplifiers yield results which are approximate; the initial design is usually refined by applying trial-and-error procedures in the laboratory. More accurate design techniques are complicated in their application and have not gained acceptance by practicing engineers. A new design technique for VHF linear power amplifiers using bipolar junction transistors is presented in this report. This design technique is simple in its application but yields accurate results.
The design technique is based upon a transistor model which is simple enough to be useful for design, but which is sufficiently accurate to predict performance at high frequencies. Additionally, the model yields insight into many of the processes which take place within the typical RF power transistor. The fundamental aspect of the model is the inclusion of charge storage within the transistor base. This charge storage effect gives rise to a nearly sinusoidal collector current waveform, even in a transistor which ostensibly is biased for class B or nonsaturating class C operation.
Methods of predicting transistor input and output impedances are presented. A number of other topics related to power amplifier measurement and design are also included. A unique measurement approach which is ideally suited for use with power amplifiers is discussed. This measurement approach is a hybrid of the common S-parameter measurement technique and the "load-pull" procedure. Practical considerations such as amplifier stability, bias network design, and matching network topology are also included in the report.Ph. D.
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Aurangabadkar, Nilesh Kirti Kumar. "Simulations of analog circuit building blocks based on radiation and temperature-tolerant SIC JFET Technologies." Master's thesis, Mississippi State : Mississippi State University, 2003. http://library.msstate.edu/etd/show.asp?etd=etd-05162003-114102.
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Kashif, Ahsan-Ullah. "Optimization of LDMOS Transistor in Power Amplifiers for Communication Systems." Doctoral thesis, Linköpings universitet, Halvledarmaterial, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-61599.
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The emergence of new communication standards has put a key challenge for semiconductor industry to develop RF devices that can handle high power and high data rates simultaneously. The RF devices play a key role in the design of power amplifiers (PAs), which is considered as a heart of base-station. From economical point of view, a single wideband RF power module is more desirable rather than multiple narrowband PAs especially for multi-band and multi-mode operation. Therefore, device modeling has now become much more crucial for such applications. In order to reduce the device design cycle time, the researchers also heavily rely on computer aided design (CAD) tools. With improvement in CAD technology the model extraction has become more accurate and device physical structure optimization can be carried out with less number of iterations. LDMOS devices have been dominating in the communication field since last decade and are still widely used for PA design and development. This thesis deals with the optimization of RFLDMOS transistor and its evaluation in different PA classes, such as linear, switching, wideband and multi-band applications. For accurate evaluation of RF-LDMOS transistor parameters, some techniques are also developed in technology CAD (TCAD) using large signal time domain computational load-pull (CLP) methods. Initially the RF-LDMOS is studied in TCAD for the improved RF performance. The physical intrinsic structure of RF-LDMOS is provided by Infenion Technologies AG. A reduced surface field (RESURF) of low-doped drain (LDD) region is considered in detail because it plays an important role in RF-LDMOS devices to obtain high breakdown voltage (BVDS). But on the other hand, it also reduces the RF performance due to high on-resistance (Ron). The excess interface state charges at the RESURF region are introduced to reduce the Ron, which not only increases the dc drain current, but also improve the RF performance in terms of power, gain and efficiency. The important achievement is the enhancement in operating frequency up to 4 GHz. In LDD region, the effect of excess interface charges at the RESURF is also compared with dual implanted-layer of p-type and n-type. The comparison revealed that the former provides 43 % reduction in Ron with BVDS of 70 V, while the later provides 26 % reduction in Ron together with BVDS of 64 - 68 V. In the second part of my research work, computational load pull (CLP) simulation technique is used in TCAD to extract the impedances of RF-LDMOS at different frequencies under large signal operation. Flexible matching is an issue in the design of broadband or multi-band PAs. Optimum impedance of RF-LDMOS is extracted at operating frequencies of 1, 2 and 2.5 GHz in class AB PA. After this, CLP simulation technique is further developed in TCAD to study the non-linear behavior of RF devices. Through modified CLP technique, non-linear effects inside the transistor structure are studied by conventional two-tone RF signals in time domain. This is helpful to detect and understand the phenomena, which can be resolved to improve the device performance. The third order inter-modulation distortion (IMD3) of RF- LDMOS was observed at different power levels. The IMD3 of −22 dBc is obtained at 1-dB compression point (P1-dB), while at 10 dB back off the value increases to −36 dBc. These results were also verified experimentally by fabricating a linear PA. Similarly, CLP technique is developed further for the analysis of RF devices in high efficiency operation by investigating the odd harmonic effects for the design of class-F PA. RF-LDMOS can provide a power added efficiency (PAE) of 81.2 % in class-F PA at 1 GHz in TCAD simulations. The results are verified by design and fabrication of class-F PA using large signal model of the similar device in ADS. In fabrication, a PAE of 76 % is achieved.
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Smithers, Colin R. "Linear and efficient bipolar transistor RF amplifiers using envelope feedback." Thesis, University of Surrey, 1985. http://epubs.surrey.ac.uk/843097/.
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After an introduction to amplifiers in communications and an exposition of the literature specifically relevant to high linearity power amplifiers, this study investigates more thoroughly various aspects of envelope feedback as applied to Bipolar Tuned Power Amplifiers at HF and VHP. It is discovered that under the correct conditions a new mode of linear operation exists where gain compression, AM-PM conversion and input impedance are simultaneously linearised, and in this region DC-RF power efficiency is also improved. Spectral measurements are presented from an envelope feedback amplifier constructed to operate over this region. A computerised system is described for measuring accurately the gain and phase shift of the test amplifier against variation of collector supply, quiescent bias current and RF drive power. The results from these measurements are presented as 3-dimensional projections and as contour plots. Subsequently the stored data is used to re-construct two-tone spectra, which is then analysed to show contributions to the spectrum from the gain compression and AM-PM conversion mechanisms separately. Conclusions are drawn with respect to effects of bias on these two mechanisms. A mechanism has been discovered which gives a symetric spectra without requiring AM-PM conversion at the fundamental frequencies. An attempt is made to model the amplifier with a non-linear circuit transient analysis program (SPICE). Good correlation is obtained for some parameters and these results are also plotted in 3-D and in contour.
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BOSI, Gianni. "NONLINEAR TRANSISTOR MODELS AND DESIGN TECHNIQUES FOR HIGH-EFFICIENCY MICROWAVE POWER AMPLIFIERS." Doctoral thesis, Università degli studi di Ferrara, 2014. http://hdl.handle.net/11392/2389391.
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In recent years, electronic technologies oriented to communications went through a continuous and pressing development due to several factors. On one hand, the devel-opment of the internet network and its related information systems caused an increasing interest of the people in using devices capable of ensuring a constant connection to those services. This aspect greatly improved the wide diffusion of mobile devices and new generation technologies, such as 3G and 4G/LTE, were developed to satisfy more and more demanding requirements. On the other hand, other systems such as geolocation services (e.g., GPS and GLONASS), initially built for military purposes, are now diffused and commonly adopted by an increasing number of people.
While the consumer market has given a significant boost to communication tech-nologies, other sectors have seen a tremendous development. As an example, satellite systems for Earth observation (such as the COSMO-SkyMed system for the observa-tion of the Mediterranean basin) plays today a fundamental role in the prevention and the management of natural phenomena.
The aforementioned examples of communication systems exploit microwave fre-quency technologies for the transmission of large amounts of data, thanks to the availability of larger bandwidths. This necessarily implies use of high-power and high-efficiency technologies in line with the requirements of the systems where they are exploited.
When these aspects are taken into account, the attention focuses on the basic ele-ment which mainly determines the performance of an electronic circuit: the transistor. New technologies based on particular semiconductors such as Gallium Arsenide (GaAs) and Gallium Nitride (GaN) are revealing themselves as great solutions for the realization of transistors with excellent performance at micro- and mm-wave frequencies. Because of their relative immaturity compared to well-assessed technologies, such as Silicon, they are of great interest in the research field, in order to identify their limitations and margins of improvement.
The research activities carried out during my PhD program lie in this framework. In particular, the attention has been focused on the nonlinear modeling of transistors for microwave applications and on the study, as well as the application, of design techniques to optimize the performance of power amplifiers.
In Chapter 1 nonlinear transistor modeling techniques will be briefly reviewed. Then, the attention will be focused on the problem of the low-frequency dispersion affecting new generations of electron devices, which strongly influences their dynam-ic behavior and, therefore, their performance at high frequency. To this end, a low-frequency measurement setup oriented to the analysis of this phenomenon will be described since it has been widely used throughout the research activity.
Successively, two different modeling approaches, namely the compact and the behavioral ones, will be considered. Two techniques based on the setup described in Chapter 1 have been analyzed and developed in the PhD activity and will be present-ed in Chapters 2 and 3 respectively.
Finally, Chapter 4 will be devoted to the design of microwave power amplifiers. In particular, the problem of identifying the optimal operating condition for an active device will be analyzed, with particular interest in the maximization of the efficiency. In this context, a recently proposed design technique, based on large-signal low-frequency measurements will be applied to obtain accurate information on the tran-sistor behavior. This technique will be also compared with conventional approaches (e.g., load pull) and validated with the realization of a prototype of a microwave power amplifier.
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Iqbal, Ahmer. "Heterojunction bipolar transistor based distributed amplifiers for fibre optic receiver front-end applications." Thesis, University of Manchester, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.734182.
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Rubio, Robert Dale. "The design, simulation and analysis of InP double heterojunction transistor for power amplifiers." Diss., Restricted to subscribing institutions, 2009. http://proquest.umi.com/pqdweb?did=1779690361&sid=2&Fmt=2&clientId=48051&RQT=309&VName=PQD.
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Varelas, Theodoros Carleton University Dissertation Engineering Electrical. "A monolithic BiCMOS power amplifier for low power digital radio transmitter." Ottawa, 1992.
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Морозова, А. И., Е. С. Бондарева, Ю. В. Сорокопудова, and Я. Н. Колесникова. "Схемотехника приставки для электрогитары "Distortion 250"." Thesis, Сумский государственный университет, 2014. http://essuir.sumdu.edu.ua/handle/123456789/39894.
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Целью работы стало исследование преобразования сигнала примочкой «Distortion 250» и описание этих преобразований. В процессе изготовления печатной платы проводились следующие
манипуляции: разведение дорожек платы; предварительная подготовка заготовки (очистка поверхности, обезжиривание);нанесение защитного покрытия; удаление лишней меди с поверхности платы (травление); отчистка заготовки от защитного покрытия; сверление отверстий, покрытие платы флюсом, лужение. Для травления платы использовался раствор хлорного железа. Процесс травления в этом растворе занял 15 минут.
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Neethling, M. (Marthinus). "A broadband microwave limiting amplifier." Thesis, Stellenbosch : University of Stellenbosch, 2004. http://hdl.handle.net/10019.1/16406.
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Thesis (MScIng)--University of Stellenbosch, 2004.ENGLISH ABSTRACT: Limiting amplifiers are employed in electronic warfare (EW) systems requiring a high measure of amplitude control. These EW systems employ sensitive signal processing components that are unable to accept the full dynamic range of input signals the system must face. The limiting amplifier, however, offers the unique capability of reducing the received signal spectrum to a suitable dynamic range. A typical application of the limiting amplifier is in the instantaneous frequency measurement (IFM) receiver where the limiting amplifier allows the receiver to accurately measure pulsed signals over a wide input dynamic range The aim of this study is the design and analysis of a broadband limiting amplifier. Focus is placed on the design of a socalled backbone limiting amplifier (BLA) which forms an integral part of a proposed modular design approach for realizing a design with improved input dynamic range. A designed BLA is discussed in this thesis while insight is given as to the intricacies associated with its mechanism of operation. Over its 45 dB (- 40 to + 5 dBm) input dynamic range, the designed 2-18 GHz limiting amplifier offers a typical saturated output power of 7.5 dBm while harmonic suppression of better than 8.6 dBc is achieved. The BLA design was based on an existing limiting amplifier design, the so-called baseline limiting amplifier, employing alternating amplifiers and attenuators. Evaluation of the baseline limiting amplifier design allowed for formulation of a design hypothesis for realizing the BLA design. Physical measurements on the BLA were then used to scrutinize and validate the formulated design hypothesis. The requirements for realizing the BLA design were the establishment of a thorough radio frequency (RF) amplifier design capability, an understanding of the nonlinear phenomena associated with the RF amplifier and the utilization and control thereof within the limiting amplifier. Different RF amplifier designs that were carried out are discussed in this thesis, while it is shown how they were used to further investigate important design considerations for application in the BLA design. The computer-aided design packages namely MultiMatch and Microwave Office (MWO) were successfully used in realizing the desired broadband RF amplifier designs and the eventual BLA design.
AFRIKAANSE OPSOMMING: Beperker versterkers word gebruik in elektroniese oorlogvoering (EO) stelsels waar ’n redelike mate van amplitude beheer noodsaaklik is. Sensitiewe seinverwerking komponente, wat nie die volle dinamiese bereik van intreeseine kan hanteer nie, maak deel uit van hierdie EO stelsels. Die beperker versterker bied egter die unieke eienskap om die ontvangde seinspektra te reduseer tot ’n gepaste dinamiese bereik. ’n Tipiese toepassing vir die beperker versterker is as deel van die oombliksfrekwensie- meting ontvanger waar die beperker versterker die ontvanger toelaat om akkurate meting van gepulsde seine te doen oor ’n wye intree dinamiese bereik. Die doel van hierdie studie is die ontwerp en analise van ’n wye-band beperker versterker. Fokus word geplaas op die ontwerp van ’n sogenaamde kruks beperker versterker wat ’n integrale deel uitmaak van ’n voorgestelde modulêre ontwerpsbenadering, wat ten doel het om ’n verbeterde intree dinamiese bereik daar te stel. Oor die 45 dB (- 40 tot + 5 dBm) intree dinamiese bereik, bied die ontwerpte 2-18 GHz beperker versterker ’n tipiese versadigde uittreedrywing van 7.5 dBm terwyl harmonieke onderdrukking van beter as 8.6 dBc verkry is. Die ontwerp van hierdie komponent word in hierdie tesis bespreek terwyl belangrike aspekte oor die werking daarvan uitgelig word. Die ontwerp van die kruks beperker versterker is gebaseer op ’n bestaande beperker versterker ontwerp, of sogenaamde basis ontwerp, wat gebruik maak van afwisselende versterkers en attenuators. Evaluering van die basis ontwerp het toegelaat vir die formulering van 'n ontwerpshipotese om die kruks beperker versterker te realiseer. Fisiese metings op die kruks beperker versterker is gebruik om die ontwerpshipotese krities te evalueer. Om die kruks beperker versterker te realiseer moes die nodige RF versterker ontwerpsvaardigheid daargestel word, ’n begrip vir die nie-liniêere verskynsels in die RF versterker en die gebruik en beheer daarvan in die beperker versterker moes daargestel word. Verskeie RF versterkers wat ontwerp is word in hierdie tesis bespreek, terwyl getoon word hoe hierdie ontwerpe gebruik is om belangrike ontwerpsaspekte te ondersoek wat uiteindelik toegepas is in die kruks beperker versterker ontwerp. Die ontwerpspakkette naamlik MultiMatch en Microwave Office is suksesvol gebruik vir die realisering van die nodige wye-band RF versterkers en die uiteindelike kruks beperker versterker ontwerp.
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Cardon, Christopher Don. "1/f AM and PM noise in a common source heterojunction field effect transistor amplifier." Laramie, Wyo. : University of Wyoming, 2007. http://proquest.umi.com/pqdweb?did=1317343431&sid=1&Fmt=2&clientId=18949&RQT=309&VName=PQD.
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Yu, Chi Sun. "Effectiveness of parallel diode linearizers on bipolar junction transistor and its use in dynamic linearization /." access full-text access abstract and table of contents, 2009. http://libweb.cityu.edu.hk/cgi-bin/ezdb/thesis.pl?phd-ee-b23749362f.pdf.
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Thesis (Ph.D.)--City University of Hong Kong, 2009."Submitted to Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 129-134)
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Yoo, Seungyup. "Field effect transistor noise model analysis and low noise amplifier design for wireless data communications." Diss., Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/13024.
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Valliarampath, J. T. (Joe). "Improving linearity utilising adaptive predistortion for power amplifiers at mm-wave frequencies." Thesis, University of Pretoria, 2014. http://hdl.handle.net/2263/43266.
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The large unlicensed 3 GHz overlapping bandwidth that is available worldwide at 60 GHz has resulted in renewed interest in 60 GHz technology. This frequency band has made it attractive for short-range gigabit wireless communication. The power amplifier (PA) directly influences the performance and quality of this entire communication chain, as it is one of the final subsystems in the transmitter. Spectral efficient modulation schemes used at 60 GHz pose challenging requirements for the linearity of the PA. To improve the linearity, several external linearisation techniques currently exist, such as feedback, feedforward, envelope elimination and restoration, linear amplification with non-linear components and predistortion.
This thesis is aimed at investigating and characterising the distortion components found in PAs at mm-wave frequencies and evaluating whether an adaptive predistortion (APD) linearisation technique is suitable to reduce these distortion components. After a thorough literature study and mathematical analysis, it was found that the third-order intermodulation distortion (IMD3) components were the most severe distortion components. Predistortion was identified as the most effective linearisation technique in terms of minimising these IMD3 components and was therefore proposed in this research. It does not introduce additional complexity and can easily be integrated with the PA. Furthermore, the approach is stable and has lower power consumption when compared to the aforementioned linearisation techniques. The proposed predistortion technique was developed compositely through this research by making it a function of the PA’s output power that was measured using a power detector. A comparator was used with the detected output power and the reference voltages to control the dynamic bias circuit of the variable gain amplifier. This provided control and flexibility on when to apply the predistortion to the PA and therefore allowing the linearity of the PA to be optimised. Three-stage non-linear and linear PAs were also designed at 60 GHz and implemented to compare the performance of the APD technique and form part of the hypothesis verification process.
The 130 nm silicon-germanium (SiGe) bipolar and complementary metal oxide semiconductor (BiCMOS) technology from IBM was used for the simulation of the entire APD and PA design and for the fabrication of the prototype integrated circuits (ICs). This technology has the advantage of integrating the high performance, low power intensive SiGe heterojunction bipolar transistors (HBTs) with the CMOS technology. The SiGe HBTs have a high cut-off frequency ( > 200 GHz), which is ideal for mm-wave PA applications and the CMOS components were integrated in the control logic of the digital circuitry. The simulations and IC layout were accomplished with Cadence Virtuoso. The implemented IC occupies an area of 1.8 mm by 2.0 mm.
The non-linear PA achieves a of 11.97 dBm and an of -10 dBm. With the APD technique applied, the linearity of the PA is significantly improved with an of -6 dBm and an optimum IMD3 reduction of 10 dB. Based on the findings and results of the applied APD technique, APD reduced intermodulation distortion (especially the IMD3) and is thus suitable to improve the linearity of PAs at mm-wave frequencies. To the knowledge of this author, no APD technique has been applied for PAs at 60 GHz, therefore the contribution of this research will assist future PA designers to characterise and optimise the reduction of the IMD3 components. This will result in improved linear output power from the PA and the use of complex modulation schemes at 60 GHz. ## Die groot ongelisensieerde oorvleuelde bandwydte van 3 GHz wat wêreldwyd by 60 GHz beskikbaar is, het hernude belangstelling in 60 GHz-tegnologie tot gevolg gehad. Hierdie frekwensieband het dit aantreklik gemaak vir kortafstand-gigabis draadlose kommunikasie. Aangesien die drywingsversterker een van die finale subsisteme in die seintoestel is, het dit ’n direkte invloed op die werkverrigting en kwaliteit van die hele kommunikasieketting. Spektraaldoeltreffende modulasieskemas wat by 60 GHz gebruik word, stel uitdagende vereistes vir die lineariteit van die drywingsversterker. Om die lineariteit te verbeter, is daar tans verskeie eksterne linearisasietegnieke beskikbaar, soos terugvoer, vooruitvoer, omhullende eliminasie en -restorasie, lineêre versterking met nie-lineêre komponente en predistorsie.
Hierdie tesis het ten doel om die distorsiekomponente wat by millimetergolffrekwensies in drywingsversterkers gevind word, te ondersoek en te karakteriseer en om te bepaal of ’n aanpassende predistorsielinearisasietegniek geskik is om hierdie distorsiekomponente te verminder. Na ’n deeglike literatuurstudie en wiskundige analise is gevind dat die derde-orde-intermodulasiedistorsiekomponente (IMD3) die ergste distorsiekomponente was. Predistorsie is geïdentifiseer as die mees effektiewe linearisasietegniek om hierdie IMD3-komponente te minimeer en die gebruik daarvan is gevolglik in hierdie navorsing voorgestel. Dit bring nie addisionele kompleksiteit mee nie en kan maklik met die drywingsversterker geïntegreer word. Daarbenewens is die benadering stabiel, met laer kragverbruik in vergelyking met die linearisasietegnieke wat voorheen genoem is. Die voorgestelde predistorsietegniek is in hierdie navorsing ontwikkel deur dit ’n funksie van die drywingsversterker se uitsetkrag te maak, wat gemeet is deur ’n kragdetektor te gebruik. ’n Vergelyker is saam met die gemete uitsetkrag en die verwysingspannings gebruik om die dinamiese voorspanningsbaan van die veranderlike winsversterker te beheer. Dit het toegelaat vir beheer en buigsaamheid in die aanwending van die predistorsie op die drywingsversterker en gevolglik vir die optimering van die lineêriteit van die drywingsversterker. Driefase- nie-lineêre en lineêre drywingsversterkers is ook by 60 GHz ontwerp en geïmplementeer om die werkverrigting van die aanpassende predistorsietegniek te vergelyk en dit vorm deel van die verifikasieproses van die hipotese.
Die 130 nm-silikon-germanium (SiGe) bipolêre en metaaloksiedhalfgeleier- (BiCMOS) tegnologie van IBM is gebruik vir die simulasie van die hele aanpassende predistorsietegniek- en drywingsversterkerontwerp en vir die vervaardiging van die prototipe- geïntegreerde stroombane. Hierdie tegnologie het die voordeel dat dit die hoë werkverrigting en lae krag-intensiewe SiGe-heterovoegvlak-bipolêre transistors (HBTs) met die CMOS-tegnologie integreer. Die SiGe-HBTs het ’n hoë afsnyfrekwensie ( > 200 GHz), wat ideaal is vir mm-golfdrywingsversterkeraanwendings en die CMOS-komponente is in die beheer-logika van die digitale stroombaan geïntegreer. Die geïntegreerde stroombaan beslaan ’n area van 1.8 mm by 2.0 mm.
Die nie-lineêre drywingsversterker behaal ’n van 11.97 dBm en ’n van -10 dBm. As die APD-tegniek toegepas word, word die lineariteit van die drywingsversterker beduidend verbeter tot ’n van -6 dBm en ’n optimum-IMD3-vermindering van 10 dB. Volgens die bevindings en resultate van die APD-tegniek wat toegepas is, verminder APD intermodulasiedistorsie (veral die IMD3) en is gevolglik geskik om die lineariteit van drywingsversterkers by mm-golffrekwensies te verbeter. Na die wete van hierdie skrywer is daar nie voorheen enige APD tegniek toegepas vir drywingsversterkers by 60 GHz nie, gevolglik sal die bydrae van hierdie navorsing toekomstige drywingsversterkerontwerpers help om die vermindering van die IMD3-komponente te karakteriseer en optimeer. Dit sal verbeterde lineêre uitsetkrag van die drywingsversterker tot gevolg hê, asook meer komplekse modulasieskemas by 60 GHz toelaat.Thesis (PhD)--University of Pretoria, 2014.
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Electrical, Electronic and Computer Engineering
PhD
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Connor, Mark Anthony. "Design of Power-Scalable Gallium Nitride Class E Power Amplifiers." University of Dayton / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1405437893.
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Srirattana, Nuttapong. "High-Efficiency Linear RF Power Amplifiers Development." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6899.
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Next generation mobile communication systems require the use of linear RF power amplifier for higher data transmission rates. However, linear RF power amplifiers are inherently inefficient and usually require additional circuits or further system adjustments for better efficiency. This dissertation focuses on the development of new efficiency enhancement schemes for linear RF power amplifiers.
The multistage Doherty amplifier technique is proposed to improve the performance of linear RF power amplifiers operated in a low power level. This technique advances the original Doherty amplifier scheme by improving the efficiency at much lower power level. The proposed technique is supported by a new approach in device periphery calculation to reduce AM/AM distortion and a further improvement of linearity by the bias adaptation concept.
The device periphery adjustment technique for efficiency enhancement of power amplifier integrated circuits is also proposed in this work. The concept is clearly explained together with its implementation on CMOS and SiGe RF power amplifier designs. Furthermore, linearity improvement technique using the cancellation of nonlinear terms is proposed for the CMOS power amplifier in combination with the efficiency enhancement technique.
In addition to the efficiency enhancement of power amplifiers, a scalable large-signal MOSFET model using the modified BSIM3v3 approach is proposed. A new scalable substrate network model is developed to enhance the accuracy of the BSIM3v3 model in RF and microwave applications. The proposed model simplifies the modeling of substrate coupling effects in MOS transistor and provides great accuracy in both small-signal and large-signal performances.
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Alwardi, Milad. "Design and characterization of integrating silicon junction field-effect transistor amplifiers for operation in the temperature range 40-77 K." Diss., The University of Arizona, 1989. http://hdl.handle.net/10150/184871.
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The very low photon backgrounds to be achieved by future cryogenic astronomical telescopes present the ultimate challenge to the sensitivity of infrared detectors and associated readout electronics. Cooled silicon JFETs, operated around 70 K in transimpedance amplifiers, have shown excellent performance and stability. However, due to Johnson noise in the feedback resistor, the read noise in one second achieved by such amplifiers is about 500 electrons per second. A drastic improvement in sensitivity was demonstrated using a simple form of integrating JFET amplifiers. Therefore, the excellent performance obtained with cooled silicon JFETs has led to the investigation of their properties in the temperature range 33-77 K to explore their full potential and improve the performance of the integrating amplifier. The freezeout effect in silicon JFETs has been characterized both experimentally and theoretically using a simple analytical simulation program. The effect of variation in device parameters on the freezeout characteristic has been studied, and test results showed that an effective channel mobility must be used instead of a bulk mobility in order to simulate accurately the device current and transconductance freezeout at low temperatures. Many types of commercially available JFETs have been characterized below 77 K and measurements revealed that a balanced source follower or a common-source amplifier with active load can operate well down to 38 Kelvin with extremely low power dissipation. The open gate equivalent input noise voltage was found to be optimum below 77 K, due to a decrease in the gate leakage current, in agreement with theoretical prediction. Based on the superior performance of the balanced source follower with active load, a single channel hybrid integrating JFET amplifier with a JFET reset and a compensation capacitor was developed for operation in the temperature range 40-77 K. Read noise as low as 10 electrons in 128 seconds integration was achieved when the integrator was operated at an optimum temperature of about 55 K. Using a similar design, a 16-channel monolithic integrating amplifier array was designed and built. Preliminary test results at 77 K showed noise performance comparable to the single channel hybrid integrator.
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Botterill, Iain Andrew. "The performance of conventional and dual-fed distributed amplifiers, and the use of the heterojunction bipolar transistor in such structures." Thesis, Brunel University, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.307536.
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Ozalevli, Erhan. "Exploiting Floating-Gate Transistor Properties in Analog and Mixed-Signal Circuit Design." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/14048.
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With the downscaling trend in CMOS technology, it has been possible to utilize the advantages of high element densities in VLSI circuits and systems. This trend has readily allowed digital circuits to predominate VLSI implementations due to their ease of scaling. However, high element density in integrated circuit technology has also entailed a decrease in the power consumption per functional circuit cell for the use of low-power and reconfigurable systems in portable equipment.
Analog circuits have the advantage over digital circuits in designing low-power and compact VLSI circuits for signal processing systems. Also, analog circuits have been employed to utilize the wide dynamic range of the analog domain to meet the stringent signal-to-noise-and-distortion requirements of some signal processing applications. However, the imperfections and mismatches of CMOS devices can easily deteriorate the performance of analog circuits when they are used to realize precision and highly linear elements in the analog domain. This is mainly due to the lack of tunability of the analog circuits that necessitates the use of special trimming or layout techniques.
These problems can be alleviated by making use of the analog storage and capacitive coupling capabilities of floating-gate transistors. In this research, tunable resistive elements and analog storages are built using floating-gate transistors to be incorporated into signal processing applications. Tunable linearized resistors are designed and implemented
in CMOS technology, and are employed in building a highly linear amplifier, a transconductance multiplier, and a binary-weighted resistor digital-to-analog converter. Moreover, a tunable voltage reference is designed by utilizing the analog storage feature of the floating-gate transistor. This voltage reference is used to build low-power, compact, and tunable/reconfigurable voltage-output digital-to-analog converter and distributed arithmetic
architecture.
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Лысенко, Д. С., and В. В. Ольховик. "Усиление звуковых колебаний." Thesis, Сумский государственный университет, 2018. http://essuir.sumdu.edu.ua/handle/123456789/67055.
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Вопросы усиления звука имеют давнюю историю. В глубокой
древности использовались различные рупоры, через которые
передавались воинские команды (вспомним Иерихонскую трубу из
Библии), на кораблях до недавнего времени применялись мегафоны, а
сцену в концертных залах раньше строили наподобие раковины,
чтобы звук распространялся в направлении зрителей.
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Mohamad, Isa Muammar Bin. "Low Noise Amplifiers using highly strained InGaAs/InAlAs/InP pHEMT for implementation in the Square Kilometre Array (SKA)." Thesis, University of Manchester, 2012. https://www.research.manchester.ac.uk/portal/en/theses/low-noise-amplifiers-using-highly-strained-ingaasinalasinp-phemt-for-implementation-in-the-square-kilometre-array-ska(31b6cbae-7b7e-43fe-a612-b3555dd2263d).html.
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The Square Kilometre Array (SKA) is a multibillion and a multinational science project to build the world’s largest and most sensitive radio telescope. For a very large field of view, the combined collecting area would be one square kilometre (or 1, 000, 000 square metre) and spread over more than 3,000 km wide which will require a massive count of antennas (thousands). Each of the antennas contains hundreds of low noise amplifier (LNA) circuits. The antenna arrays are divided into low, medium and high operational frequencies and located at different positions to boost up the telescope’s scanning sensitivity.The objective of this work was to develop and fabricate fully on-chip LNA circuits to meet the stringent requirements for the mid-frequency array from 0.4 GHz to 1.4 GHz of the SKA radio astronomy telescope using Monolithic Microwave Integrated Circuit technology (MMIC). Due to the number of LNA reaching figures of millions, the fabricated circuits were designed with the consideration for low cost fabrication and high reliability in the receiver chain. Therefore, a relaxed optical lithography with Lg = 1 µm was adopted for a high yield fabrication process.Towards the fulfilment of the device’s low noise characteristics, a large number of device designs, fabrication and characterisation of InGaAs/InAlAs/InP pHEMTs were undertaken. These include optimisations at each critical fabrication steps. The device’s high breakdown and very low gate leakage characteristics were further improved by a combination of judicious epitaxial growth and manipulation of materials’ energy gaps. An attempt to increase the device breakdown voltage was also employed by incorporating Field Plate structure at the gate terminal. This yielded the devices with improvements in the breakdown voltage up to 15 V and very low gate leakage of 1 µA/mm, in addition to high transconductance (gm) characteristic. Fully integrated double stage LNA had measured NF varying from 1.2 dB to 1.6 dB from 0.4 GHz to 1.4 GHz, compared with a slightly lower NF obtained from simulation (0.8 dB to 1.1 dB) across the same frequency band.These are amongst the attractive device properties for the implementation of a fully on-chip MMIC LNA circuits demonstrated in this work. The lower circuit’s low noise characteristic has been demonstrated using large gate width geometry pHEMTs, where the system’s noise resistance (Rn) has successfully reduced to a few ohms. The work reported here should facilitate the successful implementation of rugged low noise amplifiers as required by SKA receivers.
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Sajedin, M., Issa T. Elfergani, J. Rodriguez, M. Violas, Abdalfettah S. Asharaa, Raed A. Abd-Alhameed, M. Fernandez-Barciela, and A. M. Abdulkhaleq. "Multi-Resonant Class-F Power Amplifier Design for 5G Cellular Networks." RadioEngineering, 2020. http://hdl.handle.net/10454/18495.
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yesThis work integrates a harmonic tuning mechanism in synergy with the GaN HEMT transistor for 5G mobile transceiver applications. Following a theoretical study on the operational behavior of the Class-F power amplifier (PA), a complete amplifier design procedure is described that includes the proposed Harmonic Control Circuits for the second and third harmonics and optimum loading conditions for phase shifting of the drain current and voltage waveforms. The performance improvement provided by the Class-F configuration is validated by comparing the experimental and simulated results. The designed 10W Class-F PA prototype provides a measured peak drain efficiency of 64.7% at 1dB compression point of the PA at 3.6GHz frequency.
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Ahmad, Norhawati Binti. "Modelling and design of Low Noise Amplifiers using strained InGaAs/InAlAs/InP pHEMT for the Square Kilometre Array (SKA) application." Thesis, University of Manchester, 2012. https://www.research.manchester.ac.uk/portal/en/theses/modelling-and-design-of-low-noise-amplifiers-using-strained-ingaasinalasinp-phemt-for-the-square-kilometre-array-ska-application(b2b50fd8-0a13-4f71-b3f0-616ee4b2a82b).html.
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The largest 21st century radio telescope, the Square Kilometre Array (SKA) is now being planned, and the first phase of construction is estimated to commence in the year 2016. Phased array technology, the key feature of the SKA, requires the use of a tremendous number of receivers, estimated at approximately 37 million. Therefore, in the context of this project, the Low Noise Amplifier (LNA) located at the front end of the receiver chain remains the critical block. The demanding specifications in terms of bandwidth, low power consumption, low cost and low noise characteristics make the LNA topologies and their design methodologies one of the most challenging tasks for the realisation of the SKA. The LNA design is a compromise between the topology selection, wideband matching for a low noise figure, low power consumption and linearity. Considering these critical issues, this thesis describes the procedure for designing a monolithic microwave integrated circuit (MMIC) LNA for operation in the mid frequency band (400 MHz to 1.4 GHz) of the SKA. The main focus of this work is to investigate the potential of MMIC LNA designs based on a novel InGaAs/InAlAs/InP pHEMT developed for 1 µm gate length transistors, fabricated at The University of Manchester. An accurate technique for the extraction of empirical linear and nonlinear models for the fabricated active devices has been developed. In addition to the linear and nonlinear model of the transistors, precise models for passive devices have also been obtained and incorporated in the design of the amplifiers. The models show excellent agreement between measured and modelled DC and RF data. These models have been used in designing single, double and differential stage MMIC LNAs. The LNAs were designed for a 50 Ω input and output impedance. The excellent fits between the measured and modelled S-parameters for single and double stage single-ended LNAs reflects the accurate models that have been developed. The single stage LNA achieved a gain ranging from 9 to 13 dB over the band of operation. The gain was increased between 27 dB and 36 dB for the double stage and differential LNA designs. The measured noise figures obtained were higher by ~0.3 to ~0.8 dB when compared to the simulated figures. This is due to several factors which are discussed in this thesis. The single stage design consumes only a third of the power (47 mW) of that required for the double stage design, when driven from a 3 V supply. All designs were unconditionally stable. The chip sizes of the fabricated MMIC LNAs were 1.5 x 1.5 mm2 and 1.6 x 2.5 mm2 for the single and double stage designs respectively. Significantly, a series of differential input to single-ended output LNAs became of interest for use in the Square Kilometre Array (SKA), as it utilises differential output antennas in some of its configurations. The single-ended output is preferable for interfacing to the subsequent stages in the analogue chain. A noise figure of less than 0.9 dB with a power consumption of 180 mW is expected for these designs.
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Constantin, Nicolas 1964. "Analysis and design of a gated envelope feedback technique for automatic hardware reconfiguration of RFIC power amplifiers, with full on-chip implementation in gallium arsenide heterojunction bipolar transistor technology." Thesis, McGill University, 2009. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=115666.
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In this doctoral dissertation, the author presents the theoretical foundation, the analysis and design of analog and RF circuits, the chip level implementation, and the experimental validation pertaining to a new radio frequency integrated circuit (RFIC) power amplifier (PA) architecture that is intended for wireless portable transceivers.A method called Gated Envelope Feedback is proposed to allow the automatic hardware reconfiguration of a stand-alone RFIC PA in multiple states for power efficiency improvement purposes. The method uses self-operating and fully integrated circuitry comprising RF power detection, switching and sequential logic, and RF envelope feedback in conjunction with a hardware gating function for triggering and activating current reduction mechanisms as a function of the transmitted RF power level. Because of the critical role that RFIC PA components occupy in modern wireless transceivers, and given the major impact that these components have on the overall RF performances and energy consumption in wireless transceivers, very significant benefits stem from the underlying innovations.
The method has been validated through the successful design of a 1.88GHz COMA RFIC PA with automatic hardware reconfiguration capability, using an industry renowned state-of-the-art GaAs HBT semiconductor process developed and owned by Skyworks Solutions, Inc., USA. The circuit techniques that have enabled the successful and full on-chip embodiment of the technique are analyzed in details. The IC implementation is discussed, and experimental results showing significant current reduction upon automatic hardware reconfiguration, gain regulation performances, and compliance with the stringent linearity requirements for COMA transmission demonstrate that the gated envelope feedback method is a viable and promising approach to automatic hardware reconfiguration of RFIC PA's for current reduction purposes. Moreover, in regard to on-chip integration of advanced PA control functions, it is demonstrated that the method is better positioning GaAs HBT technologies, which are known to offer very competitive RF performances but inherently have limited integration capabilities.
Finally, an analytical approach for the evaluation of inter-modulation distortion (IMD) in envelope feedback architectures is introduced, and the proposed design equations and methodology for IMD analysis may prove very helpful for theoretical analyses, for simulation tasks, and for experimental work.
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Chudá, Kateřina. "Silové obvody pro napájení magnetického ložiska." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2019. http://www.nusl.cz/ntk/nusl-401978.
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Magnetic bearings are used to keep objects in certain position via magnetic force. There is no creation of friction, because there is no touch. It is necessary to supply magnetic bearings with electric energy. Linear transistor amplifiers or switched-mode amplifiers can be used to supply them with electric energy.
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Santos, Filipe de Andrade Tabarani. "Projeto de amplificadores com realimentação em corrente utilizando tecnologia 0,35 µm CMOS." [s.n.], 2011. http://repositorio.unicamp.br/jspui/handle/REPOSIP/262023.
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Orientador: Carlos Alberto dos Reis FilhoDissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação
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Resumo: Este trabalho apresenta o estudo aprofundado e a confecção de amplificadores realimentados por corrente (CFA). São analisadas as principais características de um CFA e comparado com o amplificador realimentado por tensão (VOA). Buscou-se esclarecer as aplicações nas quais a primeira célula apresenta-se como melhor alternativa e como importante ferramenta a ser disponibiliza aos projetistas. Ao longo desta analise são frisadas as principais dificuldades na implementação da célula em tecnologia CMOS mencionando as soluções encontradas pela na literatura. Estas dificuldades impedem a confecção de CFAs CMOS comerciais. Um dos principais problemas da implementação de amplificadores realimentados por corrente em tecnologia CMOS e a baixa transcondutância dos transistores. A literatura propõe contornar esta deficiência da tecnologia utilizando células que obtêm alta transcondutância através do uso de realimentação interna [1]. Entretanto, a topologia proposta possui um severo compromisso entre transcondutância e banda de freqüência. O trabalho apresentado nesta dissertação deixa sua contribuição a literatura propondo dois métodos para amenizar este compromisso, que resultam no deslocamento da freqüência de -3dB, tornando-a significantemente maior que a original. No exemplo de projeto, aqui ilustrado, foi obtida banda 3,25 vezes a original,mantendo as características DC.O projeto de duas topologias, sendo uma baseada no primeiro CFA monolítico comercializado e a outra que utiliza transistores compostos, foi realizado visando a implementação monolítica em tecnologia 0,35 ?m CMOS da fabrica Austriamicrosystems. Os protótipos fabricados foram medidos e os resultados comparados com o esperado por simulação
Abstract: This work presents the study and design of current-feedback amplifiers (CFA).It is analyzed the main characteristics of a CFA as it compares to a typical voltage feedback amplifier (VOA). It was attempted to clarify in which applications the first mentioned cell excels at and why it can serve as an important tool for the designers. Throughout the analysis, the main difficulties regarding the implementation of the cell using CMOS technology are highlighted and the solutions proposed by the literature exposed. Those characteristics restrain the conception of CMOS commercials CFAs. One of the primary obstacles for the implementation of current-feedback amplifiers using CMOS technology is the low transconductance of the transistors. The literature proposes the use of cells with internal feedback in order to solve this issue [1].However, the proposed cell has a severe trade-off between transconductance and frequency bandwidth. This work provides its contribution to the literature by proposing two methods to loosen this trade-off. Using the proposed modification, it was obtained 3.25 times the original bandwidth while maintaining all of its native DC characteristics. The design of two topologies was carried out using monolithic Austriamicrosystems0.35?m CMOS technology; one based on the topology of the first commercialized monolithic CFA and the other using compound transistors. The produced prototypes were measured and the results compared with expected by simulation
Mestrado
Eletrônica, Microeletrônica e Optoeletrônica
Mestre em Engenharia Elétrica
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Jha, Nand Kishore. "Design of a complementary silicon-germanium variable gain amplifier." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/24614.
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Barradas, Filipe Miguel Esturrenho. "RF parametric amplifiers." Master's thesis, Universidade de Aveiro, 2012. http://hdl.handle.net/10773/10198.
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Mestrado em Engenharia Electrónica e TelecomunicaçõesRecentemente tem-se feito um esforço no sentido de aumentar a eficiência em aplicadores de RF, no entanto, o transístor é um dispositivo intrinsecamente ineficiente. Utilizando amplificadores paramétricos pode-se teoricamente chegar a 100% de eficiência mesmo operando em modo linear. A razão desta elevada eficiência é o dispositivo activo utilizado, já que os amplificadores paramétricos utilizam uma reactância controlada, que não consome potência. Esta mudança de elemento activo modifica completamente o princípio de funcionamento dos amplificadores. Neste trabalho este tipo de amplificação é estudado, relações e transformações conhecidas são examinadas primeiro para obter propriedades limite gerais. Depois é feita análise de pequeno sinal para se obterem outras características importantes. Finalmente, um novo modelo de grande sinal é derivado e apresentado. Este modelo é capaz de prever algumas características do amplificador, tal como o AM/AM. Utilizando o modelo de grande sinal apresentado projecta-se um amplificador, sendo este posteriormente simulado.
In recent years a significant effort has been made towards efficiency increase in RF amplifiers. The transistor is, however, an intrinsically inefficient device. Parametric amplification can theoretically be 100% efficient even operating in linear mode. The reason behind this efficiency is the active device. These amplifiers forget the transistor to use a controlled reactance, which cannot consume power. This switch in active element changes the whole principle of operation of the amplifiers. In this work this type of amplification is studied. Known relations and transformations are first examined to obtain general limit properties of the used elements. Then small-signal analysis is performed to obtain other important characteristics. Finally, a novel large signal model is developed and presented. This model is capable of accurately predicting the non-linear responses of the amplifier, such as the AM/AM. Using the presented large-signal model, an amplifier is designed and simulated.
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Bulja, Senad. "New phase shifter, amplifier linearisation and transistor characterisation." Thesis, University of Essex, 2007. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.442786.
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Julien, Marquis C. "Bipolar transistor modelling from a power amplifier designer's perspective." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp04/mq22121.pdf.
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Julien, Marquis C. (Marquis Christian) Carleton University Dissertation Engineering Electronics. "Bipolar transistor modelling from a power amplifier designer's perspective." Ottawa, 1997.
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Bengtsson, Olof. "Design and Characterization of RF-Power LDMOS Transistors." Doctoral thesis, Uppsala : University Library, Universitetsbiblioteket, 2008. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-9259.
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Akhtar, Siraj. "Modeling of RF power transistors for power amplifier design /." The Ohio State University, 2000. http://rave.ohiolink.edu/etdc/view?acc_num=osu1488196781733682.
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O'Sullivan, Tomás. "Design of millimeter-wave power amplifiers using InP heterojunction bipolar transistors." Diss., [La Jolla] : University of California, San Diego, 2009. http://wwwlib.umi.com/cr/ucsd/fullcit?p3368992.
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Thesis (Ph. D.)--University of California, San Diego, 2009.Title from first page of PDF file (viewed September 17, 2009). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references (p. 118-123).
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Iwamoto, Masaya. "Linearity characteristics of InGaP/GaAs heterojunction bipolar transistors and power amplifiers /." Diss., Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2003. http://wwwlib.umi.com/cr/ucsd/fullcit?p3091212.
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Ross, Kyle Gene. "Distributed amplifier circuit design using a commercial CMOS process technology." Thesis, Montana State University, 2006. http://etd.lib.montana.edu/etd/2006/ross/RossK0806.pdf.
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Raghavan, Arvind. "Bipolar large-signal modeling and power amplifier design." Diss., Georgia Institute of Technology, 2003. http://hdl.handle.net/1853/13294.
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Gallagher, Jeanne M. B. "A monolithic bipolar junction transistor amplifier in the common emitter configuration." Honors in the Major Thesis, University of Central Florida, 1992. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/98.
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This item is only available in print in the UCF Libraries. If this is your Honors Thesis, you can help us make it available online for use by researchers around the world by following the instructions on the distribution consent form at http://library.ucf.edu/Systems/DigitalInitiatives/DigitalCollections/InternetDistributionConsentAgreementForm.pdf You may also contact the project coordinator, Kerri Bottorff, at kerri.bottorff@ucf.edu for more information.Bachelors
Engineering
Electrical Engineering
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Chen, Zuhui. "Investigation of theoretical limitations of recombination DCIV methodology for characterization of MOS transistors." [Gainesville, Fla.] : University of Florida, 2005. http://purl.fcla.edu/fcla/etd/UFE0010826.
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Chunda, Jaime P. "Low voltage operational amplifier using parasitic bipolar transistors in CMOS." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 1995. http://handle.dtic.mil/100.2/ADA303882.
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MELIANI, Chafik. "Circuits intégrés amplificateurs à base de transistors HEMT pour les transmissions numériques à très haut débit (>=40 Gbit/s)." Phd thesis, Université Paris-Diderot - Paris VII, 2003. http://tel.archives-ouvertes.fr/tel-00007587.
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La systématisation de la conversion analogique/numérique a eu pour effet d'uniformiser le mode de transmission de données aux transmissions numériques ; et notamment sur fibre optique. Dans ce cadre, cette thèse traite des méthodologies de conception et faisabilité de circuits amplificateurs de signaux rapides. Après l'étude de l'effet des éléments parasites sur les structures amplificatrices de base (spécifiquement, les problèmes de chemins de masse, et de référencement de signaux d'entrée), la théorie de distribution est appliquée à la technologie coplanaire InP ; où via une méthodologie que nous avons cherché à systématiser (notamment pour les conditions d'égalité et de faible variation des délais de groupe), sont réalisés des amplificateurs large bande avec Fc=92GHz et entre autres, un produit gain-bande à l'état de l'art de 410 GHz. Au delà des problèmes posés par la technologie coplanaire tels que les discontinuités de masse et la nécessité de préserver le mode de propagation coplanaire, elle ouvre de nouvelles possibilités telles que des lignes artificielles d'entrée/sortie à longueurs identiques, et permet une compacité plus élevée que celle des techniques micro-ruban. Les limites de l'amplification différentielle sont ensuite investies et repoussées, en proposant une structure innovante : la paire différentielle distribuée ; alliant ainsi le fonctionnement à courant constant du mode différentiel (donc avec un degré de liberté supplémentaire, pour le potentiel DC en sortie), à l'aspect large bande du distribué. Des amplificateurs avec 4 Vpp en sortie à 40 Gbit/s ont ainsi été réalisés en pHEMT GaAs. Ce résultat, permettrait à terme, l'élimination des capacités de passage dans les modules driver et la conception de drivers de modulateur mono-puce.
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Manera, Leandro Tiago 1977. "Desenvolvimento de sistemas e medida de ruído de alta e baixa frequência em dispositivos semicondutores." [s.n.], 2010. http://repositorio.unicamp.br/jspui/handle/REPOSIP/261062.
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Orientador: Peter Jurgen TatschTese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Eletrica e de Computação
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Resumo: Este trabalho teve como objetivo a montagem de um sistema de caracterização de ruído de alta e de baixa freqüência, utilizando equipamentos disponíveis no Centro de Componentes Semicondutores da Unicamp. Foi montado um sistema para a caracterização do ruído de baixa freqüência em dispositivos semicondutores e desenvolveu-se um método para a análise da qualidade de interfaces e cálculo de cargas, utilizando o ruído 1/f. Na descrição do ruído em baixa freqüência é apresentado em detalhes todo o arranjo utilizado para a medição, além dos resultados da medida em transistores nMOS e CMOS do tipo p e do tipo n fabricados no Centro. Detalhes importantes sobre o cuidado com a medição, tais como a utilização de baterias para a alimentação dos dispositivos e o correto aterramento, também são esclarecidos. A faixa de freqüência utilizada vai de 1 Hz até 100 KHz. Como aplicação, a medida de ruído é utilizada como ferramenta de diagnóstico de dispositivos semicondutores. Resultados destas medidas também são apresentados. Foi desenvolvido também um sistema para a medição do ruído em alta freqüência. A caracterização teve como objetivo determinar o parâmetro conhecido como Figura de Ruído. Apresenta-se além da descrição do arranjo utilizado na medição, os equipamentos e a metodologia empregada. Em conjunto com as medidas de ruído também são apresentados os resultados das medidas de parâmetros de espalhamento. Para a validação do método de obtenção desse conjunto de medidas, um modelo de pequenos sinais de um transistor HBT, incluindo as fontes de ruído é proposto, e é apresentado o resultado entre a medição e a simulação. A faixa disponível para medida vai de 45 MHz até 30 GHz para os parâmetros de espalhamento e de 10 MHz até 1.6 GHz para medida de figura de ruído
Abstract: The main goal of this work is the development of a noise characterization system for high and low frequency measurements using equipments available at the Center for Semiconductor Components at Unicamp. A low noise characterization system for semiconductors was built and by means of 1/f noise measurement it was possible to investigate semiconductor interface condition and oxide traps density. Detailed information about the test set-up is presented along with noise measurement data for nMOS, p and n type CMOS transistors. There is also valuable information to careful conduct noise measurements, as using battery powered devices and accurate grounding procedures. The low noise set-up frequency range is from 1 Hz up to 100 KHz. Noise as a diagnostic tool for quality and reliability of semiconductor devices is also presented. Measurement data is also shown. A measurement set-up for high frequency noise characterization was developed. Measurements were carried out in order to determine the noise figure parameter (NF) of the HBT devices. Comprehensive information about the test set-up and equipments are provided. Noise data measurements and s-parameters are also presented. In order to validate the measurement procedure, a small signal model for HBT transistor including noise sources is presented. Comparisons between simulation and measured data are performed. The s-parameters frequency range is from 45 MHz to 30 GHz, and noise set-up frequency range is from 10 MHz up to 1.6 GHz
Doutorado
Eletrônica, Microeletrônica e Optoeletrônica
Doutor em Engenharia Elétrica
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Hashim, Shaiful Jahari. "Wideband active envelope load-pull for robust power amplifier and transistor characterisation." Thesis, Cardiff University, 2010. http://orca.cf.ac.uk/54181/.
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The advent of fourth generation (4G) wireless communication with available modulation bandwidth ranging from 1 MHz to 20 MHz is starting to emerge. The linear modulation technique being employed means that the power amplifiers that support the standards need to have high degree of linearity. By nature, however, all power amplifiers are non-linear. Load-pull measurement system provides anindispensable non-linear tool for the characterization of power amplifier and transistor for linearity enhancement. Conventional passive or active load-pull has delay problem that get worse as the modulation frequency is increased beyond few MHz. Furthermore in order to provide robust non-linear measurement, load-pull system needs to provide bandwidth at least five times the modulation bandwidth by including the fifth-order inter-modulation (IMD5). This thesis presents, for the first time, delay compensation on the unique active envelope load-pull architecture providing constant impedance for bandwidth up to 20 MHz. In doing so, it provides a superior load-pull measurement and also the ability to directly control in-band impedances. Artificial variations imposed on the in-band impedances offer further insight on power amplifier and transistor behaviours under wideband multi-tone stimulus.
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TREVISAN, Francesco. "LOW-FREQUENCY LOAD-PULL FOR TRANSISTOR CHARACTERIZATION AND MICROWAVE POWER AMPLIFIER DESIGN." Doctoral thesis, Università degli studi di Ferrara, 2018. http://hdl.handle.net/11392/2487925.
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The design of RF systems with high energy-efficiency is very important for mobile communications. These systems are based on integrated and hybrid RF circuits, with high production costs, which lead to stringent constraints on the exact prediction of the final prototype performance. The design of RF circuits is typically carried out by means of CAD tools that allow estimating the final performance with an accuracy depending on the accuracy of the available component models. In order to improve their prediction capability, transistor models used in the design of microwave amplifiers can be identified by measurements performed with load-pull systems, that are able to put the transistor under actual operating conditions. These measurement systems are also used to directly estimate the performance of the final amplifier to be designed in different operating classes, from the most common ones as A, AB, B or C to the harmonic-manipulated ones, where the load terminations must be suitably controlled also at harmonics.
In high-frequency load-pull systems, it is complex to apply the theoretical terminations required by the waveform engineering theory at the transistor current-generator plane, due to the linear and nonlinear dynamic effects of the transistor that tend to hide the intrinsic device behavior. On the contrary, the required electrical regime can be easily imposed at the transistor current source by using low-frequency load-pull systems; furthermore, by means of a procedure called “nonlinear embedding”, it is possible to obtain the source/load terminations at the design frequency that guarantee the desired performance. Low-frequency load-pull systems can be implemented by using conventional instrumentation present in each microwave laboratory, i.e., arbitrary function generator, oscilloscope, dc voltage supplies and vector network analyzer. These instruments are definitely cheaper than the expensive setups required for microwave load-pull measurements.
In the load-pull systems, the load terminations can be synthesized in an active or passive way. In the active technique, the load is synthesized by applying appropriate incident signals at the output port of the transistor, but this procedure is often complex and time-consuming. The alternative is the passive technique that uses passive components, such as tuners and multiplexers, to apply the load at the fundamental frequency and at the harmonics. In the high-frequency version, these components are usually implemented in microstrip or coaxial technology, while, in their low-frequency version, lumped components, i.e., inductors, resistors, and capacitors, can be adopted.
This thesis is mainly focused on the design and implementation of circuit and component solutions to implement a low-frequency passive load-pull system. In particular, a power bias tee able to handle up to 500 Vdc, 3.4 Adc and RF power of 300 W (at 725 MHz) was designed. Moreover, a low-frequency multiplexer capable of handling load terminations up to the fourth harmonic and a low-frequency resistive tuner capable of handling a minimum power of 15 W, were designed.
The thesis is organized as follows. In the first chapter, the main measurement systems and techniques used to implement the so-called “waveform engineering” design technique will be dealt with. The second chapter will describe the design of different components required for the efficient implementation of a passive low-frequency load-pull system. Finally, in the third chapter the designs of two RF power amplifiers will be presented as application examples of the developed measurement setup and the waveform engineering approach.La progettazione dei sistemi RF ad alta efficienza energetica è molto importante per le comunicazioni mobili. Questi sistemi utilizzano circuiti RF in forma integrata e ibrida con alti costi di produzione che impongono vincoli stringenti sulla corretta predizione delle prestazioni del prototipo finale. Il progetto di circuiti RF è realizzato mediante strumenti CAD che consentono di stimare le prestazioni finali con una accuratezza dipendente dall’accuratezza dei modelli utilizzati. In particolare, i modelli di transistor utilizzati nella progettazione di amplificatori a microonde sono spesso ottenuti da misure eseguite mediante sistemi di load-pull. Questi sistemi possono anche essere utilizzati per caratterizzare le prestazioni dell'amplificatore finale in diverse classi operative, da quelle più comuni come A, AB, B o C a quelle denominate a “manipolazione armonica”, dove le terminazioni del carico devono essere gestite in modo adeguato alla frequenza fondamentale e alle armoniche. Nei sistemi load-pull ad alta frequenza, è complesso applicare le terminazioni teoriche al piano del generatore di corrente del transistor, a causa della rete parassita del transistor e degli effetti non lineari dinamici. Al contrario, sfruttando i sistemi di load-pull a bassa frequenza, risulta piuttosto semplice imporre le terminazioni al piano del generatore di corrente del transistor; inoltre, mediante una procedura chiamata “nonlinear embedding”, è possibile ottenere le prestazioni e le relative terminazioni di carico alla frequenza di progetto dell’amplificatore. I sistemi di load-pull a bassa frequenza possono essere implementati utilizzando strumentazione convenzionale presente in ogni laboratorio a microonde, cioè generatore di funzioni arbitrarie, oscilloscopio, alimentatori a tensione continua e analizzatore vettoriale di reti. Questi strumenti sono decisamente più economici rispetto a quanto richiesto per eseguire misure di load-pull a microonde. Nei sistemi di load-pull, le terminazioni di carico e sorgente possono essere sintetizzate in modo attivo o passivo. Nella tecnica attiva, il carico viene sintetizzato applicando opportune forme d'onda all'ingresso e all'uscita del transistor, ma questa procedura è spesso complessa e richiede molto tempo. L'alternativa è la tecnica passiva che utilizza componenti passivi come tuner e multiplexer per applicare il carico alla frequenza fondamentale e alle armoniche. Nella versione ad alta frequenza, questi componenti sono solitamente implementati in tecnologia a microstriscia o coassiale, mentre, nella loro versione a bassa frequenza, possono essere adottati componenti concentrati, come induttori, resistori e condensatori. Questa tesi si concentra principalmente sulla progettazione e l'implementazione di soluzioni circuitali e componenti per realizzare un sistema di load-pull passivo a bassa frequenza. In particolare, è stata progettata una bias tee di potenza in grado di gestire fino a 500 Vdc, 3.4 Adc e una potenza RF di 300 W (a 725 MHz). Inoltre, sono stati progettati un multiplexer a bassa frequenza in grado di gestire i carichi di terminazione fino alla quarta armonica e un tuner resistivo a bassa frequenza in grado di gestire una potenza minima di 15 W. La tesi è organizzata come segue. Nel primo capitolo verranno trattati i principali sistemi di misura e le tecniche utilizzate per implementare la metodologia di progetto nota come “waveform engineering”. Il secondo capitolo descriverà la progettazione di diversi componenti necessari all’implementazione di un sistema di load-pull a bassa frequenza. Infine, nel terzo capitolo, verrà presentato il progetto di due amplificatori di potenza RF come esempi applicativi del setup di misura sviluppato e del waveform engineering.
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Coen, Christopher T. "Development and integration of silicon-germanium front-end electronics for active phased-array antennas." Thesis, Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/48990.
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The research presented in this thesis leverages silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology to develop microwave front-end electronics for active phased-array antennas. The highly integrated electronics will reduce costs and improve the feasibility of snow measurements from airborne and space-borne platforms. Chapter 1 presents the motivation of this research, focusing on the technological needs of snow measurement missions. The fundamentals and benefits of SiGe HBTs and phased-array antennas for these missions are discussed as well. Chapter 2 discusses SiGe power amplifier design considerations for radar systems. Basic power amplifier design concepts, power limitations in SiGe HBTs, and techniques for increasing the output power of SiGe HBT PAs are reviewed. Chapter 3 presents the design and characterization of a robust medium power X-band SiGe power amplifier for integration into a SiGe transmit/receive module. The PA design process applies the concepts presented in Chapter 2. A detailed investigation into measurement-to-simulation discrepancies is outlined as well. Chapter 4 discusses the development and characterization of a single-chip X-band SiGe T/R module for integration into a very thin, lightweight active phased array antenna panel. The system-on-package antenna combines the high performance and integration potential of SiGe technologies with advanced substrates and packaging techniques to develop a high performance scalable antenna panel using relatively low-cost materials and silicon-based electronics. The antenna panel presented in this chapter will enable airborne SCLP measurements and advance the technology towards an eventual space-based SCLP measurement instrument that will satisfy a critical Earth science need. Finally, Chapter 5 provides concluding remarks and discusses future research directions.
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Andrews, Joel. "Design of SiGe HBT power amplifiers for microwave radar applications." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/28116.
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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2009.Committee Member: John Cressler; Committee Member: John Papapolymerou; Committee Member: Joy Laskar; Committee Member: Thomas Morley; Committee Member: William Hunt.
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Najjari, Hamza. "Power Amplifier Design Based on Electro-Thermal Considerations." Thesis, Bordeaux, 2019. http://www.theses.fr/2019BORD0422.
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L’objectif de ce travail de recherche est de concevoir un amplificateur de puissance sur la base de considérations électrothermiques. Il décrit la question du dynamique EVM et du « paquet long » lors de la conception de l’amplificateur avec des transistors bipolaires à hétérojonctions. Basé sur le comportement électrothermique du circuit, une méthode d’optimisation de l’EVM statique et dynamique est proposée. Un frontend RF complet (amplificateur de puissance + coupleur + interrupteur + amplificateur faible bruit) est conçu pour le dernier standard WLAN : le Wi-Fi 6. La distribution de temperature dynamique dans le circuit est analysée. Son effet sur les performances de la puce est quantifié. Enfin, une polarisation adaptative programmable a été conçue pour garder des performances optimales sur toute la plage de température. Les mesures du circuit montre tout l’effet bénéfique de cette compensation, permettant de garder le dynamique EVM en dessous de -47 dB sur la plage de température ambiante de -40 à 85°CThe aim of this work is to design a power amplifier based on electrothermal considerations. It describes the Dynamic Error Vector Magnitude challenge and long packet issue when designing a power amplifier with hetero-junction bipolar transistors. Based on the circuit electrothermal behavior, an optimization method of both the static and dynamic linearity is proposed. A complete RF front-end (PA + coupler + switch + LNA) is designed for the latest WLAN standard: the Wi-Fi 6. The dynamic temperature distribution in the circuit is analyzed. It’s impact on the performances is quantified. Finally, a programmable temperature dependent bias is designed to compensate for performance degradation. The measurements show a significant linearity improvement with this compensation, allowing the PA to maintain the DEVM lower than -47dB at 14.5 dBm output power, over a large ambient temperature range from -40°C to 85°C
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Dai, Wenhua. "Large signal electro-thermal LDMOSFET modeling and the thermal memory effects in RF power amplifiers." Connect to this title online, 2004. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=osu1078935135.
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Thesis (Ph. D.)--Ohio State University, 2004.Title from first page of PDF file. Document formatted into pages; contains xix, 156 p.; also includes graphics (some col.). Includes bibliographical references (p. 152-156).
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Keogh, David Martin. "Design and fabrication of InGaN/GaN heterojunction bipolar transistors for microwave power amplifiers." Connect to a 24 p. preview or request complete full text in PDF format. Access restricted to UC campuses, 2006. http://wwwlib.umi.com/cr/ucsd/fullcit?p3237565.
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Thesis (Ph. D.)--University of California, San Diego, 2006.Title from first page of PDF file (viewed December 13, 2006). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references.
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Schneider, Karl. "Broadband amplifiers for high data rates using InP, InGaAs double heterojunction bipolar transistors." Karlsruhe : Univ.-Verl. Karlsruhe, 2006. http://deposit.d-nb.de/cgi-bin/dokserv?idn=979772826.
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