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Razafindrakoto, Mirijason Richard. "Modèle hydrodynamique de transistor MOSFET et méthodes numériques, pour l'émission et la détection d'onde électromagnétique THz." Thesis, Montpellier, 2017. http://www.theses.fr/2017MONTS035/document.
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Du fait de ses propriétés intéressantes, le domaine de fréquence térahertz (THz) du spectre électromagnétique peut avoir de nombreuses applications technologiques, de l'imagerie à la spectroscopie en passant par les télécommunications. Toutefois, les contraintes technologiques empêchant l'émission et la détection efficaces de ces ondes par des systèmes conventionnels ont valu à cette partie du spectre électromagnétique le nom de gap THz. Au cours des deux dernières décennies, plusieurs solutions novatrices sont apparues. Parmi elles, l'utilisation de transistors à effet de champ s'est imposée comme une solution originale, bon marché, avec un fort potentiel d'intégration. Le mécanisme identifié fait intervenir l'interaction entre les ondes THz et des ondes de courant (dites ondes plasma) dans le canal du transistor. Le canal du transistor agit tel une cavité pour ces ondes plasma. Le dispositif peut alors se comporter de manière résonante ou non-résonante en fonction de divers paramètres. Dans ce manuscrit, nous étudions numériquement ces différents régimes à l'aide de modèles hydrodynamiques. Les modèles utilisés élargissent les phénomènes pris en compte dans de précédentes études théoriques. Les résultats portent sur la détection d'ondes THz par des transistors et dans une moindre mesure sur leur émission. Dans le régime non-résonant, nous étudions dans quelle mesure la plage de linéarité de détection peut être étendue. Dans le régime résonant, nous montrons l'existence de nouvelles fréquences de résonance, permettant d'élargir le spectre d'intérêt de ces détecteursDue to its interesting properties, the electromagnetic THz frequency range may lead to numerous technological applications, ranging from imaging to spectroscopy or even communications. However, technological constraints prevented the efficient emission and detection of such waves with conventional electronics, leading to the idea of the terahertz gap. In the last decades, multiple novel solutions to resolve this gap have been proposed. Amongst these, one may find the use of simple field effect transistors as the most promising one. Their production benefits from currently available CMOS technology thus drastically decreasing the fabrication cost of such a device while allowing it to be easily integrated within electronic circuits. The mechanism behind the emission and detection is the interaction between THz electromagnetic radiations and current oscillations, that is plasma waves, in the transistor's channel. This channel forms a cavity for plasma oscillations, hence, the device may act either resonantly or non-resonantly, depending on various parameters. This thesis deals with the numerical simulation of the transistor in different regimes using hydrodynamical models. These models account for multiple phenomena that have been considered in previous theoretical studies. Some theoretical results on both the emission and detection of THz radiation are presented. In the non-resonant case, we study how one can increase the linear regime of detection. In the resonant case, we show the existence of unexpected resonance frequencies, enlarging the detection spectrum of such detectors
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Pong, M. H. "Modelling and design of power transistor inverter circuits." Thesis, University of Cambridge, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.384522.
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Hayes, R. C. "Temperature dependance of silicon bipolar transistor D.C. parameters." Thesis, University of Liverpool, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.381268.
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Tang, Yue Teng. "Advanced characterisation and modelling of SiGe HBT's." Thesis, University of Southampton, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.323798.
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Julien, Marquis C. "Bipolar transistor modelling from a power amplifier designer's perspective." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp04/mq22121.pdf.
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Julien, Marquis C. (Marquis Christian) Carleton University Dissertation Engineering Electronics. "Bipolar transistor modelling from a power amplifier designer's perspective." Ottawa, 1997.
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Tian, Jing. "Theory, modelling and implementation of graphene field-effect transistor." Thesis, Queen Mary, University of London, 2017. http://qmro.qmul.ac.uk/xmlui/handle/123456789/31870.
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Two-dimensional materials with atomic thickness have attracted a lot of attention from researchers worldwide due to their excellent electronic and optical properties. As the silicon technology is approaching its limit, graphene with ultrahigh carrier mobility and ultralow resistivity shows the potential as channel material for novel high speed transistor beyond silicon. This thesis summarises my Ph.D. work including the theory and modelling of graphene field-effect transistors (GFETs) as well as their potential RF applications. The introduction and review of existing graphene transistors are presented. Multiscale modelling approaches for graphene devices are also introduced. A novel analytical GFET model based on the drift-diffusion transport theory is then developed for RF/microwave circuit analysis. Since the electrons and holes have different mobility variations against the channel potential in graphene, the ambipolar GFET cannot be modelled with constant carrier mobility. A new carrier mobility function, which enables the accurate modelling of the ambipolar property of GFET, is hence developed for this purpose. The new model takes into account the carrier mobility variation against the bias voltage as well as the mobility difference between electrons and holes. It is proved to be more accurate for the DC current calculation. The model has been written in Verilog-A language and can be import into commercial software such as Keysight ADS for circuit simulation. In addition, based on the proposed model two GFET non-Foster circuits (NFCs) are conducted. As a negative impedance element, NFCs find their applications in impedance matching of electrically small antennas and bandwidth improvement of metasurfaces. One of the NFCs studied in this thesis is based on the Linvill's technique in which a pair of identical GFETs is used while the other circuit utilises the negative resistance of a single GFET. The stability analysis of NFCs is also presented. Finally, a high impedance surface loaded with proposed NFCs is also studied, demonstrating significant bandwidth enhancement.
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Cheng, Xiang. "TFTs circuit simulation models and analogue building block designs." Thesis, University of Cambridge, 2018. https://www.repository.cam.ac.uk/handle/1810/271853.
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Building functional thin-film-transistor (TFT) circuits is crucial for applications such as wearable, implantable and transparent electronics. Therefore, developing a compact model of an emerging semiconductor material for accurate circuit simulation is the most fundamental requirement for circuit design. Further, unique analogue building blocks are needed due to the specific properties and non-idealities of TFTs. This dissertation reviews the major developments in thin-film transistor (TFT) modelling for the computer-aided design (CAD) and simulation of circuits and systems. Following the progress in recent years on oxide TFTs, we have successfully developed a Verilog-AMS model called the CAMCAS model, which supports computer-aided circuit simulation of oxide-TFTs, with the potential to be extended to other types of TFT technology families. For analogue applications, an accurate small signal model for thin film transistors (TFTs) is presented taking into account non-idealities such as contact resistance, parasitic capacitance, and threshold voltage shift to exhibit higher accuracy in comparison with the adapted CMOS model. The model is used to extract the zeros and poles of the frequency response in analogue circuits. In particular, we consider the importance of device-circuit interactions (DCI) when designing thin film transistor circuits and systems and subsequently examine temperature- and process-induced variations and propose a way to evaluate the maximum achievable intrinsic performance of the TFT. This is aimed at determining when DCI becomes crucial for a specific application. Compensation methods are reviewed to show examples of how DCI is considered in the design of AMOLED displays. Based on these design considerations, analogue building blocks including voltage and current references and differential amplifier stages have been designed to expand the analogue library specifically for TFT circuit design. The $V_T$ shift problem has been compensated based on unique circuit structures. For a future generation of application, where ultra low power consumption is a critical requirement, we investigate the TFT’s subthreshold operation through examining several figures of merit including intrinsic gain ($A_i$), transconductance efficiency ($g_m/I_{DS}$) and cut-off frequency ($f_T$). Here, we consider design sensitivity for biasing circuitry and the impact of device variations on low power circuit behaviour.
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Mawby, P. A. "Characterisation and fabrication of heterojunction bipolar transistors." Thesis, University of Leeds, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.383334.
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Adachi, Kazuhiro. "Simulation and modelling of power devices based on 4H silicon carbide." Thesis, University of Newcastle Upon Tyne, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.273406.
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Shah, Alam Huhmmad. "RF modelling of deep-submicron CMOS and heterojunction bipolar transistor for wireless communication systems." Thesis, Queen's University Belfast, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.269173.
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Fernández, S. Alejandro D. "Modelling the temperature dependences of Silicon Carbide BJTs." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-202754.
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Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability of more complex circuits requires the use of simulators and device models to describe the behavior of constituent devices. SPICE Gummel Poon (SGP) is one such model that describes the behavior of the BJT devices. It is simpler as compared to the other models because of its relatively small number of parameters. A simple semi-empirical DC compact model has been successfully developed for low voltage applications SiC BJTs. The model is based on a temperature dependent SiC-SGP model. Studies over the temperature dependences for the SGP parameters have been performed. The SGP parameters have been extracted and some have been optimized over a wide temperature range and they have been compared with the measured data. The accuracy of the developed compact model based on these parameters has been proven by comparing it with the measured data as well. A fairly accurate performance at the required working conditions and correlation with the measured results of the SiC compact model has been achieved.
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Pasadas, Cantos Francisco. "Modelling of field-effect transistors based on 2D materials targeting high-frequency applications." Doctoral thesis, Universitat Autònoma de Barcelona, 2017. http://hdl.handle.net/10803/405314.
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Los sistemas de comunicación inalámbricos 5G, así como el futuro despliegue del “Internet of Things”, han hecho que el International Technology Roadmap for Semiconductors, documento estratégico que marca la hoja de ruta de la industria de los semiconductores, incluya desde 2011 al grafeno y los 2DMs relacionados (GRMs) como candidatos para la electrónica del futuro. Así, el grafeno es considerado actualmente una excelente opción debido a que presenta unas propiedades excepcionales en cuanto al transporte electrónico; y se prevé que los transistores de efecto de campo (FET) que basen su funcionamiento en GRMs (2D-FETs), podrán superar el rendimiento de otras tecnologías.
La presente tesis está dedicada al modelado de 2D-FETs. El objetivo principal es el desarrollo de modelos y herramientas que permitan (i) ganar control tecnológico de los dispositivos basados en grafeno y grafeno bicapa (BLG), (ii) predecir el rendimiento en radiofrecuencia y evaluar la estabilidad de dichos dispositivos, (iii) comparar el rendimiento con otras tecnologías existentes, (iv) servir de ayuda al diseño de circuitos y dispositivos y (v) simular circuitos basados en 2D-FETs.
Para ello, la presente tesis comprende el desarrollo de un modelo de pequeña señal adecuado para 2D-FETs que garantiza la conservación de la carga. Este modelo viene acompañado de una metodología de extracción de parámetros que incluye las resistencias de contacto y acceso, las cuales son de extrema importancia en FETs de baja dimensionalidad. Tomando tal modelo como base, se realiza el análisis de las prestaciones en radiofrecuencia, la evaluación de la estabilidad cuando dichos dispositivos actúan como amplificadores de potencia, y un estudio del escalado del GFET. Los modelos de pequeña señal, como el presentado en esta tesis, son muy útiles para posibilitar el desarrollo de prototipos de una forma rápida y sencilla, lo cual es de especial importancia para tecnologías que se encuentran en las primeras fases de desarrollo, como es el caso actual de la tecnología basada en 2DMs.
Como principal contribución de esta tesis se presenta el desarrollo de un modelo compacto intrínseco de gran señal y basado en la física para FETs de grafeno (GFETs). La importancia de dicho modelo reside en su facultad de poder ser incluido en herramientas software de diseño asistido. El esfuerzo de crear un modelo es un paso necesario para facilitar el diseño de circuitos integrados monolíticos (MMICs) complejos que operen a frecuencias de microondas. La mayoría de los circuitos basados en GRMs demostrados hasta el momento no son ICs, por lo que se requiere de circuitos externos para su funcionamiento. Sin embargo, el desarrollo de circuitos de banda ancha operando a frecuencias de microondas precisa de esta tecnología. El modelo presentado en esta tesis es un buen punto de partida para el futuro desarrollo del diseño asistido de MMICs basados en grafeno. Los resultados son comparados con medidas experimentales de diversos circuitos, como por ejemplo, un amplificador de tensión, un doblador de frecuencia, un mezclador subharmónico de radiofrecuencia; y un detector de fase.
Por otra parte, el BLG es también un material prometedor para transistores que operan en radiofrecuencia. Este material posee una banda prohibida que resulta en una mejor saturación de la corriente que en grafeno monocapa. Motivado por esta importante propiedad física, en esta tesis se lleva a cabo el desarrollo de un modelo numérico de gran señal para FETs basados en BLG, el cual permite lo siguiente: (i) entender las propiedades electrónicas del BLG y cómo estas pueden ser controladas por acción del campo eléctrico, (ii) evaluar el impacto de la banda prohibida en las prestaciones de radiofrecuencia, (iii) comparar dichas prestaciones con otras tecnologías, y (iv) proporcionar asistencia al diseño de dispositivos. De forma notable, el modelo ha sido verificado con datos experimentales obtenidos en la literatura científica.New technologies are necessary for the unprecedented expansion of connectivity and communications in the modern technological society. The specific needs of wireless communication systems in 5G and beyond, as well as devices for the future deployment of the Internet of Things has caused that the International Technology Roadmap for Semiconductors, which is the strategic planning document of the semiconductor industry, considered since 2011, graphene and related materials (GRMs) as promising candidates for the future of electronics. Graphene, a one-atom-thick of carbon, is considered a promising material for high-frequency applications due to its intrinsic superior carrier mobility and very high saturation velocity. These exceptional carrier transport properties suggest that GRM based field-effect transistors can potentially outperform other technologies. This thesis presents a body of work on the modelling, performance prediction and simulation of GRM based field-effect transistors and circuits. The main goal of this work is to provide models and tools to ease the following issues: (i) gaining technological control of single layer and bilayer graphene devices and, more generally, devices based on 2D materials, (ii) assessment of RF performance and microwave stability, (iii) benchmarking against other existing technologies, (iv) providing guidance for device and circuit design, (v) simulation of circuits formed by GRM based transistors. In doing so, a key contribution of this thesis is the development of a small-signal model suited to 2D-material based field-effect transistors (2D-FETs) that guarantees charge conservation. It is also provided a parameter extraction methodology that includes both the contact and access resistances, which are of upmost importance when dealing with low dimensional FETs. Taking it as a basis, an investigation of the GFET RF performance scalability is provided, together with an analysis of the device stability. The presented small-signal model is potentially very useful for fast prototyping, which is of relevance when dealing with the first stages of any new technology. To complete the modelling task, an intrinsic physics-based large-signal compact model of graphene field-effect transistors (GFETs) has been developed, ready to be used in conventional electronic design automation tools. That is considered to be a big step towards the design of complex monolithic millimetre-wave integrated circuits (MMICs). Most of the demonstrated circuits based on GRMs so far are not integrated circuits (ICs), so requiring external circuitries for operation. At mm-wave frequencies, broadband circuits can practically only be realized in IC technology. The compact model presented in this thesis is the starting point towards the design of complex MMICs based on graphene. It has been benchmarked against high-performance and ambipolar electronics’ circuits such as a high-frequency voltage amplifier, a high-performance frequency doubler, a radio-frequency subharmonic mixer and a multiplier phase detector. The final part of the thesis is devoted to the bilayer graphene based FET. Bilayer graphene is a promising material for RF transistors because its energy bandgap might result in a better current saturation than the single layer graphene. Because the great deal of interest in this technology, especially for flexible applications, gaining control of it requires the formulation of appropriate models. A numerical large-signal model of bilayer graphene field-effect transistors has been realized, which allows for (i) understanding the electronic properties of bilayer graphene, in particular the tunable bandgap, (ii) evaluating the impact of the bandgap opening in the RF performance, (iii) benchmarking against other existing technologies, and (iv) providing guidance for device design. The model has been verified against measurement data reported, including DC electrical behaviour and RF figures of merit.
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Goguet, Johnny. "Contribution à la modélisation physique et électrique compacte du transistor à nanotube." Phd thesis, Université Sciences et Technologies - Bordeaux I, 2009. http://tel.archives-ouvertes.fr/tel-00585836.
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Selon l'ITRS, le transistor à nanotube de carbone est une des alternatives prometteuses au transistor MOS Silicium notamment en termes de taille de composant et d'architectures de circuits innovantes. Cependant, à l'heure actuelle, la maturité des procédés de fabrication de ces technologies ne permet pas de contrôler finement les caractéristiques électriques. C'est pourquoi, nous proposons un modèle compact basé sur les principes physiques qui gouvernent le fonctionnement du transistor à nanotube. Cette modélisation permet de lier les activités technologiques à celles de conception de circuit dans le contexte de prototypage virtuel. Pour peu qu'elle inclut des paramètres reflétant la variation des procédés, il est alors possible d'estimer les erformances potentielles des circuits intégrés. Le transistor à nanotube de carbone à modulation de auteur de barrière (C-CNFET), i.e. " MOS-like ", est modélisé analytiquement en supposant le transport balistique des porteurs dans le canal. Le formalisme de Landauer est utilisé pour décrire le courant modulé par le potentiel du canal calculé de façon auto-cohérente avec la charge associée selon le potentiel appliqué sur la grille. Le modèle du transistor à nanotube de carbone double grille, DG-CNFET est basé sur celui du C-CNFET. Ce transistor est de type N ou P selon la polarisation de la grille supplémentaire. Ce transistor est modélisé de manière similaire pour les 3 régions : la partie interne modulée par la grille centrale, et les accès source et drain modulés par la grille arrière. La charge, plus complexe à calculer que celle du C-CNFET, est résolue analytiquement en considérant différentes plages de polarisation et d'énergie. Le modèle du DG-CNFET a été mis en oeuvre dans le cadre d'architectures de circuits électroniques innovants : une porte logique à 2 entrées comportant 7 transistors CNFET dont 3 DG-CNFET pouvant, selon la polarisation des 3 entrées de configuration, réaliser 8 fonctions logiques différentes.
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Helme, John Peter. "Analytical charge control modelling of the speed response of heterojunction bipolar phototransistor and PIN-diode/heterojunction bipolar transistor photoreceivers." Thesis, University of Sheffield, 2005. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.425610.
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Murillo, Carrasco Luis. "Modelling, characterisation and application of GaN switching devices." Thesis, University of Manchester, 2016. https://www.research.manchester.ac.uk/portal/en/theses/modelling-characterisation-and-application-of-gan-switching-devices(a227368d-1029-4005-950c-2a098a5c5633).html.
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The recent application of semiconductor materials, such as GaN, to power electronics has led to the development of a new generation of devices, which promise lower losses, higher operating frequencies and reductions in equipment size. The aim of this research is to study the capabilities of emerging GaN power devices, to understand their advantages, drawbacks, the challenges of their implementation and their potential impact on the performance of power converters. The thesis starts by presenting the development of a simple model for the switching transients of a GaN cascode device under inductive load conditions. The model enables accurate predictions to be made of the switching losses and provides an understanding of the switching process and associated energy flows within the device. The model predictions are validated through experimental measurements. The model reveals the suitability of the cascode device to soft-switching converter topologies. Two GaN cascode transistors are characterised through experimental measurement of their switching parameters (switching speed and switching loss). The study confirms the limited effect of the driver voltage and gate resistance on the turn-off switching process of a cascode device. The performance of the GaN cascode devices is compared against state-of-the-art super junction Si transistors. The results confirm the feasibility of applying the GaN cascode devices in half and full-bridge circuits. Finally, GaN cascode transistors are used to implement a 270V - 28V, 1.5kW, 1 MHz phase-shifted full-bridge isolated converter demonstrating the use of the devices in soft-switching converters. Compared with a 100 kHz silicon counterpart, the magnetic component weight is reduced by 69% whilst achieving a similar efficiency of 91%.
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Gomes, José Miguel Alves Faria. "Characterization and modelling of long-term memory effects in GaN HEMTs." Master's thesis, Universidade de Aveiro, 2016. http://hdl.handle.net/10773/18456.
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Mestrado em Engenharia Eletrónica e de TelecomunicaçõesGallium nitride (GaN) high electron mobility transistor (HEMT) technology has been revolutionizing the RF power amplifier (PA) market. Its potential, versus existing technologies, such as Silicon (Si) Laterally-Diffused MOS(LDMOS), is yet to be completely explored. However, the lack of good characterization and modelling of charge carrier trapping related phenomena has been hampering PA designers from extracting this technology’s promised performance. Hence, GaN HEMT trapping has been given a great amount of attention by the scientific and industrial worlds. This is mainly because the overall linearity of the PA built with this technology is affected, to a great extent, by the trapping state dependence on the device’s drain peak voltage. Circuit computer-aided design (CAD) tools are almost ubiquitous at research and development labs. However, these tools rely, not only on their simulation algorithms, but also on their built-in device models. This makes the development of accurate models a fundamental task. This work reports a multi-bias small-signal equivalent circuit (SSEC) model extraction procedure of a 3.3 W GaN HEMT from pulsed S-parameters as well as the development of a pulsed DC I-V measurement system and its use in the characterization of trapping-effects. This system, which is based on two pulser circuits, designed specifically for gate and drain pulsed measurements, was then automated through a MATLAB/PC controller. The pulser circuits allowed pulse widths on the microsecond scale at very low duty cycles as well as high peak voltages - close to 50 V - and currents - up to 4 A. With the developed system, isothermal standard pulsed I-V curves, as well as trapping-state dependent, isodynamic, pulsed I-V curves were obtained from a 15 W GaN HEMT device. In order to obtain the latter, the so-called double-pulse measurement technique was used. The expected asymmetric time constants associated with drain-lag were clearly observed: on the ns scale for the trapping and on the hundreds of milliseconds for the de-trapping. The predicted relatively reduced impact of gate-lag phenomena in more recent GaN HEMT technologies was also verified.
A tecnologia GaN HEMT tem revolucionado o mercado dos amplificadores de potência para RF. O seu potencial, comparado com tecnologias anteriores, como a Si LDMOS, continua por ser completamente explorado. Contudo, a falta de uma boa caracterização e modelação dos efeitos de memória lenta causados pelo armadilhamento de cargas têm impedido o total aproveitamento desta tecnologia no desenho de amplificadores de potência. Consequentemente, estes fenómenos de armadilhamento têm sido alvo de um amplo estudo tanto a nível científico como industrial. Isto deve-se, sobretudo, porque a linearidade dos amplificadores baseados nesta tecnologia é bastante afectada pelo estado de armadilhamento de cargas no dispositivo, que, por sua vez, é definido pela tensão de pico na saída, drain, do transístor. As ferramentas de desenho de circuitos auxiliado por computador estão presentes na maioria dos laboratórios de investigação. No entanto, estas dependem não só dos seus algoritmos de simulação mas também, em larga medida, dos modelos nelas utilizados, tornando fundamental o desenvolvimento de melhores modelos. O presente documento descreve a extracção de um modelo de circuito equivalente de pequeno signal dependente da polarização, de um transístor GaN HEMT de 3.3 W, a partir de medidas de parâmetros-S pulsadas, assim como a construcção de um sistema de medidas pulsadas DC I-V e a utilização deste último na caracterização de efeitos de armadilhamento. O sistema desenvolvido, baseado em dois circuitos pulsadores desenhados para medidas pulsadas quer no terminal de entrada, gate, quer no de saída, drain, foi automatizado através do software MATLAB instalado num PC. Os circuitos pulsadores permitem larguras de pulso na escala dos microsegundos com duty-cycles tão pequenos como 0.001%, assim como, elevadas tensões de saída - perto de 50 V - e correntes - pelo menos até 4 A. Com o sistema desenvolvido, obtiveram-se curvas I-V iso-térmicas e também curvas I-V iso-dinâmicas, dependentes do estado de armadilhamento, de um transístor GaN HEMT de 15 W. De modo a obter as últimas, foram utilizadas medidas de duplo-pulso. A assimetria esperada nas constantes de tempo associadas com o drain-lag foram claramente observadas: na escala dos ns para o armadilhamento e das centenas de milisegundos para o desarmadilhamento. Tal como a literatura prevê para tecnologias mais recentes de GaN HEMTs, o impacto dos fenónemos de gate-lag que foi observado revelou-se bastante reduzido.
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Ramirez-garcia, Eloy. "Analyse expérimentale et modélisation du bruit haute fréquence des transistors bipolaires à hétérojonctions SiGe et InGaAs/InP pour les applications très hautes fréquences." Thesis, Paris 11, 2011. http://www.theses.fr/2011PA112082/document.
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Le développement des technologies de communication et de l’information nécessite des composants semi-conducteurs ultrarapides et à faible niveau de bruit. Les transistors bipolaires à hétérojonction (TBH) sont des dispositifs qui visent des applications à hautes fréquences et qui peuvent satisfaire ces conditions. L’objet de cette thèse est l’étude expérimentale et la modélisation du bruit haute fréquence des TBH Si/SiGe:C (technologie STMicroelectronics) et InP/InGaAs (III-V Lab Alcatel-Thales).Accompagné d’un état de l’art des performances dynamiques des différentes technologies de TBH, le chapitre I rappelle brièvement le fonctionnement et la caractérisation des TBH en régime statique et dynamique. La première partie du chapitre II donne la description des deux types de TBH, avec l’analyse des performances dynamiques et statiques en fonction des variations technologiques de ceux-ci (composition de la base du TBH SiGe:C, réduction des dimensions latérales du TBH InGaAs). Avec l’aide d’une modélisation hydrodynamique, la seconde partie montre l’avantage d’une composition en germanium de 15-25% dans la base du TBH SiGe pour atteindre les meilleurs performances dynamiques. Le chapitre III synthétise des analyses statiques et dynamiques réalisées à basse température permettant de déterminer le poids relatif des temps de transit et des temps de charge dans la limitation des performances des TBH. L’analyse expérimentale et la modélisation analytique du bruit haute fréquence des deux types de TBH sont présentées en chapitre IV. La modélisation permet de mettre en évidence l’influence de la défocalisation du courant, de l’auto-échauffement, de la nature de l’hétérojonction base-émetteur sur le bruit haute fréquence. Une estimation des performances en bruit à basse température des deux types de TBH est obtenues avec les modèles électriquesIn order to fulfil the roadmap for the development of telecommunication and information technologies (TIC), low noise level and very fast semiconductor devices are required. Heterojunction bipolar transistor has demonstrated excellent high frequency performances and becomes a candidate to address TIC roadmap. This work deals with experimental analysis and high frequency noise modelling of Si/SiGe:C HBT (STMicroelectronics tech.) and InP/InGaAs HBT (III-V Lab Alcatel-Thales).Chapter I introduces the basic concepts of HBTs operation and the characterization at high-frequency. This chapter summarizes the high frequency performances of many state-of-the-art HBT technologies. The first part of chapter II describes the two HBT sets, with paying attention on the impact of the base composition (SiGe:C) or the lateral reduction of the device (InGaAs) on static and dynamic performances. Based on TCAD modelling, the second part shows that a 15-25% germanium composition profile in the base is able to reach highest dynamic performances. Chapter III summarizes the static and dynamic results at low temperature, giving a separation of the intrinsic transit times and charging times involved into the performance limitation. Chapter IV presents noise measurements and the derivation of high frequency noise analytical models. These models highlight the impact of the current crowding and the self-heating effects, and the influence of the base-emitter heterojunction on the high frequency noise. According to these models the high frequency noise performances are estimated at low temperature for both HBT technologies
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Weststrate, Marnus. "LC-ladder and capacitive shunt-shunt feedback LNA modelling for wideband HBT receivers." Thesis, University of Pretoria, 2011. http://hdl.handle.net/2263/26615.
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Although the majority of wireless receiver subsystems have moved to digital signal processing over the last decade, the low noise amplifier (LNA) remains a crucial analogue subsystem in any design being the dominant subsystem in determining the noise figure (NF) and dynamic range of the receiver as a whole. In this research a novel LNA configuration, namely the LC-ladder and capacitive shunt-shunt feedback topology, was proposed for use in the implementation of very wideband LNAs. This was done after a thorough theoretical investigation of LNA configurations available in the body of knowledge from which it became apparent that for the most part narrowband LNA configurations are applied to wideband applications with suboptimal results, and also that the wideband configurations that exist have certain shortcomings. A mathematical model was derived to describe the new configuration and consists of equations for the input impedance, input return loss, gain and NF, as well as an approximation of the worst case IIP3. Compact design equations were also derived from this model and a design strategy was given which allows for electronic design automation of a LNA using this configuration. A process for simultaneously optimizing the circuit for minimum NF and maximum gain was deduced from this model and different means of improving the linearity of the LNA were given. This proposed design process was used successfully throughout this research. The accuracy of the mathematical model has been verified using simulations. Two versions of the LNA were also fabricated and the measured results compared well with these simulations. The good correlation found between the calculated, simulated and measured results prove the accuracy of the model, and some comments on how the accuracy of the model could be improved even further are provided as well. The simulated results of a LNA designed for the 1 GHz to 18 GHz band in the IBM 8HP process show a gain of 21.4 dB and a minimum NF of only 1.7 dB, increasing to 3.3 dB at the upper corner frequency while maintaining an input return loss below -10 dB. After steps were taken to improve the linearity, the IIP3 of the LNA is -14.5 dBm with only a small degradation in NF now 2.15 dB at the minimum. The power consumption of the respective LNAs are 12.75 mW and 23.25 mW and each LNA occupies a chip area of only 0.43 mm2. Measured results of the LNA fabricated in the IBM 7WL process had a gain of 10 dB compared to an expected simulated gain of 20 dB, however significant path loss was introduced by the IC package and PCB parasitics. The S11 tracked the simulated response very well and remained below -10 dB over the feasible frequency range. Reliable noise figure measurements could not be obtained. The measured P1dB compression point is -22 dBm. A 60 GHz LNA was also designed using this topology in a SiGe process with ƒT of 200 GHz. A simulated NF of 5.2 dB was achieved for a gain of 14.2 dB and an input return loss below -15 dB using three amplifier stages. The IIP3 of the LNA is -8.4 dBm and the power consumption 25.5 mW. Although these are acceptable results in the mm-wave range it was however found that the wideband nature of this configuration is redundant in the unlicensed 60 GHz band and results are often inconsistent with the design theory due to second order effects. The wideband results however prove that the LC-ladder and capacitive shunt-shunt feedback topology is a viable means for especially implementing LNAs that require a very wide operating frequency range and also very low NF over that range.Thesis (PhD(Eng))--University of Pretoria, 2011.
Electrical, Electronic and Computer Engineering
unrestricted
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Hamieh, Youness. "Caractérisation et modélisation du transistor JFET en SiC à haute température." Phd thesis, INSA de Lyon, 2011. http://tel.archives-ouvertes.fr/tel-00665817.
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Dans le domaine de l'électronique de puissance, les dispositifs en carbure de silicium (SiC) sont bien adaptés pour fonctionner dans des environnements à haute température, haute puissance, haute tension et haute radiation. Le carbure de silicium (SiC) est un matériau semi-conducteur à large bande d'énergie interdite. Ce matériau possède des caractéristiques en température et une tenue aux champs électriques bien supérieure à celles de silicium. Ces caractéristiques permettent des améliorations significatives dans une grande variété d'applications et de systèmes. Parmi les interrupteurs existants, le JFET en SiC est l'interrupteur le plus avancé dans son développement technologique, et il est au stade de la pré-commercialisation. Le travail réalisé au cours de cette thèse consiste à caractériser électriquement des JFET- SiC de SiCED en fonction de la température (25°C-300°C). Des mesures ont été réalisé en statique (courant-tension), en dynamique (capacité-tension) et en commutation sur charge R-L (résistive-inductives) et dans un bras d'onduleur. Un modèle multi-physique du transistor VJFET de SiCED à un canal latéral a été présenté. Le modèle a été développé en langage MAST et validé aussi bien en mode de fonctionnement statique que dynamique en utilisant le simulateur SABER. Ce modèle inclut une représentation asymétrique du canal latéral et les capacités de jonction de la structure. La validation du modèle montre une bonne concordance entre les mesures et la simulation.
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Baniahmad, Ata. "QUANTUM MECHANICAL Study and Modelling of MOLECULAR ELECTRONIC DEVICES." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/13193/.
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Molecular electronics pursues the use of molecules as fundamental electronic components. The inherent properties of molecules such as nano-size, low cost, scalability, and self-assembly are seen by many as a perfect complement to conventional silicon electronics. Molecule based electronics has captured the attention of a broad cross section of the scientific community.
In molecular electronic devices, the possibility of having channels that are just one atomic layer thick, is perhaps the most attractive feature that takes the attention to graphene.The conductivity, stability, uniformity, composition, and 2D nature of graphene make it an excellent material for electronic devices.
In this thesis we focused on Zigzag Graphene NanoRibbon(ZGNR) as a transmission channel. Due to the importance of an accurate description of the quantum effects in the operation of graphene devices, a full-quantum transport model has been adopted: the electron dynamics has been described by Density Functional Theory(DFT) and transport has been solved within the formalism of Non-Equilibrium Green’s Functions (NEGF). Using DFT and NEGF methods, the transport properties of ZGNR and ZGNR doped with Si are studied by systematically computing the transmission spectrum. It is observed that Si barrier destroyed the electronic transport properties of ZGNR, an energy gap appeared for ZGNR, and variations from conductor to semiconductor are displayed. Its followed by a ZGNR grown on a SiO2 crystal substrate, while substituting the Graphene electrodes with the Gold ones, and its effect on transmission properties have been studied. Improvement in transmission properties observed due to the formation of C-O bonds between ZGNR and substrate that make the ZGNR corrugated. Finally, we modeled a nano-scale Field Effect Transistor by implementing a gate under SiO2 substrate. A very good I-ON/I-OFF ratio has been observed although the device thickness.
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Soubercaze-Pun, Geoffroy. "De l’étude de bruit basse fréquence à la conception d’oscillateur en bande X à partir de transistor AlGaN/GaN HEMT." Toulouse 3, 2007. http://www.theses.fr/2007TOU30081.
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L'objectif de ce travail est d'étudier les transistors à effet de champ à haute mobilité électronique (HEMT) réalisés en Nitrure de Gallium par des mesures en bruit basse fréquence et de réaliser un oscillateur à faible bruit de phase en bande-X. Dans la première partie, nous décrivons succinctement les propriétés du matériau, le transistor ainsi que les sources de bruit basses susceptibles d'êtres présentes dans une structure de type HEMT. La méthodologie de mesure et le banc de bruit basse fréquence sont présentés. Une étude comparative est réalisée sur les comportements en bruit basse fréquence des composants épitaxiés sur différents substrats (Si, SiC, Al2O3). Enfin, une les variations de l'index de fréquence g du bruit en 1/fg relevées sur certains composants sont corrélées au mécanisme de transport des électrons dans la structure : pour cela, nous avons confronté les mesures en bruit basse fréquence avec des simulations physiques. La seconde partie s'intéresse aux composants épitaxiés sur un substrat de Carbure de Silicium. Une méthodologie d'extraction de composantes mathématiques du spectre de bruit basse fréquence est présentée puis validée. Des études en fonction de la polarisation et de la température ont permis de découvrir l'origine des pièges et de les localiser. Enfin, une corrélation avec une étude physique (SIMS) est présentée. Dans la troisième partie, nous développons un modèle large signal afin de réaliser un démonstrateur en bande X. Les performances à l'état de l'art de l'oscillateur sont ensuite présentées (POUT=20dBm, Lf(100kHz)=-105 dBc/Hz à 10 GHz)This work is dedicated to the study in the field of low frequency noise characterization of Gallium Nitride High Electron Mobility Transistors (HEMT) and to the design of an X-Band low phase noise oscillator. First of all, we describe the Gallium Nitride intrinsic properties, the HEMT structure and the associated noise sources that can occur in such device. The low frequency noise (LFN) measurement methodology is also presented. Then, a comparative study is exposed using low frequency noise measurement between devices grown on different substrate (Si, SiC, Al2O3). Finally, an investigation on the 1/fg noise and the frequency index g is performed, indicating a correlation between the frequency index g and the transport mechanism of the carriers in the two dimensional electron gas (2DEG) or in a parasitic AlGaN channel between drain and gate. This study makes use of both LFN measurements and physical simulations. The second part focuses on HEMT grown on SiC substrate: low frequency noise spectra are investigated, and a mathematical extraction procedure is presented. Then, an accurate study is lade thanks to the mathematical extraction of the noise sources versus biasing and under different thermal stress conditions to find the origin of G-R centers. A correlation between this study and SIMS measurements is presented. The last section of this work deals with large signal modelling and X-band oscillator: an original, accurate and fast modelling technique is proposed as an alternative to the usually time consuming traditional techniques. Thus the oscillator is designed, and its performances are discussed (POUT=20dBm, Lf(100kHz)=-105 dBc/Hz at 10 GHz)
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Ndiaye, Ndèye Saly. "Modélisation des phénomènes de piégeage/dépiégeage dans les semi-conducteurs organiques et développement d’un dispositif de caractérisation de pièges dans les transistors organiques." Thesis, Reims, 2019. http://www.theses.fr/2019REIMS035.
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Le sujet de thèse s’inscrit dans le cadre de l’étude de la fiabilité des transistors organiques. La limitation majeure des transistors organiques est due à la présence de pièges dans le composant. Notre étude porte sur la modélisation des phénomènes de piégeage dans les semi-conducteurs organiques (SCO) et la mise en place d’un dispositif de caractérisation de pièges dans les transistors organiques. Le modèle prend en compte des densités d’états gaussiennes pour les porteurs libres et piégés et a été utilisé avec succès pour rendre compte de mesures de spectroscopie de défauts issues de la littérature. Les résultats obtenus montrent que les énergies d’activation de pièges extraites avec le modèle classique sont sous-estimées, de plus il nous faut moins de contributions de pièges pour rendre compte des mesures. Nous proposons ainsi un nouveau modèle permettant de décrire les niveaux de piège dans les SCO. La seconde partie de nos travaux porte sur la mise en place d’un dispositif de caractérisation de pièges dans les transistors organiques. Nous étudions l’effet du stress électrique sur les performances de transistors à base de P3HT en mesurant des transitoires de courant à partir desquels nous déterminons l’évolution temporelle de la tension de seuil (UT) des transistors. Un modèle utilisant une fonction exponentielle étirée permet de rendre compte de l’évolution de UT et d’obtenir une estimation des paramètres de piège. Nous avons montré que dans un transistor à base de P3HT les trous peuvent être capturés par trois contributions de pièges, confirmées par d’autres auteurs, ce qui montre l’intérêt du dispositif pour l’étude de la fiabilité des transistors organiquesThis thesis aims to study the reliability of organic transistors. The main limitation of organic transistors is their instability due to the presence of traps able to lower their electrical performances. Our work is about the modelling of trapping/detrapping processes in organic semiconductors and the implementation of a trap characterization experiment on organic transistors. Our model takes into account adapted energetic distributions of both free and trapped carriers in emission and capture processes. It was used on some trap determination measurements on organic semiconductors from the literature using the Deep Level Transient Spectroscopy (DLTS). Our results show that considering relevant DOS for the HOMO/LUMO and for the trap distribution is not only more relevant for organic semiconductors but also allows one to better fit the measures with less contributions. A new model is then proposed to describe defect states in organic semiconductors considering relevant distributions for both free and trapped carriers. Good agreement with experimental defect data is obtained by the DLTS technique. The second theme of our study is about the implementation of a trap characterization experiment on organic transistors. To do so, we studied bias stress effects on the electrical characteristics of our P3HT based transistors. The principal effect observed in our transistors is a shift of the threshold voltage with the bias stress. We found that three trap contributions are responsible of instabilities noticed in our tested transistor, they are confirmed by other authors in the literature. Hence the interest of our experiment in the study of organic transistors reliability
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Ahmad, Norhawati Binti. "Modelling and design of Low Noise Amplifiers using strained InGaAs/InAlAs/InP pHEMT for the Square Kilometre Array (SKA) application." Thesis, University of Manchester, 2012. https://www.research.manchester.ac.uk/portal/en/theses/modelling-and-design-of-low-noise-amplifiers-using-strained-ingaasinalasinp-phemt-for-the-square-kilometre-array-ska-application(b2b50fd8-0a13-4f71-b3f0-616ee4b2a82b).html.
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The largest 21st century radio telescope, the Square Kilometre Array (SKA) is now being planned, and the first phase of construction is estimated to commence in the year 2016. Phased array technology, the key feature of the SKA, requires the use of a tremendous number of receivers, estimated at approximately 37 million. Therefore, in the context of this project, the Low Noise Amplifier (LNA) located at the front end of the receiver chain remains the critical block. The demanding specifications in terms of bandwidth, low power consumption, low cost and low noise characteristics make the LNA topologies and their design methodologies one of the most challenging tasks for the realisation of the SKA. The LNA design is a compromise between the topology selection, wideband matching for a low noise figure, low power consumption and linearity. Considering these critical issues, this thesis describes the procedure for designing a monolithic microwave integrated circuit (MMIC) LNA for operation in the mid frequency band (400 MHz to 1.4 GHz) of the SKA. The main focus of this work is to investigate the potential of MMIC LNA designs based on a novel InGaAs/InAlAs/InP pHEMT developed for 1 µm gate length transistors, fabricated at The University of Manchester. An accurate technique for the extraction of empirical linear and nonlinear models for the fabricated active devices has been developed. In addition to the linear and nonlinear model of the transistors, precise models for passive devices have also been obtained and incorporated in the design of the amplifiers. The models show excellent agreement between measured and modelled DC and RF data. These models have been used in designing single, double and differential stage MMIC LNAs. The LNAs were designed for a 50 Ω input and output impedance. The excellent fits between the measured and modelled S-parameters for single and double stage single-ended LNAs reflects the accurate models that have been developed. The single stage LNA achieved a gain ranging from 9 to 13 dB over the band of operation. The gain was increased between 27 dB and 36 dB for the double stage and differential LNA designs. The measured noise figures obtained were higher by ~0.3 to ~0.8 dB when compared to the simulated figures. This is due to several factors which are discussed in this thesis. The single stage design consumes only a third of the power (47 mW) of that required for the double stage design, when driven from a 3 V supply. All designs were unconditionally stable. The chip sizes of the fabricated MMIC LNAs were 1.5 x 1.5 mm2 and 1.6 x 2.5 mm2 for the single and double stage designs respectively. Significantly, a series of differential input to single-ended output LNAs became of interest for use in the Square Kilometre Array (SKA), as it utilises differential output antennas in some of its configurations. The single-ended output is preferable for interfacing to the subsequent stages in the analogue chain. A noise figure of less than 0.9 dB with a power consumption of 180 mW is expected for these designs.
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Najari, Montassar. "Modélisation compacte des transistors à nanotube de carbone à contacts Schottky et application aux circuits numériques." Phd thesis, Université Sciences et Technologies - Bordeaux I, 2010. http://tel.archives-ouvertes.fr/tel-00560346.
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Afin de permettre le développement de modèles manipulables par les concepteurs, il est nécessaire de pouvoir comprendre le fonctionnement des nanotubes, en particulier le transport des électrons et leurs propriétés électroniques. C'est dans ce contexte général que cette thèse s'intègre. Le travail a été mené sur quatre plans : • Développement de modèles permettant la description des phénomènes physiques importants au niveau des dispositifs, • Expertise sur le fonctionnement des nano-composants permettant de dégager les ordres de grandeurs pertinents pour les dispositifs, les contraintes, la pertinence de quelques procédés de fabrication (reproductibilité, taux de défauts), • Collection de caractéristiques mesurées et développement éventuel d'expériences spécifiques, • Expertise et conception des circuits innovatifs pour l'électronique numérique avec ces nano-composants. Mots clés — Modélisation compacte, transistor Schottky à nanotube de carbone, simulation circuit, cellule mémoire SRAM, effet tunnel, WKB.
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Zhang, Yongjian. "Investigation of electrical and optical characterisation of HBTs for optical detection." Thesis, University of Manchester, 2016. https://www.research.manchester.ac.uk/portal/en/theses/investigation-of-electrical-and-optical-characterisation-of-hbts-for-optical-detection(3c47e08f-9201-4465-b2b5-268aa0360309).html.
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In this thesis, a detailed study of the electrical and optical characterisations of Heterojuction Bipolar Transistors (HBTs) for optical detection is presented. By comparing both DC and optical characterisations between In0.49Ga0.51P/GaAs Single Heterojuction Bipolar Transistors (SHBTs) and Double Heterojuction Bipolar Transistors (DHBTs), the advantages of using the DHBT as a short wavelength detector are shown. Phenomena related to the base region energy band bending in the DHBT caused by a self-induced effective electric field is discussed and its effects on the performance of the device are elaborated. The use of an eye diagram has been employed to provide requisite information for performance qualification of SHBT/DHBT devices. These give a more detailed understanding compared to conventional S-parameters method. A detailed comparison of In0.49Ga0.51P/GaAs SHBT and DHBT performance using an eye diagram as a functional tool by adopting a modified T-shaped small signal equivalent circuit are given. By adopting this modified T-shaped small signal equivalent circuit, the use of In0.49Ga0.51P/GaAs Double Heterojuction Phototransistors (DHPT) as a short wavelength photodetector is analysed. It is therefore shown that an eye diagram can act as a powerful tool in HBTs/HPTs design optimisations, for the first time in this work. In order to predict the spectral response (SR) and optical characterisations of GaAs-based HPTs, a detailed theoretical absorption model is also presented. The layer dependence of an optical flux absorption profile, along with doping dependent absorption coefficients are taken into account for the optical characterisation prediction. With the aim of eliminating the limitation of current gain as a prerequisite, analytical modelling of SR has been developed by resolving the continuity equation and applying realistic boundary conditions. Then, related physical parameters and a layer structure profile are used to implement simulations. A good agreement with the measured results of the Al0.3Ga0.7As/GaAs HPT is shown validating the proposed theoretical model.
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Azoff, Eitan Michael. "Computer modelling of heterojunction bipolar transistors." Thesis, University of Sheffield, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.420290.
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Shirinskaya, Anna. "Physical modelling of bio sensors based on Organic Electrochemical Transistors." Thesis, Université Paris-Saclay (ComUE), 2017. http://www.theses.fr/2017SACLX055/document.
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Les Transistors Organiques Electrochimiques (OECT) sont largement utilisés comme les capteurs dans de nombreux appareils bioélectroniques. Bien qu’ils aient été largement étudiés au cours de ces dernières années, il n'y a pas encore de compréhension fondamentale et univoque principe de fonctionnement d'un OECT, notamment en ce qui concerne le mécanisme du dé-dopage.Cette thèse est consacrée à la modélisation des Transistors Organiques Electrochimiques. Tout d'abord, un modèle d'état stationnaire numérique a été établi. Ce modèle utilisant les équations de Poisson-Boltzmann, Nernst-Planck et Nernst, nous permet de décrire finement le processus du dé-dopage dans la couche de PEDOT: PSS ainsi que, la distribution des ions et trous dans le capteur. Il a été prouvé expérimentalement que le modèle numérique dit de « neutralité global » est valable pour expliciter le fonctionnement global du capteur, mais aussi, l'origine et le résultat du processus du dé-dopage. La transition d’un modèle totalement numérique à un modèle analytique a été réalisée en ajustant la fonction analytique logistique paramétrique de Boltzmann au profil de conductivité calculé numériquement.Nous avons pu ainsi extraire, la fonction analytique de la dépendance du courant de drain en Fonction du potentiel local. Cette fonction ajuster sur un profil de courant de drain mesuré expérimentalement en fonction du potentiel appliqué permet d'obtenir la conductivité maximale d'une couche de PEDOT: PSS entièrement dopée. La conductivité maximale était dépendante non seulement du matériau, mais aussi de la taille du canal. Il est possible d'extraire, en utilisant la valeur de conductivité maximale et un modèle de semi-conducteur conventionnel, les autres paramètres pour la description complète d’OECT: densité intrinsèque de charge, densité de trous initiaux, concentration initiale de PSS- et capacité volumétrique de la couche polymère conductrice. Le fait d'avoir un outil permettant d'extraire et de caractériser facilement tous les OECT permet non seulement d'augmenter le niveau de description de compréhension du transistor, mais surtout de mieux maitriser la corrélation entre paramètres internes et externes.Finalement, l’approche que nous avons réalisée, couplant modélisation analytique et numérique, nous a permis de proposer une description complète du fonctionnement physique d’un OECT. En outre nous avons pu valider expérimentalement la pertinence de nos modèles en les comparants avec les caractéristiques obtenues via des mesures réellesOrganic Electrochemical Transistors are widely used as transducers for sensors in bioelectronics devices. Although these devices have been extensively studied in the last years, there is a lack of fundamental understanding of their working mechanism, especially concerning the de-doping mechanism.This thesis is dedicated to Organic Electrochemical Transistors modelling. First of all, a numerical steady state model was established. This model allows implementing the Poisson-Boltzmann, Nernst-Planck and Nernst equations to describe the de-doping process in the conductive PEDOT:PSS layer, and ions and holes distribution in the device. Two numerical models were proposed. In the first, Local Neutrality model, the assumption of electrolyte ions trapping in PEDOT:PSS layer was taken into consideration, thus the local neutrality was preserved. In the second model the ions were allowed to move freely under applied electric field inside conductive polymer layer, thus only global electroneutrality was kept. It was experimentally proven that the Global Neutrality numerical model is valid to explain the global physics of the device, the origin and the result of the de-doping process. The transition from totally numerical model to analytical model was performed by fitting the parametric analytical Boltzmann logistic function to numerically calculated conductivity profiles. As a result, an analytical equation for the Drain current dependence on applied voltage was derived. By fitting this equation to experimentally measured Drain current- applied voltage profiles, we could obtain the maximum conductivity of a fully doped PEDOT:PSS layer. The maximum conductivity is shown to be dependent not only on the material, but also on device channel size. Using the maximum conductivity value together with the Conventional Semiconductor model it is possible to extract the other parameters for the full description of the OECT: intrinsic charge carrier density, initial holes density, initial PSS- concentration and conductive polymer layer volumetric capacitance. Having a tool to make easy parameters extraction and characterization of any OECT, permits not only to increase the level of device description, but most importantly to highlight the correlation between external and internal device parameters.Finally it is shown how to make the whole description of the real OECT device, all the models were validated by fitting the modeled and experimentally measured data profiles.As a result, not only the purely theoretical model was presented in this thesis to describe the device physics, but also the prominent step was made on simple real device characterization
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Camuso, Gianluca. "LIGBT design, physics and modelling." Thesis, University of Cambridge, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.708803.
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Hong, Y. "Characterization and modelling of organic thin film transistors." Thesis, University of Cambridge, 2007. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.604202.
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This dissertation addresses, through experiments and modelling, three important aspects of organic thin-film transistor (OTFT) device physics, namely: mechanisms of gate dielectric bias stress instabilities; correlation of transfer characteristics and pseudogap density of states of the organic semiconductor; mechanisms of source and drain contact resistance. Bias stress effects were investigated for two organic insulators (OI), PVP and PMMA, by employing a Si-SiO2-OI-metal capacitor structures. In the cross-linked poly(-vinylphenol) (PVP), it is found that the bias stress effect results from the motion of ionic impurities due to the presence of remnant water. A drift diffusion model is used to describe the ion transport and the resulting bias stress effect. In poly (methyl methacrylate) (PMMA), the physical origin of bias stress effect is twofold. In short time scale, β dielectric relaxation causes a big step of flat-band shift upon the change of bias polarity. Over long time scale, hole injection from the top electrode into PMMA causes nonsaturated flat-band shift which follows the diffusion-limited thermionic emission theory. Next, the author has studied the temperature dependence of transfer characteristic of poly (9,9-dioctylfluorene-co-bithiophene) (F8T2) TFT. A model based on an exponential distribution of density of states (DOS) above a conduction level is formulated and shows a good agreement with experimental gate voltage and temperature dependence of the channel current. The method allows to estimate the trap density and correlate it with the TFT fabrication conditions. Finally, the author has examined the contact effects in Au electrode bottom-contact pentacene TFT. Combination of 2-D modelling and experiments indicates that the poor contact is due to the injection barrier between the source contact and channel. The current-voltage characteristics of the source contact are extracted from the output characteristics.
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Holder, David John. "Characterisation and modelling of Heterostructure Bipolar Junction Transistors." Thesis, University of Leeds, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.305433.
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Drury, Robert. "The physical modelling of heterojunction field effect transistors." Thesis, University of Leeds, 1994. http://etheses.whiterose.ac.uk/21149/.
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This project is primarily concerned with the incorporation of quantum effects into physical models for heterojunction field effect transistors. Several simulations have been developed including a one-dimensional Schottky-gate model which self-consistently solves the effective mass Schrodinger equation with Poisson’s equation. This model employs a fast, accurate and robust solution algorithm based upon an expanded Newton scheme. This work is extended to two-dimensions, permitting charge transport and hence adding the current-continuity equation. All three equations are solved under non-equilibrium conditions. Finally a quasi-two-dimensional HFET model has been written, also including quantum mechanics which produces excellent agreement with measured characteristics. As a rigorous solution of the full two-dimensional Schrodinger equation and corresponding transport equation is very demanding and computationally expensive the problem has been simplified to by assuming the electron wavefunction to take the form of Bloch, or travelling wave solutions is the directions parallel to the heterojunction interface is then solved by taking multiple one-dimensional solutions sampled at various positions throughout the device. This new approach requires alternative solution algorithms to be developed since the conventional schemes are not applicable. This thesis reviews the physics behind semiconductor heterojunctions, discusses the solution schemes used in the models and presents results from the one-dimensional, two-dimensional and quasi-two-dimensional simulations.
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Gonçalves, Cristiano Ferreira. "GaN HEMT transistors characterization for non–linear modelling." Master's thesis, Universidade de Aveiro, 2016. http://hdl.handle.net/10773/21677.
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Mestrado em Engenharia Eletrónica e TelecomunicaçõesUltimamente, as redes de telecomunicações móveis estão a exigir cada vez maiores taxas de transferência de informação. Com este aumento, embora sejam usados códigos poderosos, também aumenta a largura de banda dos sinais a transmitir, bem como a sua frequência. A maior frequência de operação, bem como a procura por sistemas mais eficientes, tem exigido progressos no que toca aos transístores utilizados nos amplificadores de potência de radio frequência (RF), uma vez que estes são componentes dominantes no rendimento de uma estação base de telecomunicações. Com esta evolução, surgem novas tecnologias de transístores, como os GaN HEMT (do inglês, Gallium Nitride High Electron Mobility Transistor). Para conseguir prever e corrigir certos efeitos dispersivos que afetam estas novas tecnologias e para obter o amplificador mais eficiente para cada transístor usado, os projetistas de amplificadores necessitam cada vez mais de um modelo que reproduza fielmente o comportamento do dispositivo. Durante este trabalho foi desenvolvido um sistema capaz de efetuar medidas pulsadas e de elevada exatidão a transístores, para que estes não sejam afetados, durante as medidas, por fenómenos de sobreaquecimento ou outro tipo de fenómenos dispersivos mais complexos presentes em algumas tecnologias. Desta forma, será possível caracterizar estes transístores para um estado pré determinado não só de temperatura, mas de todos os fenómenos presentes. Ao longo do trabalho vai ser demostrado o projeto e a construção deste sistema, incluindo a parte de potência que será o principal foco do trabalho. Foi assim possível efetuar medidas pulsadas DC-IV e de parâmetros S (do inglês, Scattering) pulsados para vários pontos de polarização. Estas últimas foram conseguidas á custa da realização de um kit de calibração TRL. O interface gráfico com o sistema foi feito em Matlab, o que torna o sistema mais fácil de operar. Com as medidas resultantes pôde ser obtida uma primeira análise acerca da eficiência, ganho e potência máxima entregue pelo dispositivo. Mais tarde, com as mesmas medidas pôde ser obtido um modelo não linear completo do dispositivo, facilitando assim o projeto de amplificadores.
Lately, the wireless networks should feature higher data rates than ever. With this rise, although very powerful codification schemes are used, the bandwidth of the transmitted signals is rising, as well as the frequency. Not only caused by this rise in frequency, but also by the growing need for more efficient systems, major advances have been made in terms of Radio Frequency (RF) Transistors that are used in Power Amplifiers (PAs), which are dominant components in terms of the total efficiency of base stations (BSS). With this evolution, new technologies of transistors are being developed, such as the Gallium Nitride High Electron Mobility Transistor (GaN HEMT). In order to predict and correct some dispersive effects that affect these new technologies and obtain the best possible amplifier for each different transistor, the designers are relying more than ever in the models of the devices. During this work, one system capable of performing very precise pulsed measurements on RF transistors was developed, so that they are not affected, during the measurements, by self-heating or other dispersive phenomena that are present in some technologies. Using these measurements it was possible to characterize these transistors for a pre-determined state of the temperature and all the other phenomena. In this document, the design and assembly of the complete system will be analysed, with special attention to the higher power component. It will be possible to measure pulsed Direct Current Current-Voltage (DC-IV) behaviour and pulsed Scattering (S) parameters of the device for many different bias points. These latter ones were possible due to the development of one TRL calibration kit. The interface with the system is made using a graphical interface designed in Matlab, which makes it easier to use. With the resulting measurements, as a first step analysis, the maximum efficiency, gain and maximum delivered power of the device can be estimated. Later, with the same measurements, the complete non-linear model of the device can be obtained, allowing the designers to produce state-of-art RF PAs.
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Lin, Jyi Tsong. "Modelling of small geometry SOI MOSFETs for use in simulators." Thesis, University of Southampton, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.239897.
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Hsieh, Pei-Shan. "IGBT design, modelling and novel devices." Thesis, University of Cambridge, 2015. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.708993.
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Bunting, Jeremy. "The modelling and measurement of noise in microwave FET oscillators." Thesis, University of Leeds, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.254670.
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Russell, P. C. "The modelling and excess noise of VMOS power transistors." Thesis, Lancaster University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.374644.
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singh, Ranjit. "Characterisation and modelling of microwave high electron mobility transistors." Thesis, University of Leeds, 1995. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.702130.
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Al-Ameri, Talib. "Modelling and simulation study of NMOS Si nanowire transistors." Thesis, University of Glasgow, 2018. http://theses.gla.ac.uk/30651/.
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Nanowire transistors (NWTs) represent a potential alternative to Silicon FinFET technology in the 5nm CMOS technology generation and beyond. Their gate length can be scaled beyond the limitations of FinFET gate length scaling to maintain superior off-state leakage current and performance thanks to better electrostatic control through the semiconductor nanowire channels by gate-all-around (GAA) architecture. Furthermore, it is possible to stack nanowires to enhance the drive current per footprint. Based on these considerations, vertically-stacked lateral NWTs have been included in the latest edition of the International Technology Roadmap for Semiconductors (ITRS) to allow for further performance enhancement and gate pitch scaling, which are key criteria of merit for the new CMOS technology generation. However, electrostatic confinement and the transport behaviour in these devices are more complex, especially in or beyond the 5nm CMOS technology generation. At the heart of this thesis is the model-based research of aggressively-scaled NWTs suitable for implementation in or beyond the 5nm CMOS technology generation, including their physical and operational limitations and intrinsic parameter fluctuations. The Ensemble Monte Carlo approach with Poisson-Schrödinger (PS) quantum corrections was adopted for the purpose of predictive performance evaluation of NWTs. The ratio of the major to the minor ellipsoidal cross-section axis (cross-sectional aspect ratio - AR) has been identified as a significant contributing factor in device performance. Until now, semiconductor industry players have carried out experimental research on NWTs with two different cross-sections: circular cylinder (or elliptical) NWTs and nanosheet (or nanoslab) NWTs. Each version has its own benefits and drawbacks; however, the key difference between these two versions is the cross-sectional AR. Several critical design questions, including the optimal NWT cross-sectional aspect ratio, remain unanswered. To answer these questions, the AR of a GAA NWT has been investigated in detail in this research maintaining the cross-sectional area constant. Signatures of isotropic charge distributions within Si NWTs were observed, exhibiting the same attributes as the golden ratio (Phi), the significance of which is well-known in the fields of art and architecture. To address the gap in the existing literature, which largely explores NWT scaling using single-channel simulation, thorough simulations of multiple channels vertically-stacked NWTs have been carried out with different cross-sectional shapes and channel lengths. Contact resistance, non-equilibrium transport and quantum confinement effects have been taken into account during the simulations in order to realistically access performance and scalability. Finally, the individual and combined effects of key statistical variability (SV) sources on threshold voltage (VT), subthreshold slope (SS), ON-current (Ion) and drain-induced barrier lowering (DIBL) have been simulated and discussed. The results indicate that the variability of NWTs is impacted by device architecture and dimensions, with a significant reduction in SV found in NWTs with optimal aspect ratios. Furthermore, a reduction in the variability of the threshold voltage has been observed in vertically-stacked NWTs due to the cancelling-out of variability in double and triple lateral channel NWTs.
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Lee, Soon Peng. "Modelling the DC performance of GAAS Homojunction bipolar transistors." Thesis, University of British Columbia, 1985. http://hdl.handle.net/2429/26306.
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Two models, one analytical and one numerical, have been developed to predict the dc performance of GaAs homojunction bipolar transistors. In each case the minority carrier properties of lifetime and mobility have been described by polynomial fits to recent data. Bandgap narrowing in the emitter and base regions has also been taken into account. The analytical model assumes uniform doping in the three regions of the transistor and is thus appropriate to predicting the performance of devices fabricated using epitaxial technologies. This model is also useful for carrying out sensitivity analyses. The importance of parameters such as regional widths and doping densities, minority carrier lifetimes and surface recombination velocity is examined here. The numerical model is useful for describing the performance of ion-implanted devices. Good agreement is obtained between results from the model and recent experimental data from prototype devices.Applied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate
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Allen, Richard M. "Investigation and modelling of dual gate MESFET mixers." Thesis, Leeds Beckett University, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.282776.
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This thesis deals with some of the theoretical and practical aspects relating to the conversion gain and noise performance of mixers employing dual-gate field effect transistors (DGFET'S) . To start with, the role of mixers in the context of radio conununication receivers is highlighted and the most relevant mixer properties are explained. Solid state mixing devices and their circuits are then discussed with special emphasis on the DGFET.This includes a survey and explanation of mixing devices ,planar transmission lines and circuit components for the practical design of mixers. Chapter 3 then deals with the mixer signal analysis as well as accuracy considerations. A more detailed treatment of the DGFET in terms of structure and dc model is given in the subsequent chapter. Problems associated with the choice of an FET model are referred to as well as the use of MATLAB for computationa: purposes. This is followed in the next two chapters with the development and analysis of the large signal equivalent circuit of tr.{· DGFET,and a treatment of noise and its measurement as associated with mixers. The design, practical implementation and measurement of the properties of DGFET mixers is covered in chapter 7. This is followed in Chapter 8 by an overall discussion of results, possible future work and conclusions. A new FET model is proposed that enables the dc characteristics to be simulated more closely than in previous models, particularly at low drain voltages. Furthermore, the representation of the noise by a frequency independent drain current generator and an input noise conductance enabled a single set of measurements to simulate the noise behaviour of the device as an amplifier or a mixer. Practical investigations using an NEe device type NE 41137 gave a maximum stable conversion gain in the frequency range O.SGHz to 3.0GHz of 4dB with a minimum noise figure 8.SdB.
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Lee, J. H. "Two-dimensional modelling and harmonic distortion analysis of bipolar transistors." Thesis, Brunel University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.356585.
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Gaddi, Roberto. "On the characterisation and modelling of silicon RF LDMOS transistors." Thesis, Cardiff University, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.397144.
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Aynul, Islam. "Monte Carlo device modelling of electron transport in nanoscale transistors." Thesis, Swansea University, 2012. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.678562.
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Jung, Sungyeop. "Physically-Based Compact Modelling of Organic Electronic Devices." Thesis, Université Paris-Saclay (ComUE), 2016. http://www.theses.fr/2016SACLX115/document.
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En dépit d'une amélioration remarquable de la performance des composants électroniques organiques, il y a encore un manque de compréhension théorique rigoureux sur le fonctionnement du composant. Cette thèse est consacrée à la création de modèles pratiques pour composants électroniques organiques à base physique complet, à savoir un modèle compact à base physique. Un modèle compact à base physique d'un élément de circuit est une équation mathématique qui décrit le fonctionnement du composant, et est généralement évaluée par trois critères: si elle est suffisamment simple pour être incorporé dans des simulateurs de circuits, précise pour rendre le résultat des simulateurs utile les concepteurs de circuits et rigoureux pour capturer des phénomènes physiques se produisant dans le composant. Dans ce contexte, les caractéristiques distinctives de l'injection de porteurs de charge et de transport dans les semi-conducteurs organiques sont incorporés dans les modèles avec un effort particulier pour maintenir la simplicité mathématique. L'effet concomitant sur les caractéristiques courant-tension des diodes et des transistors organiques prototypiques sont étudiés. Les méthodes d'extraction des paramètres cohérents aux modèles sont présentés qui permettent la détermination univoque des paramètres de le composant utilisé pour le fonctionnement du composant de modélisation et l'évaluation des performances de le composant et les propriétés des couches minces et des interfaces organiques. Les approches englobent le developement analytique des équations physiques, la simulation numérique à deux dimensions basé sur la méthode des éléments finis et la validation expérimentale. Les modèles compacts originaux et entièrement analytiques et des méthodes d'extraction de paramètres fournissent une compréhension fondamentale sur la façon dont le désordre énergétique dans une couche mince de semi-conducteur organique, décrit par la densité d’etats Gaussienne, affecte les caractéristiques courant-tension observables des composants.Mots-clés : Electronique organique, physique des composants électroniques, modélisation analytique, diodes, transistors à effet de champ, densité d’etats GaussienneIn spite of a remarkable improvement in the performance of organic electronic devices, there is still a lack of rigorous theoretical understanding on the device operation. This thesis is dedicated to establishing practical models of organic electronic devices with a full physical basis, namely a physically-based compact model. A physically-based compact model of a circuit element is a mathematical equation that describes the device operation, and is generally assessed by three criteria: whether it is sufficiently simple to be incorporated in circuit simulators, accurate to make the outcome of the simulators useful to circuit designers, and rigorous to capture physical phenomena occuring in the device. In this context, distinctive features of charge carrier injection and transport in organic semiconductors are incorporated in the models with a particular effort to maintain mathematical simplicity. The concomitant effect on the current-voltage characteristics of prototypical organic diodes and transistors are studied. Parameter extraction methods consistent to the models are presented which enable unambiguity determination of device parameters used for modeling device operation and assessing device performance and properties of organic thin-films and interfaces. The approaches encompass analytical developement of physical equations, two-dimensional numerical simulation based on finite-element method and experimental validation. The original and fully analytical compact models and parameter extraction methods provide fundamental understanding on how energetic disorder in an organic semiconductor thin-film, described by the Gaussian density of states, affects the observable current-voltage characteristics of the devices.Keywords : Organic electronics, device physics, analytical modeling, diodes, field-effect transistors, Gaussian density-of-states
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Beye, Mamadou Lamine. "Etude et contribution à l’optimisation de la commande des HEMTs GaN." Thesis, Lyon, 2020. http://www.theses.fr/2020LYSEI102.
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Cette thèse s'inscrit dans un contexte de développement durable où les enjeux énergétiques consistent à concevoir des convertisseurs de puissance plus disséminés, donc avec une Spécification ambitieuse en termes de densités massique et volumique. Les composants à semiconducteur dit à grand Gap permettent l’augmentation de la fréquence de commutation et permettent un fonctionnement à plus haute température locale. Les commutations à front raides et à haute fréquence des transistors rendent le système plus sensible aux éléments parasites. Ceci perturbe en retour la commutation des transistors et génère des pertes joules supplémentaires. Dans ce contexte les travaux ont été effectués dans le cadre d’une cotutelle entre les laboratoires Ampère (INSA Lyon) et LN2 (Université de Sherbrooke), le but étant d’apporter des contributions à l’optimisation de la commutation des HEMTs GaN. Le premier axe des travaux consiste à mettre en place des stratégies de contrôle de vitesses de commutation en tension et en courant, par la grille, dans le but d’améliorer la signature CEM. Les circuits de contrôle proposés sont développés dans un premier temps en boucle ouverte puis dans un second temps en boucle fermée afin de compenser des non-linéarités (température, courant de charge et tension de fonctionnement). Les prototypes de contrôle de grille ont été testés à partir de composants discrets du marché. Des limites apparaissent, que l’intégration monolithique GaN doit corriger à terme, en particulier en atténuant fortement le problème des inductances parasites. Les analyses en simulation ont reposé sur l’adoption d’un modèle comportemental de HEMT GaN identifiable. Le deuxième axe des travaux consiste à vérifier de manière systémique différentes stratégies de contrôle de grille notamment pour la gestion du compromis entre pertes joule pendant les temps morts au sein d’un à bras d’onduleur et la performance fréquentielle des commutations. Aux termes de ces travaux, les systèmes de contrôles développés en boucle ouverte ont permis de ralentir les vitesses de commutation d’au moins 30 %, occasionnant une augmentation des pertes de commutation, dans un ordre de grandeur inférieur à 50 %. Due à la rapidité de commutation des HEMT GaN et aux limites des composants discrets du marché, le taux de réduction des vitesses de commutation obtenu avec la boucle fermée (taux de réduction inférieur à 20 %) est moins intéressant qu’avec la boucle ouverte. L’utilisation d’un circuit monolithique peut être une alternative pour augmenter le taux de réduction des vitesses de commutation en boucle fermée. Des résultats de simulation sous SPICE en vue du circuit monolithique sont à la base de cette hypothèse. Concernant le deuxième axe, l’application de commande multiniveaux de grille des transistors du bras d’onduleur a permis de réduire les pertes de conduction inverse et les pertes dues aux phénomènes de Cross Talk d’au moins 30 %This thesis is part of the sustainable development context where the energy challenges rely on designing numerous and lumped power converters with good power density and high efficiency. New power semiconductor devices, namely wide band semiconductors (GaN, SiC) are used in designing the converters. The high frequency control of these converters makes the system more sensitive to parasitic elements. The latter elements disrupt the switching behavior of the transistors and generate additional losses. In this context this work was carried out in a cotutelle partnership between Ampère Laboratory in Villeurbanne and LN2 laboratory at the University of Sherbrooke; the aim being to make a contribution in optimizing the switching conditions of GaN HEMTs. The first work axis consists in managing the voltage and current switching speed through gate control strategies in order to improve the conducted EMI. Firstly, most of the proposed control circuits are developed in open-loop and then secondly in closed-loop in order to compensate the effects of non-linearities (with respect to temperature, load current and operating voltage). Concerning the development of control systems, it can be done first by the use of available discrete components, then by the alternative of the monolithic GaN integration which is considered in order to bring more speed and efficiency. Monolithic integration would also solve the problem of parasitic inductances. To facilitate the design of integrated circuits and control systems, the development of a behavioral model of HEMT GaN will serve as a modeling tool. The second axis of the work consists in experimentally validating well-adapted control system for the gate of the power transistor in order to master the transient behaviors of the power transistors. Namely it is necessary to allow a satisfying management of losses during dead time in a half bridge converter. At the end of this work, the control systems developed in open loop made it possible to slow the switching speeds by at least 30 % but causing an increase in switching losses up to 50% in some cases. Due to the fast switching speed of HEMT GaNs and the limitations of discrete components on the market, the reduction rate of switching speeds obtained with the closed loop (reduction rate less than 20%) is less attractive than that of the open loop. Using a monolithic circuit can be an alternative to increase the rate of reduction of closed loop switching speeds. SPICE simulation toward monolithic circuit are the basis of this hypothesis. Concerning the second axis, the application of multilevel gate voltage control of the transistors of half bridge made it possible to reduce the losses of reverse conduction and the losses due to the phenomena of Cross Talk by at least by 30 %
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Zamanillo, Sáinz de la Maza José María. "Metodología para la extracción lineal y no-lineal de modelos circuitales para dispositivos MESFET y HEMT de media-alta potencia." Doctoral thesis, Universidad de Cantabria, 1996. http://hdl.handle.net/10803/10677.
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En la presente tesis se muestra una nueva metodología de extracción "inteligente" de modelos circuitales lineales y no lineales para dispositivos MESFET y HEMT, además de efectuar numerosas aportaciones en el campo de las medidas radioeléctricas de dichos dispositivos mediante diseño del hardware y del software necesario para la automatización de las mismas. Por otro lado se presenta un novedoso modelo de Gran Señal para dispositivos HEMT de potencia que da cuenta del fenómeno de la compresión de la transconductancia y es fácilmente implementable en simuladores no lineales comerciales del tipo de MDS, LIBRA, HARMONICA, etc. Además se ha aumentado el rango de validez frecuencial de los modelos de pequeña señal mediante la obtención de las expresiones "exactas" de los modelos usuales de pequeña señal Vendelin-Dambrine, Vickes, Berroth & Bosch, etc. Otra novedad aportada por este trabajo de tesis ha sido aplicar estos modelos lineales a los transistores HEMT, evitando la obtención valores carentes de significado físico como ocurría hasta ahora. Como validación del modelo no lineal de HEMT se han llevado a cabo numerosas simulaciones del mismo en MDS que han sido comparadas con las medidas experimentales realizadas en nuestro laboratorio (Scattering, DC, Pulsadas y Pin/Pout) poniendo de manifiesto la exactitud del modelo. Para validar los modelos de pequeña señal se han efectuado simulaciones con el simulador lineal MMICAD utilizando transistores de diferentes tamaños procedentes de distintas foundries con objeto de visualizar el comportamiento del dispositivo independientemente del origen del mismo.In this thesis a new methodology for the "intelligent" parameter extraction of linear and non-linear model for GaAs MESFET and HEMT devices is shown, besides numerous contributions in the field of Scattering and DC measurements of this kind of devices by means of hardware design and necessary software for the automation of the same have been done. On the other hand a novel Great Signal model for HEMT devices is presented. This model is capable to model the transconductance compression phenomenon and it is easily to built in commercial non-linear simulators like MDS, LIBRA, Microwave HARMONICA, etc. This work has also increased the frequency range for the usual small-signal models by means of calculate "exact" expressions of them. Another novelty contribution of this thesis is to apply for first time these linear models to HEMT transistors, avoiding the lacking of physical meaning values like it occurred up to now. To make possible the validation of non-linear HEMT model, simulations with MDS software and comparisons with experimental measurements made in our laboratory (Scattering, DC, Pulsed and Pin/ Pout) have been carried out and there was very good agreement between measured and simulated data. To validate small-signal models referred before, simulations with MMICAD software and comparisons between simulated and experimental scattering measurements using transistors of different sizes from several foundries and technological processes have been made.
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Truksa, Jan. "Modelování prvků pro bioelektroniku." Master's thesis, Vysoké učení technické v Brně. Fakulta chemická, 2018. http://www.nusl.cz/ntk/nusl-376789.
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Tématem této práce je počítačové modelování organického elektrochemického tranzistoru (OECT). Pro vytvoření modelu bylo třeba vypočítat rozložení elektrického pole a koncentrace iontů elektrolytu. Výpočet byl proveden numericky pomocí metody konečných prvků. Bylo vypočítáno rozložení elektrického potenciálu na povrchu kanálu OECT, dále byly vypočítány změny vodivosti a výstupní proud OECT. Výpočty byly provedeny na osobním počítači pomocí komerčního softwaru COMSOL Multiphysics. Kvůli nedostatečnému výpočetnímu výkonu musel být model rozdělen na části a drasticky zjednodušen. Prezentované výsledky se liší od literatury, protože se nepodařilo správně modelovat saturaci tranzistoru. Odchylky od reálného chování OECT jsou pravděpodobně způsobeny zjednodušením modelu.
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Dideban, Daryoosh. "Statistical modelling of nano CMOS transistors with surface potential compact model PSP." Thesis, University of Glasgow, 2012. http://theses.gla.ac.uk/3257/.
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The development of a statistical compact model strategy for nano-scale CMOS transistors is presented in this thesis. Statistical variability which arises from the discreteness of charge and granularity of matter plays an important role in scaling of nano CMOS transistors especially in sub 50nm technology nodes. In order to achieve reasonable performance and yield in contemporary CMOS designs, the statistical variability that affects the circuit/system performance and yield must be accurately represented by the industry standard compact models. As a starting point, predictive 3D simulation of an ensemble of 1000 microscopically different 35nm gate length transistors is carried out to characterize the impact of statistical variability on the device characteristics. PSP, an advanced surface potential compact model that is selected as the next generation industry standard compact model, is targeted in this study. There are two challenges in development of a statistical compact model strategy. The first challenge is related to the selection of a small subset of statistical compact model parameters from the large number of compact model parameters. We propose a strategy to select 7 parameters from PSP to capture the impact of statistical variability on current-voltage characteristics. These 7 parameters are used in statistical parameter extraction with an average RMS error of less than 2.5% crossing the whole operation region of the simulated transistors. Moreover, the accuracy of statistical compact model extraction strategy in reproducing the MOSFET electrical figures of merit is studied in detail. The results of the statistical compact model extraction are used for statistical circuit simulation of a CMOS inverter under different input-output conditions and different number of statistical parameters. The second challenge in the development of statistical compact model strategy is associated with statistical generation of parameters preserving the distribution and correlation of the directly extracted parameters. By using advanced statistical methods such as principal component analysis and nonlinear power method, the accuracy of parameter generation is evaluated and compared to directly extracted parameter sets. Finally, an extension of the PSP statistical compact model strategy to different channel width/length devices is presented. The statistical trends of parameters and figures of merit versus channel width/length are characterized.
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Balaraman, Pradeep A. "Design, simulation and modelling of InP/GaAsSb/InP double heterojunction bipolar transistors." Cincinnati, Ohio : University of Cincinnati, 2003. http://rave.ohiolink.edu/etdc/view?acc%5Fnum=ucin1069275786.
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