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1

Wikipedia. "Triple modular redundancy." ACM SIGDA Newsletter 37, no. 24 (2007): 1. http://dx.doi.org/10.1145/1859863.1859864.

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Cașcaval, Petru, and Florin Leon. "Optimization Methods for Redundancy Allocation in Hybrid Structure Large Binary Systems." Mathematics 10, no. 19 (2022): 3698. http://dx.doi.org/10.3390/math10193698.

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This paper addresses the issue of optimal redundancy allocation in hybrid structure large binary systems. Two aspects of optimization are considered: (1) maximizing the reliability of the system under the cost constraint, and (2) obtaining the necessary reliability at a minimum cost. The complex binary system considered in this work is composed of many subsystems with redundant structure. To cover most of the cases encountered in practice, the following kinds of redundancy are considered: active redundancy, passive redundancy, hybrid standby redundancy with a hot or warm reserve and possibly o
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3

Arifeen, Tooba, Abdus Sami Hassan, and Jeong-A. Lee. "Approximate Triple Modular Redundancy: A Survey." IEEE Access 8 (2020): 139851–67. http://dx.doi.org/10.1109/access.2020.3012673.

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4

Philp, Kenneth W., and Norman D. Deans. "Comparative redundancy, an alternative to triple modular redundant system design." Microelectronics Reliability 37, no. 4 (1997): 581–85. http://dx.doi.org/10.1016/0026-2714(95)00217-0.

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5

Ammes, Gabriel, Paulo Francisco Butzen, André Inácio Reis, and Renato Perez Ribas. "A Survey of Approximate Triple Modular Redundancy." Journal of Integrated Circuits and Systems 19, no. 3 (2024): 1–14. https://doi.org/10.29292/jics.v19i3.970.

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The advancement of semiconductor technology has driven the continuous reduction in transistor sizes, resulting in significant improvements in both area efficiency and power consumption. However, these advancements have also increased susceptibility to faults caused by energetic particles. Triple modular redundancy (TMR) is a well-known logical masking technique that employs three copies of a given circuit alongside majority voters, guaranteeing 100\% single-fault coverage in the replicated modules. This reliability, however, comes at the cost of over 200\% area overhead. The approximate TMR (A
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6

Mukherjee, Atin, and Anindya Sundar Dhar. "Triple transistor based triple modular redundancy with embedded voter circuit." Microelectronics Journal 87 (May 2019): 101–9. http://dx.doi.org/10.1016/j.mejo.2019.03.014.

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7

Efimenko, E. V., and S. S. Fanchenko. "On FPGA SEU Mitigatiom under Irradiation Conditions." Nano- i Mikrosistemnaya Tehnika 25, no. 2 (2023): 78–81. http://dx.doi.org/10.17587/nmst.25.78-81.

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It is shown that in the case of soft errors even redundancy with casual choice for equiprobable configurations is equivalent to odd redundancy with less by one number of elements. The efficiencies of triple and quintuple modular redundancy are estimated.
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8

Beltrame, Giovanni. "Triple Modular Redundancy verification via heuristic netlist analysis." PeerJ Computer Science 1 (August 26, 2015): e21. http://dx.doi.org/10.7717/peerj-cs.21.

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9

Li, Yuanqing, Anselm Breitenreiter, Marko Andjelkovic, Junchao Chen, Milan Babic, and Milos Krstic. "Double cell upsets mitigation through triple modular redundancy." Microelectronics Journal 96 (February 2020): 104683. http://dx.doi.org/10.1016/j.mejo.2019.104683.

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10

Vial, J., A. Virazel, A. Bosio, P. Girard, C. Landrault, and S. Pravossoudovitch. "Is triple modular redundancy suitable for yield improvement?" IET Computers & Digital Techniques 3, no. 6 (2009): 581. http://dx.doi.org/10.1049/iet-cdt.2008.0127.

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11

Arifeen, Tooba, Abdus Hassan, and Jeong-A. Lee. "A Fault Tolerant Voter for Approximate Triple Modular Redundancy." Electronics 8, no. 3 (2019): 332. http://dx.doi.org/10.3390/electronics8030332.

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Approximate Triple Modular Redundancy has been proposed in the literature to overcome the area overhead issue of Triple Modular Redundancy (TMR). The outcome of TMR/Approximate TMR modules serves as the voter input to produce the final output of a system. Because the working principle of Approximate TMR conditionally allows one of the approximate modules to differ from the original circuit, it is critical for Approximate TMR that a voter not only be tolerant toward its internal faults but also toward faults that occur at the voter inputs. Herein, we present a novel compact voter for Approximat
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Garcia-Astudillo, Luis A., Luis Entrena, Almudena Lindoso, Honorio Martin, Pedro Martin-Holgado, and Mario Garcia-Valderas. "Analyzing Reduced Precision Triple Modular Redundancy Under Proton Irradiation." IEEE Transactions on Nuclear Science 69, no. 3 (2022): 470–77. http://dx.doi.org/10.1109/tns.2022.3152088.

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13

Şinca, R., and CS Szász. "Fault-tolerant digital systems development using triple modular redundancy." International Review of Applied Sciences and Engineering 8, no. 1 (2017): 3–7. http://dx.doi.org/10.1556/1848.2017.8.1.2.

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The paper presents a fault-tolerant digital system design and development strategy for high reliability hardware architectures implementation. Starting from the general consideration that digital hardware systems play a key role in a large scale of control systems implementation, a triple modular redundancy (TMR) solution it is proposed for development. For this reason, the well-known 1 bit majority voter configuration has been extended and generalized to the full control bus of a digital control system. Computer simulations show that the proposed hardware solution fulfills in all the theoreti
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14

Kubica, Marcin, and Robert Czerwinski. "Error Mitigation Methods for FSM Using Triple Modular Redundancy." Applied Sciences 15, no. 12 (2025): 6726. https://doi.org/10.3390/app15126726.

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In many areas of operation, application-specific logic implemented in FPGAs (Field Programmable Gate Arrays) is critical. In these situations, various mitigation methods are used to reduce or completely eliminate malfunctions in the circuit resulting from undesired physical phenomena (e.g., ionizing radiation). Such phenomena may occur, among others, in medicine, the military, nuclear power, and space systems. One of the most popular methods is the use of triple modular redundancy (TMR). Here, the FPGA provides a good basis for building TMR-based safety-critical systems due to its concurrent p
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15

Barbirotta, Marcello, Abdallah Cheikh, Antonio Mastrandrea, Francesco Menichelli, Marco Ottavi, and Mauro Olivieri. "Evaluation of Dynamic Triple Modular Redundancy in an Interleaved-Multi-Threading RISC-V Core." Journal of Low Power Electronics and Applications 13, no. 1 (2022): 2. http://dx.doi.org/10.3390/jlpea13010002.

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Functional safety is a key requirement in several application domains in which microprocessors are an essential part. A number of redundancy techniques have been developed with the common purpose of protecting circuits against single event upset (SEU) faults. In microprocessors, functional redundancy may be achieved through multi-core or simultaneous-multi-threading architectures, with techniques that are broadly classifiable as Double Modular Redundancy (DMR) and Triple Modular Redundancy (TMR), involving the duplication or triplication of architecture units, respectively. RISC-V plays an int
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16

Singh, Ranu. "Enhancing Fault Tolerance in Self-Healing Hardware Using Triple Modular Redundancy." International Scientific Journal of Engineering and Management 04, no. 04 (2025): 1–7. https://doi.org/10.55041/isjem02849.

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This paper presents a novel self-healing architecture that synergistically combines hardened Triple Modular Redundancy (TMR) with adaptive fault recovery to address reliability challenges in mission-critical electronic systems. The proposed solution integrates radiation-hardened DICE-based TMR cells, intelligent fault monitoring, and machine learning-driven prognostics within a hierarchical framework that optimizes temporal, spatial, and information redundancy domains. Key innovations include adaptive clock domain partitioning, genetic algorithm-based resource reallocation, and physics-informe
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17

Amin, Arslan Ahmed, and Khalid Mahmood-ul-Hasan. "Hybrid fault tolerant control for air–fuel ratio control of internal combustion gasoline engine using Kalman filters with advanced redundancy." Measurement and Control 52, no. 5-6 (2019): 473–92. http://dx.doi.org/10.1177/0020294019842593.

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In this paper, a hybrid fault tolerant control system is proposed for air–fuel ratio control of internal combustion gasoline engines based on Kalman filters and triple modular redundancy. Hybrid fault tolerant control system possesses properties of both active fault tolerant control system and passive fault tolerant control system. As part of active fault tolerant control system, fault detection and isolation unit is designed using Kalman filters to provide estimated values of the sensors to the engine controller in case of faults in the sensors. As part of passive fault tolerant control syste
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18

Kotliarov, V., A. Shevchenko, and V. Antsiferova. "Methods of protection of FPGA-based digital devices from ionizing radiation in space conditions." Modeling of systems and processes 17, no. 4 (2024): 59–67. https://doi.org/10.12737/2219-0767-2024-17-4-59-67.

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Semiconductor devices, such as programmable logic integrated circuits (PLICs), are exposed to ionizing radiation in space conditions, which leads to negative consequences, changes in electrical characteristics, appearance of parasitic currents and occurrence of single faults (SEU). In this paper, design-technological and hardware-software methods for improving the radiation resistance of FPGA-based digital devices are discussed. The design-technological methods focus on the use of shields made of materials with high absorption properties, the use of radiation-resistant manufacturing processes
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19

Yang, Wen Hui, Jing Wang, and Lian Fen Huang. "An SEU Hardened FIR Filter Based on Triple Modular Redundancy." Advanced Materials Research 219-220 (March 2011): 265–70. http://dx.doi.org/10.4028/www.scientific.net/amr.219-220.265.

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The finite impulse response (FIR) filters in the space radiation environment probably face the single event upset (SEU), making unexpected results. To avoid that situation, the traditional triple module redundancy (TMR) technology is usually applied. At the same time, however, it brings high cost of area and power. For this reason, an improved TMR (ITMR) structure for FIR filters is proposed in this paper. Simulation shows that the design can achieve the same performance with much less resources. Based on traditional technique TMR, the design reports an improved TMR (ITMR) structure by simplif
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20

Van Gils. "A Triple Modular Redundancy Technique Providing Multiple-Bit Error Protection Without Using Extra Redundancy." IEEE Transactions on Computers C-35, no. 7 (1986): 623–31. http://dx.doi.org/10.1109/tc.1986.1676803.

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21

Primananda, Rakhmadhany, Bayu Bagus Prabowo, Agung Setia Budi, Mahardeka Tri Ananta, and Zainul Abidin. "Performance Evaluation of Tilt-based Vehicle Accident Report System Using Triple Modular Redundancy." Journal of Information Technology and Computer Science 8, no. 3 (2023): 241–52. http://dx.doi.org/10.25126/jitecs.202383569.

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A vehicle accident report system was designed to detect accidents accurately and send message to related person. However, after accident, some components or modules can be damaged and it may cause failure of accident detection. Therefore, Triple Modular Redundancy (TMR) method was implemented in the system to mask faults within the modules and ensure the system to continue working. TMR is one of passive hardware redundancy methods. The system includes three MPU-6050 sensors functioning as vehicle tilt sensors to provide hardware redundancy, a TC9548A module serving as an I2C multiplexer, an Ar
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22

Zheng, Mei Song, Zi Long Wang, Ji Tu, Jun Ye Wang, and Li Jian Li. "Reliability Oriented Selective Triple Modular Redundancy for SRAM-Based FPGAs." Applied Mechanics and Materials 713-715 (January 2015): 1127–31. http://dx.doi.org/10.4028/www.scientific.net/amm.713-715.1127.

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This paper presents an improved approach to Triple Modular Redundancy (TMR) which concerns don’ t care bits of LUT configuration bits and hence classifies the set of LUTs into SEU-sensitive and SEU-insensitive. Unlike the full TMR approach, the improved approach only triplicates SEU-sensitive LUTs and can greatly reduces the area overhead while maintaining the circuit reliability. The proposed approach is thoroughly tested on the MCNC’91 benchmarks. Compare with the full TMR method the proposed scheme can reduce the area overhead by 26.6% on average, at the same time the circuit reliability on
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23

Balasubramanian, Padmanabhan, Douglas L. Maskell, and Nikos E. Mastorakis. "Quasi Delay Insensitive Majority Voters for Triple Modular Redundancy Applications." Applied Sciences 9, no. 24 (2019): 5400. http://dx.doi.org/10.3390/app9245400.

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Mission- and safety-critical applications tend to incorporate triple modular redundancy (TMR) in their hardware implementation to reliably withstand the fault or failure of any one of the function modules during normal operation, and the function module may be a circuit or a system. In a TMR implementation, two identical copies of a function module are used in addition to the original function module, and the correct operation of at least two function modules is required. In TMR, the corresponding primary outputs of the three function modules are combined using majority voters, which determine
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24

Basjaruddin, Noor Cholis, Yoga Priyana, and Kuspriyanto Kuspriyanto. "Fault Tolerant Air Bubble Sensor using Triple Modular Redundancy Method." TELKOMNIKA (Telecommunication Computing Electronics and Control) 11, no. 1 (2013): 71. http://dx.doi.org/10.12928/telkomnika.v11i1.884.

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25

She, Xiaoxuan, and K. S. McElvain. "Time Multiplexed Triple Modular Redundancy for Single Event Upset Mitigation." IEEE Transactions on Nuclear Science 56, no. 4 (2009): 2443–48. http://dx.doi.org/10.1109/tns.2009.2021656.

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26

Matrosova, A., S. Ostanin, and G. Goshin. "Deriving Approximate logic circuits for triple-modular redundancy (TMR) schemes." Izvestiya vysshikh uchebnykh zavedenii. Fizika 65, no. 4 (2022): 150–59. http://dx.doi.org/10.17223/00213411/65/4/150.

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27

Prathap, Dr Joseph Anthony, Maruthi Pottella, Srikanth Thammisetti, and Sainath Rachakonda. "FPGA based Design of Triple Modular Redundancy for Hybrid Digital Pulse Width Modulation Generator." Revista Gestão Inovação e Tecnologias 11, no. 2 (2021): 2249–59. http://dx.doi.org/10.47059/revistageintec.v11i2.1885.

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This paper proposes the Triple Modular Redundancy checker for the Hybrid Digital Pulse Width Modulation generator to verify the correctness in the output signal. The proposed design involves replicating the Hybrid Digital Pulse Width Modulation Generator thrice and the majority voter circuit validates the correct output by considering the two accurate signals out of the three outputs. The digital pulse width modulation generator is broadly classified as Counter-based Digital Pulse Width Modulation, Delay line-based Digital Pulse Width Modulation, and Hybrid-based Digital Pulse Width Modulation
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Boncalo, Oana, Alexandru Amaricai, and Zsófia Lendek. "Fault Tolerant Digital Data-Path Design via Control Feedback Loops." Electronics 9, no. 10 (2020): 1721. http://dx.doi.org/10.3390/electronics9101721.

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In this paper, we propose a novel fault tolerant methodology for digital pipelined data-paths called Control Feedback Loop Error Decimation (CFLED), that reduces the error magnitude at the outputs. The data-path is regarded from a control perspective as a process affected by perturbations or faults. Based on the corresponding dynamic model, we design feedback control loops with the goal of attenuating the effect of the faults on the output. The correction loops apply correction factors to selected data-path registers from blocks that have their execution rewinded. We apply the proposed methodo
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29

Hristova, Mariya. "Mathematical Modeling and Examination of the Effects of Structural Redundancy in а Class of Computer-Based Fault Tolerant Systems". Cybernetics and Information Technologies 16, № 2 (2016): 35–45. http://dx.doi.org/10.1515/cait-2016-0018.

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Abstract The present article models and examines k˅n systems, in particular Triple modular redundancy (2˅3) and 3˅5. The aim of the study is to derive mathematical models, which are used for determining the impact of structural redundancy (the number of channels n and the threshold of the quorum function k) on the reliability of the system. The probability of failure-free operation p and the Mean Time Between Failures (MTBF) are used as reliability indicators.
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Babić, Ivan, Aleksandar Miljković, Milan Čabarkapa, et al. "Triple Modular Redundancy Optimization for Threshold Determination in Intrusion Detection Systems." Symmetry 13, no. 4 (2021): 557. http://dx.doi.org/10.3390/sym13040557.

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This paper presents a novel approach for an Intrusion Detection System (IDS) based on one kind of asymmetric optimization which use any three already well-known IDS algorithms and Triple Modular Redundancy (TMR) algorithm together. Namely, a variable threshold which indicates an attack on an observed and protected network is determined by using all three values obtained with three known IDS algorithms i.e., on previously recorded data by making a decision by majority. For these algorithms authors used algorithm of k-nearest neighbors, cumulative sum algorithm, and algorithm of exponentially we
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31

Pham, H. "Optimal cost-effective design of triple-modular-redundancy-with-spares systems." IEEE Transactions on Reliability 42, no. 3 (1993): 369–74. http://dx.doi.org/10.1109/24.257819.

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32

Katkoori, Srinivas, Sheikh Ariful Islam, and Sujana Kakarla. "Partial evaluation based triple modular redundancy for single event upset mitigation." Integration 77 (March 2021): 167–79. http://dx.doi.org/10.1016/j.vlsi.2020.11.002.

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33

Banteywalu, Solomon, Baseem Khan, Valentijn De Smedt, and Paul Leroux. "A Novel Modular Radiation Hardening Approach Applied to a Synchronous Buck Converter." Electronics 8, no. 5 (2019): 513. http://dx.doi.org/10.3390/electronics8050513.

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Radiation and extreme temperature are the main inhibitors for the use of electronic devices in space applications. Radiation challenges the normal and stable operation of DC-DC converters, used as power supply for onboard systems in satellites and spacecrafts. In this situation, special design techniques known as radiation hardening or radiation tolerant designs have to be employed. In this work, a module level design approach for radiation hardening is addressed. A module in this sense is a constituent of a digital controller, which includes an analog to digital converter (ADC), a digital pro
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34

Maistrenko, Olexandr, V. Khoma, V. Kurban, and V. Prokopenko. "An Approach to Substantiating the Composition of the Reconnaissance-Firing Systems." Advances in Military Technology 19, no. 1 (2024): 119–29. http://dx.doi.org/10.3849/aimt.01816.

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An approach to justifying the composition of the reconnaissance-firing systems is proposed, which would consider the appropriate type of redundancy for each subsystem. Reconnaissance subsystems have a triple modular redundancy because this type of redundancy has a high degree of reliability of the received signal and a high probability of faultless work at the initial stage of operation. For the control subsystem, the most appropriate type of redundancy is passive redundancy, because this subsystem, as a rule, has the lowest failure rate among the elements of other subsystems. For the fire sup
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35

Jegadeeshwari, P., N. Kirubakaran, S. Bharath, G. Nalinashini, G. Mahalakshmi, and Deborah Sabhan. "Fault Identification in Modified Hybrid Digital Pulse Width Modulation using Triple Modular Redundancy." WSEAS TRANSACTIONS ON CIRCUITS AND SYSTEMS 22 (December 21, 2023): 141–51. http://dx.doi.org/10.37394/23201.2023.22.16.

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In this paper, the fault analysis is performed for the identification in the Modified Hybrid Digital Pulse Width Modulation by making use of the Triple Modular Redundancy method. The developed algorithm is real time implemented using the Xilinx Artix 7 FPGA device. The Modified Hybrid Digital Pulse Width Modulation is designed for the purpose of minimizing the Turn-ON and Turn-OFF delays in the triggering event of the generated Digital Pulse Width Modulation. Though additional compensatory circuits are added for the delay reduction, the area utilization is still low when implemented in FPGA de
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36

Pratt, Brian, Megan Fuller, and Michael Wirthlin. "Reduced-Precision Redundancy on FPGAs." International Journal of Reconfigurable Computing 2011 (2011): 1–12. http://dx.doi.org/10.1155/2011/897189.

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Reduced-precision redundancy (RPR) has been shown to be a viable alternative to triple modular redundancy (TMR) for digital circuits. This paper builds on previous research by offering a detailed analysis of the implementation of RPR on FPGAs to improve reliability in soft error environments. Example implementations and fault injection experiments demonstrate the cost and benefits of RPR, showing how RPR can be used to improve the failure rate by up to 200 times over an unmitigated system at costs less than half that of TMR. A novel method is also presented for improving the error-masking abil
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Chen, Yuan-Ho. "Dual-Mode FPGA-Based Triple-TDC With Real-Time Calibration and a Triple Modular Redundancy Scheme." Electronics 9, no. 4 (2020): 607. http://dx.doi.org/10.3390/electronics9040607.

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This paper proposes a triple time-to-digital converter (TDC) for a field-programmable gate array (FPGA) platform with dual operation modes. First, the proposed triple-TDC employs the real-time calibration circuit followed by the traditional tapped delay line architecture to improve the environmental effect for the application of multiple TDCs. Second, the triple modular redundancy scheme is used to deal with the uncertainty in the FPGA device for improving the linearity for the application of a single TDC. The proposed triple-TDC is implemented in a Xilinx Virtex-5 FPGA platform and has a time
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Yao, Rui, Qinqin Chen, Zengwu Li, and Yanmei Sun. "Multi-objective evolutionary design of selective triple modular redundancy systems against SEUs." Chinese Journal of Aeronautics 28, no. 3 (2015): 804–13. http://dx.doi.org/10.1016/j.cja.2015.03.005.

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39

Issa, Hossam K. A., Najlaa Al Dhumad, Yahya A. S. Zakur, and Abbas L. A. Kneehr. "A comparative statistical study for triple modular redundancy by using Fréchet distribution." IET Conference Proceedings 2024, no. 34 (2025): 475–78. https://doi.org/10.1049/icp.2025.0129.

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40

CHELLAPPAN, C., and G. VIJAYALAKSHMI. "DEPENDABILITY ANALYSIS OF HYBRID REDUNDANCY SYSTEMS USING FUZZY APPROACH." International Journal of Reliability, Quality and Safety Engineering 17, no. 04 (2010): 331–50. http://dx.doi.org/10.1142/s0218539310003846.

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With the increasing demand for high reliability in mission critical systems such as space shuttle, digital flight and real time control to mention a few, reliability analysis of fault tolerant systems continues to be the focus of most researchers. The reliability analysis of triple modular redundancy (TMR) and hybrid redundancy (TMR with spares) systems is in general carried out with the assumption of failure rate being precise. However, in practice failure rate is imprecise due to the uncertainties of system operation. In this paper, the dependability analysis of hybrid redundancy systems (HR
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Wang, Shixin, Lixin Wang, Yue Wang, Min Guo, and Yuanzhe Li. "A Novel Radiation-Hardened CCDM-TSPC Compared with Seven Well-Known RHBD Flip-Flops in 180 nm CMOS Process." Electronics 11, no. 19 (2022): 3098. http://dx.doi.org/10.3390/electronics11193098.

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Numerous radiation-hardened-by-design (RHBD) flip-flops have been developed to increase the dependability of digital chips for space applications over the past two decades. In this paper, the radiation immunity and performance of seven well-known RHBD flip-flops are discussed. A novel cross-connected dual modular redundant true single-phase clock (TSPC) D flip-flop (CCDM-TSPC) is proposed. The presented CCDM-TSPC replaces the typical master-slave D flip-flop (MS-DFF) with the fundamental TSPC structure to shorten the circuit’s propagation time. All sensitive points in the circuit are radiation
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42

Singh, Ranu, and Dr Monika Kapoor. "Self-Healing Hardware Systems: Integrating Fault Tolerance for Enhanced Reliability and Performance." International Scientific Journal of Engineering and Management 04, no. 04 (2025): 1–7. https://doi.org/10.55041/isjem02848.

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Self-healing hardware systems are designed to autonomously detect, diagnose, and recover from faults, ensuring uninterrupted operation and improved system reliability. Fault tolerance plays a crucial role in these systems by implementing strategies that mitigate failures and maintain performance in critical applications such as aerospace, medical devices, and autonomous systems. As hardware complexity increases, effective fault-tolerant mechanisms become essential to enhance resilience and longevity. This paper explores fundamental fault tolerance techniques in self-healing systems, including
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43

Sargunam, B., and R. Dhanasekaran. "Fault Tolerant Techniques for Finite Field Multipliers." Applied Mechanics and Materials 573 (June 2014): 209–14. http://dx.doi.org/10.4028/www.scientific.net/amm.573.209.

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The use of finite field multipliers in the critical applications like elliptic curve cryptography needs Concurrent Error Detection (CED) and correction at architectural level to provide high reliability. This paper discusses fault tolerant technique for polynomial representation based finite field multipliers. The detection and correction are done on-line. We use a combination of Double Modular Redundancy (DMR) and Concurrent Error Detection (CED) techniques. The fault tolerant finite field multiplier is coded in VHDL and simulated using Modelsim. Further, the proposed multiplier with fault to
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44

Balasubramanian, P., and N. E. Mastorakis. "Asynchronous quasi delay insensitive majority voters corresponding to quintuple modular redundancy for mission/safety-critical applications." PLOS ONE 15, no. 9 (2020): e0239395. http://dx.doi.org/10.1371/journal.pone.0239395.

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Electronic circuits and systems employed in mission- and safety-critical applications such as space, aerospace, nuclear plants etc. tend to suffer from multiple faults due to radiation and other harsh external phenomena. To overcome single or multiple faults from affecting electronic circuits and systems, progressive module redundancy (PMR) has been suggested as a potential solution that recommends the use of different levels of redundancy for the vulnerable portions of a circuit or system depending upon their criticality. According to PMR, triple modular redundancy (TMR) can be used where a s
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45

Issa, Hossam Kamel, and Abbas Lafta Kneehr. "Estimation of the parameters of triple modular redundancy system under step partially accelerated life tests using Frechet distribution." BIO Web of Conferences 97 (2024): 00153. http://dx.doi.org/10.1051/bioconf/20249700153.

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Triple modular redundancy system (TMR) is repetition of important components or functions of the system. It aims to increase the reliability and reducing the failure rate. This study is focused on the estimating of the distribution’s parameters of the "TMR system" under the partly life test with gradual stress, as it included every component in the system that follows The Frechete distribution. This research aimed to analysis the reliability of this triple modular system. The optimal time for stress change was determined using two criteria according to the accelerated stress strategy under the
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Hoque, Khaza Anuarul, Otmane Ait Mohamed, and Yvon Savaria. "Dependability modeling and optimization of triple modular redundancy partitioning for SRAM-based FPGAs." Reliability Engineering & System Safety 182 (February 2019): 107–19. http://dx.doi.org/10.1016/j.ress.2018.10.011.

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Anjankar, Shubham C., Mahesh T. Kolte, Ajinkya Pund, et al. "FPGA Based Multiple Fault Tolerant and Recoverable Technique Using Triple Modular Redundancy (FRTMR)." Procedia Computer Science 79 (2016): 827–34. http://dx.doi.org/10.1016/j.procs.2016.03.109.

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Zou, Jian‐xiao, Zheng‐qian Zhang, and Hong‐bing Xu. "Design of heartbeat invalidation detecting mechanism in triple modular redundancy multi‐machine system." COMPEL - The international journal for computation and mathematics in electrical and electronic engineering 29, no. 2 (2010): 495–504. http://dx.doi.org/10.1108/03321641011014959.

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Syukurilla, Merinda, Hariyanto Hariyanto, and Bowo Prakoso. "TRIPLE MODULAR REDUNDANCY DENGAN POWER SWITCHING OTOMATIS PADA SISTEM PENGUKURAN SUHU DAN KELEMBAPAN." Jurnal Infomedia 4, no. 2 (2020): 55. http://dx.doi.org/10.30811/jim.v4i2.1352.

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Pengamatan suhu dan kelembapan saat ini pada umumnya menggunakan sistem pengamatan tunggal, yaitu satu paramater cuaca hanya diamati/diukur oleh satu alat ukur saja, apabila alat ukur mengalami kegagalan fungsi maka alat ukur tidak dapat menghasilkan data. Penelitian ini menggunakan lima sensor suhu dan kelembapan DHT22 yang dihubungkan ke mikrokontroler ATMega2560 untuk pemrosesan lanjutan. Data yang telah diolah kemudian ditampilkan pada LCD dan PCdan disimpan di mikroSD. Power switching berjalan secara otomatis berdasarkan waktu yang merujuk pada tanda waktu RTC. Algoritma Triple Modular Re
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Xu, Hongzhi, Binlian Zhang, Chen Pan, and Keqin Li. "Energy-efficient triple modular redundancy scheduling on heterogeneous multi-core real-time systems." Journal of Parallel and Distributed Computing 191 (September 2024): 104915. http://dx.doi.org/10.1016/j.jpdc.2024.104915.

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