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Relevant bibliographies by topics / Turbo Encoder

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Academic literature on the topic 'Turbo Encoder'

Author: Grafiati

Published: 3 June 2025

Last updated: 1 August 2025

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Journal articles on the topic "Turbo Encoder"

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Siva Kumar, M., S. Syed Shameem, M. N. V. Raghu Sai, Dheeraj Nikhil, P. Kartheek, and K. Hari Kishore. "Efficient and low latency turbo encoder design using Verilog-Hdl." International Journal of Engineering & Technology 7, no. 1.5 (2017): 37. http://dx.doi.org/10.14419/ijet.v7i1.5.9119.

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Low complexity turbo-like codes based totally on the simple trellis or simple graph shape consequences in encoding with low complexity. Out of this Convolution, encoder and turbo codes are widely used due to the splendid errors control performance. The most famous communications encoding set of rules, the iterative deciphering calls for an exponential expansion in hardware complexity to acquire expanded encode accuracy. This paper makes a usage of Log-Map based Iterative decoding technique and specialty in the conclusion of the turbo encoder. The rapid codes are designed with the help of Recur

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Abbas, H. H., W. A. Mahmoud, and S. K. Omran. "THE EFFECT OF TRELLIS TERMINATION ON THE PERFORMANCE OF TURBO CODE." Journal of Engineering 9, no. 01 (2003): 25–34. http://dx.doi.org/10.31026/j.eng.2003.01.03.

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This paper introduces a new class of convolutional codes, which is called Turbo Code. Turbo Code was shown to achieve performance in terms of Bit-Error-Rate (BER), which is near Shannon limit. Turbo Code encoder is built using a parallel concatenation of two Recursive Systematic Convolutional (RSC) codes. In this paper, two solutions to the trellis termination problem are presented. The first solution encoder uses terminated Upper RSC encoder and unterminated Lower RSC encoder. On the other side, the second solution encoder uses terminated Upper and Lower RSC encoders. The performance of the t

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Sujatha, E., Dr C. Subhas, and Dr M. N. Giri Prasad. "High performance turbo encoder using mealy FSM state encoding technique." International Journal of Engineering & Technology 7, no. 3.3 (2018): 255. http://dx.doi.org/10.14419/ijet.v7i2.33.14163.

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Error-correction Coding plays a vital role to obtain efficient and high quality data transmission, in today’s high speed wireless communication system. Considering the requirement of using high data rates by Long Term Evolution (LTE) system, parallel concatenation of two convolutional encoders were used to design turbo encoder. In this research task a high speed turbo encoder, which is a key component in the transmitter of wireless communication System, with memory based interleaver has been designed and implemented on FPGA for 3rd Generation Partnership Project (3GPP) defined Long Term Evolut

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Krishna, T. Rama, T. Krishna Murthy, N. Vilasrao Sarode, P. Srilakshmi, and V. Geetha Sri. "Verilog HDL using LTE Implementation MAP Algorithm." International Journal of Innovative Research in Computer Science and Technology 10, no. 2 (2022): 611–14. http://dx.doi.org/10.55524/ijircst.2022.10.2.115.

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In many communication systems, turbo coding Techniques for Encoding and Decoding are employed to repair errors. As compared to other error correction codes, turbo codes provide great error correcting capabilities. For the implementation of the Turbo decoder, a Very Large Scale Integration (VLSI) architecture is suggested in this study. The Maximum-a-Posteriori (MAP) algorithm is employed at the decoder side, where soft-in-soft-out decoders, interleaves, and deinterleavers are all used. The usage of the MAP algorithm reduces the quantity of iterations necessary to decode the information bits be

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Teimouri, Mehdi, and Ahmadreza Hedayat. "Parameter Estimation of Turbo Code Encoder." Advances in Electrical Engineering 2014 (September 18, 2014): 1–6. http://dx.doi.org/10.1155/2014/282108.

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The problem of reconstruction of a channel code consists of finding out its design parameters solely based on its output. This paper investigates the problem of reconstruction of parallel turbo codes. Reconstruction of a turbo code has been addressed in the literature assuming that some of the parameters of the turbo encoder, such as the number of input and output bits of the constituent encoders and puncturing pattern, are known. However in practical noncooperative situations, these parameters are unknown and should be estimated before applying reconstruction process. Considering such practic

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Balta, Horia, and Maria Balta. "8 States Triple Binary Convolutional Encoders for the Construction of Turbo Codes." Advanced Engineering Forum 8-9 (June 2013): 13–20. http://dx.doi.org/10.4028/www.scientific.net/aef.8-9.13.

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This paper presents the rate 3/4 (triple-binary) memory 3 recursive and systematic convolutional encoders with a single shift register (TBEm3) implemented in the observer canonical form with the best frame error rate (FER) versus signal to noise ratio (SNR) performance in configuration turbo (parallel concatenated) The triple-binary turbo-codes (TBTC) were compared in terms of performance with the turbo-codes (TC) from the actual standards of communications, at the same turbo-coding rates of 3/5 and 3/4. Besides the very good FER/SNR performance, the TBTC present several other advantages that

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Bogawar, Mrs K. M., Ms Sharda Mungale, and Dr Manish Chavan. "Implementation of Turbo Encoder and Decoder." International Journal of Engineering Trends and Technology 8, no. 2 (2014): 73–76. http://dx.doi.org/10.14445/22315381/ijett-v8p214.

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Sokorynska, Natalia, Yurii Posternak, Liliia Zaitseva, and Oleksandr Rudenok. "THE METHOD OF ADAPTIVE SELECTION OF THE SIZE OF TURBO CODE STATE DIAGRAMS IN 5G AND IOT SYSTEMS." Technical Sciences and Technologies, no. 2(32) (2023): 249–60. http://dx.doi.org/10.25140/2411-5363-2023-2(32)-249-260.

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The article proposes a method for optimizing the operation of the turbocode encoder/decoder in 5G and IoT systems due to the adaptive selection of the state diagram size using the proposed decoding uncertainty indicator.The principles of forming state diagrams of the turbo code encoder and decoder are considered, and the uncertainty of data decoding is clarified. Using the a priori and a posteriori data of the turbo code decoder, an algorithm for changing the state diagram of the turbo code encoder/decoder is proposed.The essence of the method is to optimize the operation of the turbo code enc

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V, S. Sneha, and Joe Nithin. "Implementation of Turbo Coder Using Verilog HDL for LTE." International Journal of Innovative Science and Research Technology 7, no. 7 (2022): 380–83. https://doi.org/10.5281/zenodo.6930806.

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In many communication systems, turbo codesare employed to repair errors. Turbo codes demonstrate high error correction when compared to other error correction methods. A Very Large Scale Integration is suggested in this study. VLSI architecture for the Turbo encoder implementation, Interleaves and de interleaves, and soft-in-soft-out decoders are employed. This study employs a technique that for the encoder portion, includes two recursive systematic convolutional (RSC) encoders , a Block interleaver and the decoder part involve Soft Output Virtebi Algorithm(SOVA) decoder. Aconvolutional code i

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Vittapu, Sravan Kumar, Ravichand Sankuru, Chepuri Rakshana, Beeradhar Mahesh, and Amudha Naga Teja. "QCA-based design of polar encoder circuit." Characterization and Application of Nanomaterials 7, no. 2 (2024): 6401. http://dx.doi.org/10.24294/can.v7i2.6401.

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In the last few decades, nano-electronic devices have been manufactured using VLSI technology. Over the past four decades, IC technology has been growing by using CMOS technology successfully, but this CMOS technology has a scaling limitation. To overcome this scaling limitation, QCA (quantum dot cellular automata) emerges as an alternative. This work is the implementation of the design of a polar encoder using QCA technology. This design is a single-layered and even bottom-up approach technique. The Polar code is more efficient and has less energy dissipation compared to the turbo code and co

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Dissertations / Theses on the topic "Turbo Encoder"

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Padinjare, Sainath. "VLSI implementation of a turbo encoder/decoder /." Internet access available to MUN users only, 2003. http://collections.mun.ca/u?/theses,162832.

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Luthra, Nikhil. "Finite State Machine Implementation of a Turbo Encoder." Ohio University / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1134416479.

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Šedý, Jakub. "Turbo konvoluční a turbo blokové kódy." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2011. http://www.nusl.cz/ntk/nusl-219287.

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The aim is to explain the Turbo convolutional and block turbo codes and decoding the secure message. The practical part focuses on the design of a demonstration program in Matlab. The work is divided into four parts. The first two deal with theoretical analysis of coding and decoding. The third section contains a description created a demonstration program that allows you to navigate the process of encoding and decoding. The fourth is devoted to simulation and performance of turbo codes.

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Ploštica, Stanislav. "Turbo kódy a jejich aplikace." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-218201.

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This Diploma thesis aims to explain the data coding using turbo codes. These codes belong to the group of error correction codes. We can reach the high efficiency using these codes. The first part describes process of encoding and decoding. There are describes parts of encoder and decoder. Principle of encoding and decoding demonstrate a simple example. The end of this part contains description of two most frequently used decoding algorithms (SOVA and MAP). The second part contains description of computer program that was made for using as teaching aid. This program was created in Matlab GUI.

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Anitei, Irina. "Circular Trellis based Low Density Parity Check Codes." Ohio University / OhioLINK, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1226513009.

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Ferreira, Nathan. "An Assessment of Available Software Defined Radio Platforms Utilizing Iterative Algorithms." Digital WPI, 2015. https://digitalcommons.wpi.edu/etd-theses/728.

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As the demands of communication systems have become more complex and varied, software defined radios (SDR) have become increasingly popular. With behavior that can be modified in software, SDR's provide a highly flexible and configurable development environment. Despite its programmable behavior, the maximum performance of an SDR is still rooted in its hardware. This limitation and the desire for the use of SDRs in different applications have led to the rise of various pieces of hardware to serve as SDR platforms. These platforms vary in aspects such as their performance limitations, implement

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Trčka, Tomáš. "Turbokódy a jejich použití ve sdělovacích systémech." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2008. http://www.nusl.cz/ntk/nusl-217561.

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This Diploma thesis deals with Turbo code problems. The Turbo codes belong to the group of error correction codes, sometimes referred to as forward error correcting (FEC) codes or channel codes. This thesis can be thematically divided into two basic parts. The first part describes turbo code encoder and decoder block diagram with the illustration of two most frequently used iterative decoding algorithms (SOVA and MAP). The end of this part contains best known turbo codes, which are used in present communication systems. The second part pursues simulation results for the turbo codes using Binar

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XIAO, GUOPING. "VLSI architectures design for encoders of High Efficiency Video Coding (HEVC) standard." Doctoral thesis, Politecnico di Torino, 2016. http://hdl.handle.net/11583/2644058.

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The growing popularity of high resolution video and the continuously increasing demands for high quality video on mobile devices are producing stronger needs for more efficient video encoder. Concerning these desires, HEVC, a newest video coding standard, has been developed by a joint team formed by ISO/IEO MPEG and ITU/T VCEG. Its design goal is to achieve a 50% compression gain over its predecessor H.264 with an equal or even higher perceptual video quality. Motion Estimation (ME) being as one of the most critical module in video coding contributes almost 50%-70% of computational complexity

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Wang, Jan-Zen, and 王建仁. "Implementation of the 3GPP-LTE Turbo Encoder." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/38976640765030474690.

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碩士<br>國立中興大學<br>電機工程學系所<br>97<br>In the 3GPP-LTE (Third Generation Partnership Project - Long Term Evolution), channel coding technique is framed to employ the turbo code, which is skilled in error correction. With the development of the mobile communication systems, the uplink and downlink speeds are 50Mbps and 100Mbps, respectively. It makes the multimedia functions in the wireless communication devices more flexible. The 3GPP-LTE turbo code, dividing into 188 levels, has the block sizes between 40 and 6144 bits. The interleaver address for every block is immediately computed by the interl

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Banakar, Rajeshwari M. "Low power design methodology for turbo encoder and decoder." Thesis, 2004. http://localhost:8080/xmlui/handle/12345678/5557.

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Books on the topic "Turbo Encoder"

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A, Freeman Kerry, Rivele Richard J, and Chilton Book Company, eds. Chilton's repair & tune-up guide, Renault 1975-85: All U.S. and Canadian models of R-12, R-15, R-17, R-18, R-18i, Alliance, Encore, Fuego, Fuego Turbo, Gordini, LeCar, Sport Wagon. Chilton Book Co., 1985.

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Investigation of different constituent encoders in a turbo-code scheme for reduced decoder complexity: Technical report. National Aeronautics and Space Administration, 1998.

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Book chapters on the topic "Turbo Encoder"

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Vlădeanu, Călin, and Safwan El Assad. "Parallel Turbo Trellis-Coded Modulation Schemes Using Nonlinear Digital Encoders." In Nonlinear Digital Encoders for Data Communications. John Wiley & Sons, Inc., 2014. http://dx.doi.org/10.1002/9781118815649.ch4.

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N., Manjunatha K., Raghu N., and Kiran B. "Evalutation of Turbo Decoder Performance Through Software Reference Model." In Advances in Wireless Technologies and Telecommunication. IGI Global, 2022. http://dx.doi.org/10.4018/978-1-7998-6988-7.ch011.

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Turbo encoder and decoder are two important blocks of long-term evolution (LTE) systems, as they address the data encoding and decoding in a communication system. In recent years, the wireless communication has advanced to suit the user needs. The power optimization can be achieved by proposing early termination of decoding iteration where the number of iterations is made adjustable which stops the decoding as it finishes the process. Clock gating technique is used at the RTL level to avoid the unnecessary clock given to sequential circuits; here clock supplies are a major source of power diss

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Manjunatha K. N., Raghu N., and Kiran B. "Design of Efficient VLSI Architecture and Implementation of Power-Optimized Turbo Decoder for LTE Networks." In Role of 6G Wireless Networks in AI and Blockchain-Based Applications. IGI Global, 2023. http://dx.doi.org/10.4018/978-1-6684-5376-6.ch006.

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This chapter explores model, design, and application-specific integrated circuit (ASIC) implementation to optimize turbo decoder using standard cell library of complementary metal oxide semiconductor (CMOS). Various constraints like channel noise, iteration, and frame length performance are analyzed and estimated through reference models. Register transfer language (RTL) model for encoder and decoder are simulated and synthesized by hardware description language (HDL). The ASIC implementation with various performance parameters like power and speed are considered to evaluate the proposed algor

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K. N., Manjunatha, Raghu N., and Kiran B. "Design of Efficient VLSI Architecture and Implementation of Power-Optimized Turbo Decoder for LTE Networks." In Handbook of Research on Emerging Designs and Applications for Microwave and Millimeter Wave Circuits. IGI Global, 2023. http://dx.doi.org/10.4018/978-1-6684-5955-3.ch015.

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This chapter is about model, design, and application specific integrated circuit (ASIC) implementation to optimize turbo decoder using standard cell library of complementary metal oxide semiconductor (CMOS). Various constraints like channel noise, number of iterations, and frame length performance are analyzed and estimated through reference models. Register transfer language (RTL) model for encoder and decoder is developed, simulated, and synthesized by hardware description language (HDL). The ASIC implementation with various performance parameters like power and speed are considered to evalu

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Belfathi, Anas, Nicolas Hernandez, and Laura Monceaux. "Harnessing GPT-3.5-Turbo for Rhetorical Role Prediction in Legal Cases." In Frontiers in Artificial Intelligence and Applications. IOS Press, 2023. http://dx.doi.org/10.3233/faia230964.

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We propose a comprehensive study of one-stage elicitation techniques for querying a large pre-trained generative transformer (GPT-3.5-turbo) in the rhetorical role prediction task of legal cases. This task is known as requiring textual context to be addressed. Our study explores strategies such as zero-few shots, task specification with definitions and clarification of annotation ambiguities, textual context and reasoning with general prompts and specific questions. We show that the number of examples, the definition of labels, the presentation of the (labelled) textual context and specific qu

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Conference papers on the topic "Turbo Encoder"

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Gopinathan, Yadukrishnan, Swathi Sekhar, B. Yamuna, and Karthi Balasubramanian. "A Coarse Grained Reconfigurable Architecture for the Realization of Turbo Encoder." In 2024 IEEE Region 10 Symposium (TENSYMP). IEEE, 2024. http://dx.doi.org/10.1109/tensymp61132.2024.10751810.

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Tripathy, Aruna, Sant Saran Pathak, and Saswat Chakrabarti. "A Turbo Equalizer with RQLI Encoder." In 2007 International Symposium on Signals, Systems and Electronics. IEEE, 2007. http://dx.doi.org/10.1109/issse.2007.4294470.

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Kohan, N., A. Zolghadrasli, and H. Kamrani. "Performance comparison of turbo equalizers with convolutional encoder/decoder and turbo encoder/decoder in wireless systems." In 2010 12th IEEE International Conference on Communication Technology (ICCT). IEEE, 2010. http://dx.doi.org/10.1109/icct.2010.5688799.

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Debessu, Yonas G., Hsiao-Chun Wu, Hong Jiang, and Shih Yu Chang. "Blind encoder parameter estimation for turbo codes." In GLOBECOM 2012 - 2012 IEEE Global Communications Conference. IEEE, 2012. http://dx.doi.org/10.1109/glocom.2012.6503782.

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Katsiotis, Alexandros, Nicholas Kolokotronis, and Nicholas Kalouptsidis. "Secure encoder designs based on turbo codes." In 2015 IEEE International Conference on Signal Processing for Communications (ICC). IEEE, 2015. http://dx.doi.org/10.1109/icc.2015.7249001.

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Krishnan, Saranya P., and K. Gnana Sheela. "Performance analysis of turbo encoder in digital communication." In 2015 Global Conference on Communication Technologies (GCCT). IEEE, 2015. http://dx.doi.org/10.1109/gcct.2015.7342735.

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Luo Yan-fen, Wan Guo-chun, and Dong De-cun. "Improvement of the design of interleaver in turbo encoder." In 2009 4th IEEE Conference on Industrial Electronics and Applications (ICIEA). IEEE, 2009. http://dx.doi.org/10.1109/iciea.2009.5138218.

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Fleah, Maha Ahmed, and Qusay F. Al-Doori. "Design and Implementation of Turbo encoder/ decoder using FPGA." In 2019 First International Conference of Computer and Applied Sciences (CAS). IEEE, 2019. http://dx.doi.org/10.1109/cas47993.2019.9075589.

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Kumar, Palle Prasanth, K. V. Gowreesrinivas, and P. Samundiswary. "Design and analysis of turbo encoder using Xilinx ISE." In 2016 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT). IEEE, 2016. http://dx.doi.org/10.1109/iccicct.2016.7987968.

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Azizi, Leila, Vahid Meghdadi, and Jean Pierre Cances. "Turbo-Encoder Designe for Parallel Concatenated Trellis-Coded Modulation." In 20th AIAA International Communication Satellite Systems Conference and Exhibit. American Institute of Aeronautics and Astronautics, 2002. http://dx.doi.org/10.2514/6.2002-1900.

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