Journal articles: 'Turbo Encoder'

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Siva Kumar, M., S. Syed Shameem, M. N. V. Raghu Sai, Dheeraj Nikhil, P. Kartheek, and K. Hari Kishore. "Efficient and low latency turbo encoder design using Verilog-Hdl." International Journal of Engineering & Technology 7, no. 1.5 (2017): 37. http://dx.doi.org/10.14419/ijet.v7i1.5.9119.

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Low complexity turbo-like codes based totally on the simple trellis or simple graph shape consequences in encoding with low complexity. Out of this Convolution, encoder and turbo codes are widely used due to the splendid errors control performance. The most famous communications encoding set of rules, the iterative deciphering calls for an exponential expansion in hardware complexity to acquire expanded encode accuracy. This paper makes a usage of Log-Map based Iterative decoding technique and specialty in the conclusion of the turbo encoder. The rapid codes are designed with the help of Recursive Systematic Convolution and are separated thru interleave, which (thing used to rearrange the bit collection) plays an essential position within the encoding technique. This paper offers the design of the parallel connection of Recursive Systematic Convolution (RSC) encoders and interleave to restrict postpone, results to form a turbo Encoder. The turbo Encoder is designed by way of Verilog-HDL and Synthesized through Xilinx ISE

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Abbas, H. H., W. A. Mahmoud, and S. K. Omran. "THE EFFECT OF TRELLIS TERMINATION ON THE PERFORMANCE OF TURBO CODE." Journal of Engineering 9, no. 01 (2003): 25–34. http://dx.doi.org/10.31026/j.eng.2003.01.03.

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This paper introduces a new class of convolutional codes, which is called Turbo Code. Turbo Code was shown to achieve performance in terms of Bit-Error-Rate (BER), which is near Shannon limit. Turbo Code encoder is built using a parallel concatenation of two Recursive Systematic Convolutional (RSC) codes. In this paper, two solutions to the trellis termination problem are presented. The first solution encoder uses terminated Upper RSC encoder and unterminated Lower RSC encoder. On the other side, the second solution encoder uses terminated Upper and Lower RSC encoders. The performance of the two solutions is tested for different circumstances and the results are interesting.

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Sujatha, E., Dr C. Subhas, and Dr M. N. Giri Prasad. "High performance turbo encoder using mealy FSM state encoding technique." International Journal of Engineering & Technology 7, no. 3.3 (2018): 255. http://dx.doi.org/10.14419/ijet.v7i2.33.14163.

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Error-correction Coding plays a vital role to obtain efficient and high quality data transmission, in today’s high speed wireless communication system. Considering the requirement of using high data rates by Long Term Evolution (LTE) system, parallel concatenation of two convolutional encoders were used to design turbo encoder. In this research task a high speed turbo encoder, which is a key component in the transmitter of wireless communication System, with memory based interleaver has been designed and implemented on FPGA for 3rd Generation Partnership Project (3GPP) defined Long Term Evolution – Advanced (LTE-A) standard using Finite state Machine(FSM) encoding technique. Memory based quadratic permutation polynomial (QPP) interleaver shuffles a sequence of binary data and supports any of the 188 block sizes from N= 40 to N= 6144. The proposed turbo encoder is implemented using 28nm CMOS technology and achieved 300 Mbps data rate by using 1% of available total hardware logic. By using the proposed technique, encoded data can be released continuously with the help of two parallel memories to write/read the input using pipelining concept.

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Krishna, T. Rama, T. Krishna Murthy, N. Vilasrao Sarode, P. Srilakshmi, and V. Geetha Sri. "Verilog HDL using LTE Implementation MAP Algorithm." International Journal of Innovative Research in Computer Science and Technology 10, no. 2 (2022): 611–14. http://dx.doi.org/10.55524/ijircst.2022.10.2.115.

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In many communication systems, turbo coding Techniques for Encoding and Decoding are employed to repair errors. As compared to other error correction codes, turbo codes provide great error correcting capabilities. For the implementation of the Turbo decoder, a Very Large Scale Integration (VLSI) architecture is suggested in this study. The Maximum-a-Posteriori (MAP) algorithm is employed at the decoder side, where soft-in-soft-out decoders, interleaves, and deinterleavers are all used. The usage of the MAP algorithm reduces the quantity of iterations necessary to decode the information bits being transferred. This research employs a system for the encoder component that consists of two recursive convolutional encoders and a pseudorandom interleaver on the encoder side. Tools from Octave and Xilinx Vivado are used for the Turbo encoding and decoding. The system is synthesised and implemented using a specialised integrated circuit.

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Teimouri, Mehdi, and Ahmadreza Hedayat. "Parameter Estimation of Turbo Code Encoder." Advances in Electrical Engineering 2014 (September 18, 2014): 1–6. http://dx.doi.org/10.1155/2014/282108.

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The problem of reconstruction of a channel code consists of finding out its design parameters solely based on its output. This paper investigates the problem of reconstruction of parallel turbo codes. Reconstruction of a turbo code has been addressed in the literature assuming that some of the parameters of the turbo encoder, such as the number of input and output bits of the constituent encoders and puncturing pattern, are known. However in practical noncooperative situations, these parameters are unknown and should be estimated before applying reconstruction process. Considering such practical situations, this paper proposes a novel method to estimate the above-mentioned code parameters. The proposed algorithm increases the efficiency of the reconstruction process significantly by judiciously reducing the size of search space based on an analysis of the observed channel code output. Moreover, simulation results show that the proposed algorithm is highly robust against channel errors when it is fed with noisy observations.

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Balta, Horia, and Maria Balta. "8 States Triple Binary Convolutional Encoders for the Construction of Turbo Codes." Advanced Engineering Forum 8-9 (June 2013): 13–20. http://dx.doi.org/10.4028/www.scientific.net/aef.8-9.13.

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This paper presents the rate 3/4 (triple-binary) memory 3 recursive and systematic convolutional encoders with a single shift register (TBEm3) implemented in the observer canonical form with the best frame error rate (FER) versus signal to noise ratio (SNR) performance in configuration turbo (parallel concatenated) The triple-binary turbo-codes (TBTC) were compared in terms of performance with the turbo-codes (TC) from the actual standards of communications, at the same turbo-coding rates of 3/5 and 3/4. Besides the very good FER/SNR performance, the TBTC present several other advantages that recommend them: an effect error floor low, latency diminution, more compact blocks lower delay caused by interleaving, the possibility to connect the encoder TBTC to modulation blocks of higher order.

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Bogawar, Mrs K. M., Ms Sharda Mungale, and Dr Manish Chavan. "Implementation of Turbo Encoder and Decoder." International Journal of Engineering Trends and Technology 8, no. 2 (2014): 73–76. http://dx.doi.org/10.14445/22315381/ijett-v8p214.

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Sokorynska, Natalia, Yurii Posternak, Liliia Zaitseva, and Oleksandr Rudenok. "THE METHOD OF ADAPTIVE SELECTION OF THE SIZE OF TURBO CODE STATE DIAGRAMS IN 5G AND IOT SYSTEMS." Technical Sciences and Technologies, no. 2(32) (2023): 249–60. http://dx.doi.org/10.25140/2411-5363-2023-2(32)-249-260.

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The article proposes a method for optimizing the operation of the turbocode encoder/decoder in 5G and IoT systems due to the adaptive selection of the state diagram size using the proposed decoding uncertainty indicator.The principles of forming state diagrams of the turbo code encoder and decoder are considered, and the uncertainty of data decoding is clarified. Using the a priori and a posteriori data of the turbo code decoder, an algorithm for changing the state diagram of the turbo code encoder/decoder is proposed.The essence of the method is to optimize the operation of the turbo code encoder and decoder by using adaptive selection of the state diagram size using the proposed decoding uncertainty indicator. The implementation of the method will allow to increase the given indicators of reliability of information without reducing the bandwidth of systems and networks of wireless data transmission systems.In contrast to the known results, depending on the signal-to-noise ratio in the channel and the values of the normalized number of sign changes of the a posteriori-prior logarithmic relations of the likelihood functions about the transmitted data bits of the turbo code decoder, an adaptive selection of the state diagram size of the TC encoder/decoder is made.The simulation analysis shows that in order to ensure the given indicators of information reliability, the method selects a rational size of the TC encoder/decoder state diagram, which is confirmed by comparison with other simulation results.The method can be used together with other methods of adaptation, for example, with adaptation of coding speed, poly-nomials of TC component codes, in systems with multi-parameter adaptation operating under conditions of a priori uncertainty. The types of virtual agents in social networks are distinguished: primary source, bot accounts, troll accounts, real people

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V, S. Sneha, and Joe Nithin. "Implementation of Turbo Coder Using Verilog HDL for LTE." International Journal of Innovative Science and Research Technology 7, no. 7 (2022): 380–83. https://doi.org/10.5281/zenodo.6930806.

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In many communication systems, turbo codesare employed to repair errors. Turbo codes demonstrate high error correction when compared to other error correction methods. A Very Large Scale Integration is suggested in this study. VLSI architecture for the Turbo encoder implementation, Interleaves and de interleaves, and soft-in-soft-out decoders are employed. This study employs a technique that for the encoder portion, includes two recursive systematic convolutional (RSC) encoders , a Block interleaver and the decoder part involve Soft Output Virtebi Algorithm(SOVA) decoder. Aconvolutional code is a sort of error-correcting code used incommunicationsthat creates parity signals by sliding a Boolean polynomial function across a data stream. The word "convolutional coding" comes from the sliding application, which depicts the encoder's "convolution" acrossthe data. Convolutional codes sliding properties make it easier to do trellis decoding with a time-invariant trellis. Convolutional codes can be maximum-likelihood soft-decision decoded with a manageable level of complexity thanks to time invariant trellis decoding. The Viterbi algorithm, also known as the Viterbi path, is a dynamic programming approach for determining the greatest probability estimate of the most probable series of hidden states that leads to a series of observed events. The quantity of times needed to decode the bits is been reduced in this methodology. A block interleaver accepts a set of symbols and rearranges them, without repeating or omitting any of the symbols in the set. The number of symbols in each set is fixed for a given interleaver. Turbo encoding, as well as decoding simulations are done using Modelsim software.

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Vittapu, Sravan Kumar, Ravichand Sankuru, Chepuri Rakshana, Beeradhar Mahesh, and Amudha Naga Teja. "QCA-based design of polar encoder circuit." Characterization and Application of Nanomaterials 7, no. 2 (2024): 6401. http://dx.doi.org/10.24294/can.v7i2.6401.

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In the last few decades, nano-electronic devices have been manufactured using VLSI technology. Over the past four decades, IC technology has been growing by using CMOS technology successfully, but this CMOS technology has a scaling limitation. To overcome this scaling limitation, QCA (quantum dot cellular automata) emerges as an alternative. This work is the implementation of the design of a polar encoder using QCA technology. This design is a single-layered and even bottom-up approach technique. The Polar code is more efficient and has less energy dissipation compared to the turbo code and conventional codes (CC). This design explores (8:4). A Polar encoder is designed to have fewer cells and area compared to the turbo encoder and conventional encoder. The proposed design is implemented using the QCA designer tool.

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.A, Rajagopal, Karibasappa .K, and Vasundara Patel K.S. "FPGA Implementation of a Modified Turbo Encoder." International Journal of Computer Applications 116, no. 6 (2015): 27–29. http://dx.doi.org/10.5120/20341-2165.

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Sidorenko, A. A. "Decoding of the turbo code created on the basis of the block code using the syndrome grid." Journal of Physics: Conference Series 2388, no. 1 (2022): 012029. http://dx.doi.org/10.1088/1742-6596/2388/1/012029.

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Abstract Turbo codes came closest to the Shannon limit. They can be built on the basis of both block and convolutional codes. When decoding a block code using a syndrome lattice, it is possible to use well-studied algorithms for decoding convolutional codes with soft input and soft output. This publication demonstrates the application of the maximum a posteriori information decoding algorithm. The process of decoding a code sequence of a turbo code generated by an encoder consisting of two encoders of a block code and an interleaving device, in the presence of three errors in the received code word, is considered in detail.

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Maity, Niladri Pratap, and Reshmi Maity. "Low Power Design of near Shannon Limit Coding: Turbo Codes." Advanced Materials Research 433-440 (January 2012): 7213–17. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.7213.

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In this paper secure channel coding schemes based on Turbo Codes are suggested and implemented. The design of encoder using Recursive Systematic Code (RSC) with puncturing techniques is presented. Component decoders are implemented by Log-Maximum-a-Posteriori (Log-MAP) algorithm and thereafter implementation of overall turbo decoder is illustrated in detail. Finally we have investigated low power design technique of the turbo decoder design with variable iteration techniques.

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Alebady, Wallaa Yaseen, and Ahmed Abdulkadhim Hamad. "Turbo polar code based on soft-cancelation algorithm." Indonesian Journal of Electrical Engineering and Computer Science 26, no. 1 (2022): 521–30. https://doi.org/10.11591/ijeecs.v26.i1.pp521-530.

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Since the first polar code of Arikan, the research field of polar codes has been continuously active. Improving the performance of finite-code-length polar codes is the central point of this field. In this paper, the parallel concatenated systematic turbo polar code (PCSTPC) model has been proposed to improve the polar codes performance in a finite-length regime. On the encoder side, two systematic polar encoders are used as constituent encoders. While on the decoder side, two single iteration soft-cancelation (SCAN) decoders are used as soft-in-soft-out (SISO) algorithms inside the iterative decoding algorithm of the parallel concatenated systematic turbo polar code (PCSTPC). As compared to the optimized turbo polar code with SCAN and BP decoders, the proposed model has about 0.2 dB and 0.48 dB gains at BER=10(-4), respectively, in addition to 0.1 dB, 0.31 dB, and 0.72 dB gains over the TPC-SSCL32, TPC-SSCL16, and TPC-SSCL8 models, respectively. Moreover, the proposed model offers less complexity in comparison with other models, therefore requiring less memory and time resources.

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Singh, Dr Balkar. "TURBO CODE RE-ANALYSIS USING DIFFERENT ALGORITHMS." International Journal of Engineering Science and Humanities 14, Special Issue 1 (2024): 27–31. http://dx.doi.org/10.62904/k2aydz44.

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Turbo codes are a novel type of forward error correcting codes that have proved to give a perfor- mance close to the channel capacity as proposed by C. Shannon. The parallel concatenation of two identical recursive convolutional encoders that are spaced apart by an interleaver results in a turbo code encoder. The two cascaded decoding blocks used by the turbo code decoder pass along a priori knowledge generated by each block in turn. The decoding approach has the advantage of working iteratively, allowing for an increase in total performance. This study does a performance analysis of turbo codes. The performance study includes two decoding methods: the soft output Viterbi algo- rithm (SOVA), which uses the log-likelihood ratio to produce soft outputs, and the log maximum a posteriori probability (Log-MAP) algorithm. Both punctured and unpunctured codes are studied to determine the impact of utilizing various decoding algorithms. The performance of the two various decoding techniques is then contrasted in terms of bit error rate. MATLAB tools are utilized to per- form simulations.

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Xu, Jin, Ying Zhao, and Shu Qiang Duan. "Research and Realization by FPGA of Turbo Codes." Advanced Materials Research 588-589 (November 2012): 765–68. http://dx.doi.org/10.4028/www.scientific.net/amr.588-589.765.

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Turbo Code is a channel coding with excellent error-correcting performance in the condition of low noise-signal ratio.It has a superior decoding performance approaching the Shannon limit by adopting the random coding and decoding. This paper focuses on Turbo code and its implementation with FPGA and deeply analyzes the decoding theory and algorithm of Turbo code. Firstly, it analyzes the decoding theory of Turbo code. Then, it discusses key issues in the process of implementation with the most excellent and complicated Max—log—MAP algorithm. At last, it ends up with the Turbo encoder and decoding algorithm which hardware is successfully implemented finally.

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Stanchev, Georgi, and Vanya Katsarska. "APPLICATION OF TURBO CODES IN UNMANNED AERIAL SYSTEMS." ENVIRONMENT. TECHNOLOGY. RESOURCES. Proceedings of the International Scientific and Practical Conference 2 (June 8, 2025): 329–36. https://doi.org/10.17770/etr2025vol2.8575.

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In the modern world, unmanned aerial systems play an extremely important role in the economy, research, environmental protection, and military operations. Unmanned aerial vehicles, as elements of these systems, operate and perform their tasks by transmitting data and commands over communication radio channels that often face harsh conditions and limitations on frequency-time and energy resources. At the same time, the demand for higher quality and accuracy of the information obtained and the commands issued are constantly increasing. The purpose of this research work is to examine and evaluate the potential of using turbo codes for error correction, especially packet codes, in the communication radio channels of unmanned aerial systems. Different types of turbo encoder designs are reviewed, along with their advantages and disadvantages, to assess their applicability for these channels. The importance of interleaving is discussed, and a structure and algorithm for the operation of an interleaver is proposed as an essential element of the turbo encoder design. Finally, conclusions and recommendations are made for directions for further research and the application of turbo codes in unmanned aerial systems.

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MARTINA, MAURIZIO, MARIO NICOLA, and GUIDO MASERA. "VLSI IMPLEMENTATION OF WiMax CONVOLUTIONAL TURBO CODE ENCODER AND DECODER." Journal of Circuits, Systems and Computers 18, no. 03 (2009): 535–64. http://dx.doi.org/10.1142/s0218126609005241.

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A VLSI encoder and decoder implementation for the IEEE 802.16 WiMax convolutional turbo code is presented. Architectural choices employed to achieve high throughput, while granting a limited occupation of resources, are addressed both for the encoder and decoder side, including also the subblock interleaving and symbol selection functions specified in the standard. The complete encoder and decoder architectures, implemented on a 0.13 μm standard cell technology, sustain a decoded throughput of more than 90 Mb/s with a 200 MHz clock frequency. The encoder has the complexity of 9.2 kgate of logic and 187.2 kbit of memory, whereas the complete decoder requires 167.7 kgate and 1163 kbit.

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Debessu, Yonas G., Hsiao-Chun Wu, and Hong Jiang. "Novel Blind Encoder Parameter Estimation for Turbo Codes." IEEE Communications Letters 16, no. 12 (2012): 1917–20. http://dx.doi.org/10.1109/lcomm.2012.102612.121473.

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Mohammadi, A. H. S., and A. K. Khandani. "Unequal error protection on turbo-encoder output bits." Electronics Letters 33, no. 4 (1997): 273. http://dx.doi.org/10.1049/el:19970178.

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Alebady, Wallaa Yaseen, and Ahmed Abdulkadhim Hamad. "Turbo polar code based on soft-cancelation algorithm." Indonesian Journal of Electrical Engineering and Computer Science 26, no. 1 (2022): 521. http://dx.doi.org/10.11591/ijeecs.v26.i1.pp521-530.

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Since the first polar code of Arikan, the research field of polar codes has been continuously active. Improving the performance of finite-code-length polar codes is the central point of this field. In this paper, the parallel concatenated systematic turbo polar code (PCSTPC) model has been proposed to improve the polar codes performance in a finite-length regime. On the encoder side, two systematic polar encoders are used as constituent encoders. While on the decoder side, two single iteration soft-cancelation (SCAN) decoders are used as soft-in-soft-out (SISO) algorithms inside the iterative decoding algorithm of the parallel concatenated systematic turbo polar code (PCSTPC). As compared to the optimized turbo polar code with SCAN and BP decoders, the proposed model has about 0.2 dB and 0.48 dB gains at BER=10(-4), respectively, in addition to 0.1 dB, 0.31 dB, and 0.72 dB gains over the TPC-SSCL32, TPC-SSCL16, and TPC-SSCL8 models, respectively. Moreover, the proposed model offers less complexity in comparison with other models, therefore requiring less memory and time resources.

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Devrari, Aakanksha, and Adesh Kumar. "Turbo encoder and decoder chip design and FPGA device analysis for communication system." International Journal of Reconfigurable and Embedded Systems (IJRES) 12, no. 2 (2023): 174. http://dx.doi.org/10.11591/ijres.v12.i2.pp174-185.

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Turbo codes are error-correcting codes with performance that is close to the Shannon theoretical limit (SHA). The motivation for using turbo codes is that the codes are an appealing mix of a random appearance on the channel and a physically realizable decoding structure. The communication systems have the problem of latency, fast switching, and reliable data transfer. The objective of the research paper is to design and turbo encoder and decoder hardware chip and analyze its performance. Two convolutional codes are concatenated concurrently and detached by an interleaver or permuter in the turbo encoder. The expected data from the channel is interpreted iteratively using the two related decoders. The soft (probabilistic) data about an individual bit of the decoded structure is passed in each cycle from one elementary decoder to the next, and this information is updated regularly. The performance of the chip is also verified using the maximum a posteriori (MAP) method in the decoder chip. The performance of field-programmable gate array (FPGA) hardware is evaluated using hardware and timing parameters extracted from Xilinx ISE 14.7. The parallel concatenation offers a better global rate for the same component code performance, and reduced delay, low hardware complexity, and higher frequency support.

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Aakanksha, Devrari, and Kumar Adesh. "Turbo encoder and decoder chip design and FPGA device analysis for communication system." International Journal of Reconfigurable and Embedded Systems (IJRES) 12, no. 2 (2023): 174–85. https://doi.org/10.11591/ijres.v12.i2.pp174-185.

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Turbo codes are error-correcting codes with performance that is close to the Shannon theoretical limit (SHA). The motivation for using turbo codes is that the codes are an appealing mix of a random appearance on the channel and a physically realizable decoding structure. The communication systems have the problem of latency, fast switching, and reliable data transfer. The objective of the research paper is to design and turbo encoder and decoder hardware chip and analyze its performance. Two convolutional codes are concatenated concurrently and detached by an interleaver or permuter in the turbo encoder. The expected data from the channel is interpreted iteratively using the two related decoders. The soft (probabilistic) data about an individual bit of the decoded structure is passed in each cycle from one elementary decoder to the next, and this information is updated regularly. The performance of the chip is also verified using the maximum a posteriori (MAP) method in the decoder chip. The performance of field-programmable gate array (FPGA) hardware is evaluated using hardware and timing parameters extracted from Xilinx ISE 14.7. The parallel concatenation offers a better global rate for the same component code performance, and reduced delay, low hardware complexity, and higher frequency support.

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Ramanna, Dasari, and V. Ganesan. "Low-Power VLSI Implementation of Novel Hybrid Adaptive Variable-Rate and Recursive Systematic Convolutional Encoder for Resource Constrained Wireless Communication Systems." International Journal of Electrical and Electronics Research 10, no. 3 (2022): 523–28. http://dx.doi.org/10.37391/ijeer.100320.

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In the modern wireless communication system, digital technology has tremendous growth, and all the communication channels are slowly moving towards digital form. Wireless communication has to provide the reliable and efficient transfer of information between transmitter and receiver over a wireless channel. The channel coding technique is the best practical approach to delivering reliable communication for the end-users. Many conventional encoder and decoder units are used as error detection and correction codes in the digital communication system to overcome the multiple transient errors. The proposed convolutional encoder consists of both Recursive Systematic Convolutional (RSC) Encoder and Adaptive Variable-Rate Convolutional (AVRC) encoder. Adaptive Variable-Rate Convolutional encoder improves the bit error rate performance and is more suitable for a power-constrained wireless system to transfer the data. Recursive Systematic Convolutional encoder also reduces the bit error rate and improves the throughput by employing the trellis termination strategy. Here, AVRC encoder ultimately acquires the channel state information and feeds the data into a fixed rate convolutional encoder and rate adaptor followed by a buffer device. A hybrid encoder combines the AVRC encoder and RSC encoder output serially and parallel, producing the solid encoded data for the modulator in the communication system. A modified turbo code is also obtained by placing interleaver between the two encoder units and building the stronger code word for the system. Finally, the conventional encoder system is compared and analyzed with the proposed method regarding the number of LUT’s, gates, clock cycle, slices, area, power, bit error rate, and throughput.

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Venkatesh, Divyashree Yamadur, Komala Mallikarjunaiah, and Mallikarjunaswamy Srikantaswamy. "A Comprehensive Review of Low Density Parity Check Encoder Techniques." Ingénierie des systèmes d information 27, no. 1 (2022): 11–20. http://dx.doi.org/10.18280/isi.270102.

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This paper presents a survey on various technologies of low density parity check encoder. LDPC codes are capable to handle high speed communication channel, by reducing attenuation, hazards and efficiently rectifying the linear error correction. Various coding technologies used in new generation communication system, such as turbo code, hamming code, low-density parity check (LDPC) code and Bose–Chaudhuri–Hocquenghem (BHC) code, are widely used in recent communication system. The LDPC has technical remarkable advantages and better performance in high speed communication process compared to turbo code. This paper deals with study of LDPC encoding techniques with various methods of detecting error and its correction. Here classification and performance analysis of LDPC encoding techniques on the basis of resources utilization, systematic, non-systematic approaches and consumer data right etc. have been analyzed in this paper. Apart from above mentioned criteria, this study deals with hardware and software architecture of LDPC encoder in rectification of forward error correction, parallel execution of instruction set. This study and analysis could offer scalability, the future scope of improving the performance of LDPC encoder in all aspects of the next generation communication process. This paper gives overview of various LDPC encoder applications, drawbacks and solution to overcome it.

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Parvanov, Stanimir. "RESEARCH OF DIFFERENT TURBO CODE SPEEDS, TYPES OF MODULATIONS, DECODING METHODS AND THEIR COMPATIBILITY WITH ENCRYPTION TECHNIQUES." ENVIRONMENT. TECHNOLOGIES. RESOURCES. Proceedings of the International Scientific and Practical Conference 2 (June 22, 2024): 232–36. http://dx.doi.org/10.17770/etr2024vol2.8037.

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Turbo codes are widely used to perform reliable information transfer over noisy communication connections with limited bandwidth or latency. The focus of the report is the analysis of different turbo encoder speed of the code, types of modulations, decoding methods and their joint use with information covert transmission methods. Realization of the communication channels is realized via Matlab/Simulink software. The effectiveness of communication systems is a matter of constant analysis and research by experts in the field of communication technologies.

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Sidorenko, A. A. "Introducing perforation when applying turbo codes." Journal of Physics: Conference Series 2094, no. 3 (2021): 032061. http://dx.doi.org/10.1088/1742-6596/2094/3/032061.

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Abstract The problem of adapting the degree of redundancy introduced in the process of error-correcting coding to the changing characteristics of the data transmission channel is urgent. Turbo codes, used in a variety of digital communication systems, are capable of correcting multiple errors occurring in the data transmission channel. The article compares the decoding efficiency for various options for introducing perforation into the code sequence generated by the turbo code encoder. Based on the comparison results, recommendations were made on the most appropriate option for the introduction of perforation.

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Verwimp, Toby, Georgios Mousmoulis, Konstantinos Gryllias, and Ali Hajnayeb. "Cavitation detection based on instantaneous angular speed." Proceedings of the International Conference on Condition Monitoring and Asset Management 2023, no. 1 (2023): 1–13. http://dx.doi.org/10.1784/cm2023.2e1.

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The study and detection of cavitation in hydraulic turbo-machinery has gained recently particular attention from both manufacturers and end users, due to the damage caused on machines’ surfaces that may result in costly sudden shutdowns. The traditional cavitation detection approaches exploit the noise and vibration signals that sense the vapor bubble implosion pressure waves, while advanced demodulation techniques are used in order to locate the resonances excited from these waves. This work aims to investigate an alternative methodology, where detection is achieved by processing the speed signal of rotary encoders. The motivation is that, contrary to microphones and accelerometers, the encoder is mounted directly on the shaft, where the rotor is connected and thus, is in direct contact with the cavitation waves. More specifically, in this study a centrifugal pump is tested under healthy and cavitating conditions, while an incremental encoder is rigidly installed on the pump’s shaft. The encoderâ–™s signal is processed in order to accurately estimate the raw speed signal. In addition, the order spectrum is used so as to extract the diagnostic indicators based on integer order amplitudes. From the results it can be concluded that particular components can give useful insights allowing the detection of both heavy and light intensity cavities.

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Shrimali, Yanita, Janki Ballabh Sharma, and R. S. Meena. "VHDL Implementation of low power turbo coded OFDM physical layer for wireless communication." International Journal of Engineering & Technology 7, no. 4.5 (2018): 665. http://dx.doi.org/10.14419/ijet.v7i4.5.25054.

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Orthogonal Frequency Division Multiplexing (OFDM) is exceptionally favored system for rapid information transmission over remote channel. In this paper, VHDL implementation of low power turbo-coded OFDM (TCOFDM) Physical layer architecture is presented. In this architecture a low power memory-less pipelined FFT processor and Log-map turbo encoder/decoders are used to provide high throughput and lower complexity. Log-map turbo decoder provides high speed with good error correction capacity, while FFT/IFFT processor with single delay feedback (SDF) memory less architecture provide improved area and power efficiency. Proposed TCOFDM system is implemented using Xilinx ISE Design suite in the simulation results shows that the proposed scheme is having low power, high speed, high throughput and smaller area in comparison to other schemes.

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Fleah, Maha, and Qusay Al-Doori. "State Space Parallelization Method for a 16-Bit Turbo Encoder." Engineering and Technology Journal 37, no. 12A (2019): 553–57. http://dx.doi.org/10.30684/etj.37.12a.9.

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Zirong, Hong, Dan Bo, and Wu Zhaojun. "A New Algorithm for Encoder Recognition of Turbo Code Components." International Journal of Performability Engineering 16, no. 8 (2020): 1159. http://dx.doi.org/10.23940/ijpe.20.08.p3.11591170.

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Xiao, Hailin, Ju Ni, Wu Xie, and Shan Ouyang. "A construction of quantum turbo product codes based on CSS-type quantum convolutional codes." International Journal of Quantum Information 15, no. 01 (2017): 1750003. http://dx.doi.org/10.1142/s0219749917500034.

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As in classical coding theory, turbo product codes (TPCs) through serially concatenated block codes can achieve approximatively Shannon capacity limit and have low decoding complexity. However, special requirements in the quantum setting severely limit the structures of turbo product codes (QTPCs). To design a good structure for QTPCs, we present a new construction of QTPCs with the interleaved serial concatenation of [Formula: see text]-type quantum convolutional codes (QCCs). First, [Formula: see text]-type QCCs are proposed by exploiting the theory of CSS-type quantum stabilizer codes and QCCs, and the description and the analysis of encoder circuit are greatly simplified in the form of Hadamard gates and C-NOT gates. Second, the interleaved coded matrix of QTPCs is derived by quantum permutation SWAP gate definition. Finally, we prove the corresponding relation on the minimum Hamming distance of QTPCs associated with classical TPCs, and describe the state diagram of encoder and decoder of QTPCs that have a highly regular structure and simple design idea.

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Singh, Shekhar, Surendra Kumar, and Sriwas M. Shukla. "Performance analysis of Optical Interleave Division Multiple Access using Turbo Encoder." IJARCCE 5, no. 12 (2016): 224–30. http://dx.doi.org/10.17148/ijarcce.2016.51249.

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Singh, Shekhar, Surendra Kumar Sriwas, Shukla M., and Saini JP. "Performance and Analysis of Interleave Division Multiple access using Turbo Encoder." IJARCCE 6, no. 1 (2017): 18–23. http://dx.doi.org/10.17148/ijarcce.2017.6104.

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Zhang, Mingliang, Li Cai, Xiaokuo Yang, Huanqing Cui, and Chaowen Feng. "Design and Simulation of Turbo Encoder in Quantum-Dot Cellular Automata." IEEE Transactions on Nanotechnology 14, no. 5 (2015): 820–28. http://dx.doi.org/10.1109/tnano.2015.2449663.

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Fragouli, C., and R. D. Wesel. "Turbo-encoder design for symbol-interleaved parallel concatenated trellis-coded modulation." IEEE Transactions on Communications 49, no. 3 (2001): 425–35. http://dx.doi.org/10.1109/26.911450.

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Zhang, Chong, Yuhang Lin, Deming Wang, and Jianguo Hu. "Design of Low-Power Turbo Encoder and Decoder for NB-IoT." Chinese Journal of Electronics 33, no. 2 (2024): 403–14. http://dx.doi.org/10.23919/cje.2022.00.225.

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Shi, Honghao, Zhiyong Luo, and Congduan Li. "An LDPC-RS Concatenation and Decoding Scheme to Lower the Error Floor for FTN Signaling." Electronics 13, no. 8 (2024): 1588. http://dx.doi.org/10.3390/electronics13081588.

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Faster-than-Nyquist (FTN) signaling has attracted increasing interest in the past two decades. However, when the fifth-generation (5G) communication low-density parity check (LDPC) code is applied to FTN signaling with low Bahl–Cock–Jelinek–Raviv (BCJR) states of detection and few turbo equalization iterations, an error floor near 10−5 is found, which does not exist in the original LDPC used for orthogonal signaling. This can be eliminated through many detection and decoding iterations, but this is unacceptable considering the increase in latency and storage. To solve this problem, we propose an LDPC and Reed–Solomon (RS) concatenation code, shortening, and perturbation scheme to lower the error floor. We propose a parallel encoder architecture for RS component code and a concise algorithm to calculate its constant multiplier coefficients, leveraging a traditional serial encoder, which can also be used for other parallelisms, rates, and lengths. The simulation results show that the proposed concatenation and shortening scheme can lower the error floor to about 10−7. The proposed scheme has an error correction capability for coded FTN signaling and successfully lowers the error floor with the limitation of few turbo iterations and few BCJR states.

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Kurbet, Pavlo. "A METHOD FOR PREPARING INITIAL POLYNOMIALS FOR RECURSIVE SYSTEMATIC CONVOLUTIONAL TURBO CODES USING A GENETIC ALGORITHM." Cybersecurity: Education, Science, Technique 4, no. 24 (2024): 266–81. http://dx.doi.org/10.28925/2663-4023.2024.24.266281.

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The article is devoted to increasing the efficiency of wireless information transmission systems with adaptation due to the preparation of initial polynomials of recursive systematic convolutional codes of turbo codes using a genetic algorithm. As an objective function, an indicative number of sign changes of the a priori-posterior information of the turbo code decoder for a certain sample of data bits is proposed. As prior information, the value of channel symbols is used, taking into account the channel “reliability” function, which indicates the level of dispersion of additive white gaussian noise. The logarithm of the ratio of the likelihood functions about the transmitted bit of data is used as posterior information. The analysis of known works shows that when using adaptive systems with coding as an adaptable parameter, the coding speed is used, which is regulated by the number of check symbols from the output of the turbo code encoder, while there are no developments on the adaptation of turbo code polynomials, as well as on the rapid formation of initial polynomials recursive systematic convolutional codes turbo codes. The use of rational polynomials as initial ones during adaptation will allow more effective use of the energy efficiency of wireless data transmission systems. The article consists of an introduction, which highlights the problem, analyzes the latest research and publications on this topic, and formulates the purpose of the article. The results of the research are shown, conclusions and prospects for further research are drawn. The article ends with a list of used sources. As a result of the work of the proposed method, the primary polynomials of turbo codes, which were found using a genetic algorithm for a channel with additive white Gaussian noise, are given. We consider the search for initial interleavers between component recursive systematic convolutional codes of turbo codes to be the directi

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Lin, Cheng-Hung, and Tsung-Ju Hsieh. "Unified encoder embedded trellis router designs for decoding convolutional and turbo codes." IEICE Electronics Express 14, no. 5 (2017): 20170028. http://dx.doi.org/10.1587/elex.14.20170028.

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Geng, Fu Quan, Zhi Gang Huang, Xuan Jie Ning, and Mao Fan Yang. "A Joint Improved Irregular Accumulate Concatenated Tree Coding and Frequency Hopping OFDM Modulation Scheme for Wireless Networks." Advanced Materials Research 902 (February 2014): 364–69. http://dx.doi.org/10.4028/www.scientific.net/amr.902.364.

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Joint channel coding and spread spectrum modulation technologies bring to wireless networks the tremendous amount of performance improvement, the elimination, and the mitigation of interference. This paper proposes an improved design for irregular accumulate concatenated tree (IACT) codes, which can be viewed as simply precoded by an accumulator. This class of codes belongs to the special turbo-like codes, which combines the advantages of fast encoder structures of turbo codes, and the advantages of parallel high-speed belief-propagation (BP) iterative decoding algorithm of low-density parity-check (LDPC) codes. The improved IACT codes can be coded via a Tanner graph. With these improved codes, we propose a joint IACT coding and frequency hopping orthogonal frequency division multiplexing (FH-OFDM) modulation scheme for wireless networks. We compare the performance of different coding bases such as the irregular concatenated tree (ICT) codes and turbo codes in the scheme by theoretical analysis and simulation. Numerical results are shown that the proposed scheme with these IACT codes has really good performance.

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Wada, Tadahiro, Abbas Jamalipour, Kouji Ohuchi, Hiraku Okada, and Masato Saito. "Effect of unequal power allocation in turbo coded multi-route multi-hop networks." Journal of Telecommunications and Information Technology, no. 1 (March 30, 2006): 46–53. http://dx.doi.org/10.26636/jtit.2006.1.358.

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Multi-hop ad hoc networks are promising candidates for next generation mobile communications. They have sufficient channel capacity to achieve high data rate transmission for large number of users. One advantage of multi-hop networks is to realize multi-route transmissions. Since information bit streams can be transmitted over multiple routes, we can obtain route diversity effect. In order to enhance the route diversity effect, we usually introduce forward error correction schemes. Turbo coding is one of suitable coding methods for multi-hop networks. The turbo encoder generates one message stream and two parity streams whilst the message stream is more important than the parity streams for achieving reliable communications. Thus an unequal power allocation to the message and parity streams could be effective in improving the performance. In this paper, the effect of unequal power allocation for turbo coded multi-hop networks is investigated. Assuming the channel as additive white Gaussian and binary symmetric, we will show considerable performance improvement by unequal power allocation in terms of the bit error rate performance in multi-route multi-hop networks.

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Babich, Fulvio, and Francesca Vatta. "Turbo Codes Construction for Robust Hybrid Multitransmission Schemes." Journal of Communications Software and Systems 7, no. 4 (2011): 128. http://dx.doi.org/10.24138/jcomss.v7i4.174.

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In certain applications the user has to cope with some random packet erasures due, e.g., to deep fading conditions on wireless links, or to congestion on wired networks. In other applications, the user has to cope with a pure wireless link, in which all packets are available to him, even if seriously corrupted. The ARQ/FEC schemes already studied and presented in the literature are well optimized only for one of these two applications. In a previous work, the authors aimed at bridging this gap, giving a design method for obtaining hybrid ARQ schemes that perform well in both conditions, i.e., at the presence of packet erasures and packet fading. This scheme uses a channel coding system based on partially-systematic periodically punctured turbo codes. Since the computation of the transfer function and, consequently, the union bound on the Bit or Frame Error Rate of a partiallysystematic punctured turbo code becomes highly intensive as the interleaver size and the puncturing period increase, in this work a simplified and more efficient method to calculate the most significant terms of the average distance spectrum of the turbo encoder is proposed and validated.

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Abderraouf, Elarbi, Abdesselam Bassou, and Mohamed Rida Lahcene Rida Lahcene. "Higher performance and lower complexity turbo decoding scheme for 4G-LTE using unpunctured turbo trellis-coded modulation." Indonesian Journal of Electrical Engineering and Computer Science 18, no. 1 (2020): 351. http://dx.doi.org/10.11591/ijeecs.v18.i1.pp351-360.

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Thanks to the success of smart phones and mobile-ready laptops, data traffic has recently grown exponentially, and the demand for mobile data has risen very dramatically. These requests in large capacity can only be satisfied by a high efficiency and a very good optimization of the infrastructures of the mobile networks, while taking into account the constraints which are the power, bandwidth and a limited complexity. The task of developing mobile technologies has also evolved from a national or regional focus to a complex and growing mission, supported by global standards development organizations such as 3GPP (3rd Group Partnership Project). Through this research, we present everything related to the simulation of the 4G mobile network system (LTE), which can provide high data flow with good quality, through three model channels known as (EPA, EVA, ETU). In this work we focus on the block ‘iterative decoding channel encoder’ in the LTE system, where the iterative channel coding called ‘Turbo-code’ (TC) is substituted by the iterative coding channel called ‘Unpunctured Turbo Trellis-coded Modulation’ (UTTCM). The simulation results showed that with less decoding complexities, UTTCM's LTE system gives good performance (in terms of BER).

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Wu, Xisheng, Dong Li, Yanbo Wu, and Min Zhu. "Probabilistic constellation shaping-aided underwater acoustic communication with vector approximate message passing iterative equalization." Journal of the Acoustical Society of America 154, no. 1 (2023): 433–42. http://dx.doi.org/10.1121/10.0020272.

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A probabilistic constellation shaping (PCS)-aided single-carrier transceiver is proposed to improve spectral efficiency for underwater acoustic (UWA) communications. At the transmitter, the information bits are input into a distribution matcher followed by a systematic binary encoder, which yields a sequence of sign bits with a uniform distribution and a sequence of amplitude bits with a non-uniform distribution. Based on these two sequences, the PCS is then realized by mapping coded bits onto a quadrature amplitude modulation constellation. At the receiver, an improved frequency-domain turbo equalizer based on the vector approximate message passing (VAMP) is proposed for the PCS-UWA communication system to eliminate the multipath interference. It exploits the a priori symbol probability information benefiting from the PCS at the beginning of the turbo iteration and over the self-iteration of the VAMP soft equalizer, improving the symbol detection performance. Finally, the first experimental demonstration of a deep-sea PCS-UWA communication system and numerical simulation of shallower water are presented. The experimental results reveal the PCS-UWA communication system significantly outperforms traditional systems with no PCS. Also, the proposed receiver is superior to the classical adaptive turbo equalizer based on the improved proportionate normalized least mean square algorithm even with data reuse.

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ELarbi, Abderraouf, Bassou Abdesselam, and Rida Lahcene Mohamed. "Higher performance and lower complexity turbo decoding scheme for 4G-LTE using unpunctured turbo trellis-coded modulation." Indonesian Journal of Electrical Engineering and Computer Science (IJEECS) 18, no. 1 (2020): 351–60. https://doi.org/10.11591/ijeecs.v18.i1.pp351-360.

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Mobile communications have become necessities and even everyday commodities. In the previous decades they evolved from a technology reserved for a limited number of individuals to the current systems that are everywhere in our lives. The task of developing mobile technologies has also evolved from a national or regional focus to a complex and growing mission, supported by global standards development organizations such as 3GPP (3rd Group Partnership Project). Thanks to the success of smart phones and mobile-ready laptops, data traffic has recently grown exponentially, and the demand for mobile data has risen very dramatically. These requests in large capacity can only be satisfied by a high efficiency and a very good optimization of the infrastructures of the mobile networks, while taking into account the constraints which are the power, bandwidth and a limited complexity. Through this research, we present everything related to the simulation of the 4G mobile network system (LTE), which can provide high data flow with good quality, through three model channels known as (EPA, EVA, ETU). In this work we focus on the block ‘iterative decoding channel encoder’ in the LTE system, where the iterative channel coding called ‘Turbo-code’ (TC) is substituted by the iterative coding channel called ‘Unpunctured Turbo Trellis-coded Modulation’ (UTTCM). The simulation results showed that with less decoding complexities, UTTCM's LTE system gives good performance (in terms of BER).

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Jeon, Jeongju, and Sunhee Kim. "Design and Implementation of Four-Parallel Turbo Decoder for HomePlug Green PHY." International Journal on Advanced Science, Engineering and Information Technology 15, no. 2 (2025): 464–70. https://doi.org/10.18517/ijaseit.15.2.12515.

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As electric vehicles are popularized, the importance of the safety of electric vehicle batteries has increased. Lithium-ion batteries, which are mainly used as batteries for electric vehicles, have the possibility of fire due to thermal factors, collisions, and overcharging. Recently, to prevent overcharging, battery information is exchanged between electric vehicle chargers and electric vehicle battery management systems using PLC. HomePlug Green Phy(HPGP) is a communication method for Smart Grid applications and EVs among PLCs. HPGP uses 3072-OFDM, and the number of available carriers varies depending on the region. One PHY block is generated with several to dozens of OFDM symbols. Therefore, to guarantee a constant latency of the PHY transceiver, a high-speed transceiver that can process FEC within the required time is needed. In this paper, we propose a 4-parallel turbo decoder. By analyzing channel interleaver for HPGP, four turbo decoders can be processed simultaneously. Through analysis of the turbo interleaving/deinterleaving address, the turbo decoder shares the data memory of the channel deinterleaver. It reduces the interleaving/deinterleaving address memory size, thereby reducing the overall memory size. The proposed architecture was designed with Verilog, and its functions were verified using VCS/Verdi. The Kintex UltraScale Xcku11p-ffve1517-2-e was used as the target for implementation. The clock frequency is 125 MHz. After analyzing the overall architecture of HPGP FEC, the design was made considering the timing and interface with the pre/post blocks of the Encoder and Decoder, so it will be well used in the HPGP transceiver.

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Y. David Solomon Raju, Kesari Ananda Samhitha,. "Design and Implementation of the Turbo Encoder by using Magnitude Comparator in IVS Chip." Turkish Journal of Computer and Mathematics Education (TURCOMAT) 12, no. 6 (2021): 1537–45. http://dx.doi.org/10.17762/turcomat.v12i6.2692.

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This research studies the concept and application of the Turbo_encoder to be an integrated module in the In-Vehicle Device (IVS) embedded module by using the magnitude comparator. To create the Turbo_encoder Module, the complex PLDS are used. The variants of series and parallel Turbo_encoders are discussed. It is shown that proportional to chip size processing time also increased in the Turbo_encoder parallel computing variant system. The magnitude comparator with parallel computing variant system is implemented in this project. The usage of proposed logic resulted in efficient area and power usage. The architecture construction using Verilog HDL and implementation and simulation are executed in the Xilinx-ise tool. To incorporate the built module, Xilinx Vertex Low Power is used. The Turbo_encoder module on a single programmable computer is planned to be part of the IVS chip.

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Mohammadi, A. H. S., and A. K. Khandani. "Unequal power allocation to the turbo-encoder output bits with application to CDMA systems." IEEE Transactions on Communications 47, no. 11 (1999): 1609–10. http://dx.doi.org/10.1109/26.803491.

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M, Chitra. "An optimized Distributed Video Coding using Turbo Codes and Zero Motion Skip Encoder Strategy." IOSR Journal of Electronics and Communication Engineering 1, no. 2 (2012): 10–14. http://dx.doi.org/10.9790/2834-0121014.

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Journal articles on the topic 'Turbo Encoder'

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