Relevant bibliographies by topics / Ultra-scaled MOSFET

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  1. Journal articles
  2. Dissertations / Theses
  3. Conference papers

Academic literature on the topic 'Ultra-scaled MOSFET'

Author: Grafiati
Published: 4 June 2021
Last updated: 1 February 2022

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Journal articles on the topic "Ultra-scaled MOSFET"

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Osintsev, Dmitry, V. Sverdlov, and Siegfried Selberherr. "Acoustic Phonon and Surface Roughness Spin Relaxation Mechanisms in Strained Ultra-Scaled Silicon Films." Advanced Materials Research 854 (November 2013): 29–34. http://dx.doi.org/10.4028/www.scientific.net/amr.854.29.

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We consider the impact of the surface roughness and phonon induced relaxation on transport and spin characteristics in ultra-thin SOI MOSFET devices. We show that the regions in the momentum space, which are responsible for strong spin relaxation, can be efficiently removed by applying uniaxial strain. The spin lifetime in strained films can be improved by orders of magnitude, while the momentum relaxation time determining the electron mobility can only be increased by a factor of two.
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Ahangari, Zahra, and Morteza Fathipour. "Band structure effect on the electron current oscillation in ultra-scaled GaSb Schottky MOSFET: tight-binding approach." Journal of Computational Electronics 13, no. 2 (2013): 375–82. http://dx.doi.org/10.1007/s10825-013-0544-x.

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Singh, Vikram, Satinder K. Sharma, Dinesh Kumar, and R. K. Nahar. "Study of rapid thermal annealing on ultra thin high-k HfO2 films properties for nano scaled MOSFET technology." Microelectronic Engineering 91 (March 2012): 137–43. http://dx.doi.org/10.1016/j.mee.2011.09.005.

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Gupta, M. "Ballistic MOSFETs, the ultra scaled transistors." IEEE Potentials 21, no. 5 (2002): 13–16. http://dx.doi.org/10.1109/mp.2002.1166619.

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Saltin, Johan, Nguyen Cong Dao, Philip H. W. Leong, and Hiu Yung Wong. "Energy Filtering Effect at Source Contact on Ultra-Scaled MOSFETs." IEEE Journal of the Electron Devices Society 8 (2020): 662–67. http://dx.doi.org/10.1109/jeds.2020.2981251.

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TAKAGI, SHIN-ICHI. "OPTIMIZED DESIGN OF THE SUBBAND STRUCTURE IN MOS INVERSION LAYERS FOR REALIZING HIGH PERFORMANCE AND LOW POWER Si MOSFETS." International Journal of High Speed Electronics and Systems 10, no. 01 (2000): 155–70. http://dx.doi.org/10.1142/s0129156400000192.

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Enhancement of inversion-layer mobility becomes more important in scaled CMOS from the viewpoints of both higher performance and lower power consumption. The severe influence of inversion-layer capacitance prevents MOSFETs with ultra-thin gate oxides from operating at low supply voltage. This paper presents an engineering scenario of the subband structure in the inversion layer for the enhancement of electron mobility in n-MOSFETs. A key factor is to enlarge the difference in the subband energies of the two-fold and four-fold valleys and, as a result, the electron occupancy of the two-fold val
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Othman, Noraini, Mohd Khairuddin Md Arshad, Syarifah Norfaezah Sabki, and U. Hashim. "Ultra-Thin Body and Buried Oxide (UTBB) SOI MOSFETs on Suppression of Short-Channel Effects (SCEs): A Review." Advanced Materials Research 1109 (June 2015): 257–61. http://dx.doi.org/10.4028/www.scientific.net/amr.1109.257.

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This paper reviews the different UTBB SOI MOSFET structures and their superiority in suppressing short-channel effects (SCEs). As the gate length (Lg), buried oxide thickness (TBOX) and silicon thickness (Tsi) are scaled down, the severity of SCEs becomes significant. The different UTBB SOI MOSFET device structures introduced to suppress these SCEs are discussed. The effectiveness of these structures in managing the associated SCEs such as drain-induced barrier lowering (DIBL), subthreshold swing (SS) and off-state leakage current (Ioff) is also presented. Further evaluations are made on other
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Salmani-Jelodar, Mehdi, Hesameddin Ilatikhameneh, Sungguen Kim, Kwok Ng, Prasad Sarangapani, and Gerhard Klimeck. "Optimum High-k Oxide for the Best Performance of Ultra-Scaled Double-Gate MOSFETs." IEEE Transactions on Nanotechnology 15, no. 6 (2016): 904–10. http://dx.doi.org/10.1109/tnano.2016.2583411.

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Kalra, Shruti, та A. B. Bhattacharyya. "An Analytical Study Of Temperature Dependence of Scaled CMOS Digital Circuits Using α-Power MOSFET Model". Journal of Integrated Circuits and Systems 11, № 1 (2016): 57–68. http://dx.doi.org/10.29292/jics.v11i1.430.

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Aggressive technological scaling continues to drive ultra-large-scale-integrated chips to higher clock speed. This causes large power consumption leading to considerable thermal generation and on-chip temperature gradient. Though much of the research has been focused on low power design, thermal issues still persist and need attention for enhanced integrated circuit reliability. The present paper outlines a methodology for a first hand estimating effect of temperature on basic CMOS building blocks at ultra deep submicron technology nodes utilizing modified α-power law based MOSFET model. The g
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Kaharudin, K. E., F. Salehuddin, A. S. M. Zain, and Ameer F. Roslan. "Geometric and process design of ultra-thin junctionless double gate vertical MOSFETs." International Journal of Electrical and Computer Engineering (IJECE) 9, no. 4 (2019): 2863. http://dx.doi.org/10.11591/ijece.v9i4.pp2863-2873.

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The junctionless MOSFET architectures appear to be attractive in realizing the Moore’s law prediction. In this paper, a comprehensive 2-D simulation on junctionless vertical double-gate MOSFET (JLDGVM) under geometric and process consideration was introduced in order to obtain excellent electrical characteristics. Geometrical designs such as channel length (Lch) and pillar thickness (Tp) were considered and the impact on the electrical performance was analyzed. The influence of doping concentration and metal gate work function (WF) were further investigated for achieving better performance. Th
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Dissertations / Theses on the topic "Ultra-scaled MOSFET"

1

Velayudhan, Vikas. "TCAD study of interface traps-related variability in ultra-scaled MOSFETs." Doctoral thesis, Universitat Autònoma de Barcelona, 2016. http://hdl.handle.net/10803/400200.

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El trabajo desarrollado en esta tesis se ha enfocado en el análisis y estudio del impacto que tienen en la variabilidad de MOSFETs ultraescalados el número y la distribución espacial de las trampas interficiales. En los estudios realizados, el número de localizaciones en las que las trampas estaban ubicadas se varió, pero siempre se mantuvo la carga total constante, definiendo diferentes densidades de trampas según el número de localizaciones analizado. Inicialmente se realizaron simulaciones en 2D de trampas interficiales situadas a lo largo del canal del transistor y se analizó su influenci
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Hosenfeld, Fabian. "NEGF Based Analytical Modeling of Advanced MOSFETs." Doctoral thesis, Universitat Rovira i Virgili, 2017. http://hdl.handle.net/10803/462901.

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La corrent túnel de font a drenador (SD) disminueix el rendiment dels dispositius MOSFETs quan la longitud del canal cau per sota de 10 nm. La modelització dels efectes quàntics incloent la corrent túnel SD ha guanyat més importància especialment per als desenvolupadors de models compactes. La funció de Green de no equilibri (NEGF) s'ha convertit en un mètode de l'estat-de-art per a la simulació a nano-escala dels dispositius en els últims anys. En el sentit d'un enfocament de simulació a escala múltiple és necessari tancar la bretxa entre els models compactes amb el seu càlcul ràpid i eficien
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Conference papers on the topic "Ultra-scaled MOSFET"

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Huda, A. R. N., M. K. Md Arshad, A. R. Ruslinda, N. Othman, C. H. Voon, and R. M. Ayub. "The analog and RF device performance: Junction VS junctionless ultra-scaled SOI n-MOSFET." In 2016 3rd International Conference on Electronic Design (ICED). IEEE, 2016. http://dx.doi.org/10.1109/iced.2016.7804669.

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Cai, Weiran, Wenrui Lan, Zichao Ma, Lining Zhang, and Mansun Chan. "A Full-region Model for Ultra-Scaled MoS2 MOSFET Covering Direct Source-Drain Tunneling." In 2021 9th International Symposium on Next Generation Electronics (ISNE). IEEE, 2021. http://dx.doi.org/10.1109/isne48910.2021.9493621.

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Salmani Jelodar, Mehdi, Hesameddin Ilatikhameneh, Prasad Sarangapani, et al. "Tunneling: The major issue in ultra-scaled MOSFETs." In 2015 IEEE 15th International Conference on Nanotechnology (IEEE-NANO). IEEE, 2015. http://dx.doi.org/10.1109/nano.2015.7388694.

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Cheung, K. P., and J. P. Campbell. "On the magnitude of Random telegraph noise in ultra-scaled MOSFETs." In Technology (ICICDT). IEEE, 2011. http://dx.doi.org/10.1109/icicdt.2011.5783191.

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Tyaginov, Stanislav, Markus Bina, Jacopo Franco, et al. "A predictive physical model for hot-carrier degradation in ultra-scaled MOSFETs." In 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD). IEEE, 2014. http://dx.doi.org/10.1109/sispad.2014.6931570.

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Illarionov, Y. Y., S. E. Tyaginov, M. Bina, and T. Grasser. "A method to determine the lateral trap position in ultra-scaled MOSFETs." In 2013 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2013. http://dx.doi.org/10.7567/ssdm.2013.d-4-4.

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Tyaginov, Stanislav, Markus Bina, Jacopo Franco, et al. "(Late) Essential ingredients for modeling of hot-carrier degradation in ultra-scaled MOSFETs." In 2013 IEEE International Integrated Reliability Workshop (IIRW). IEEE, 2013. http://dx.doi.org/10.1109/iirw.2013.6804168.

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Smets, Quentin, Benjamin Groven, Matty Caymax, et al. "Ultra-scaled MOCVD MoS2 MOSFETs with 42nm contact pitch and 250µA/µm drain current." In 2019 IEEE International Electron Devices Meeting (IEDM). IEEE, 2019. http://dx.doi.org/10.1109/iedm19573.2019.8993650.

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Goel, N., S. Mukhopadhyay, N. Nanaware, et al. "A comprehensive DC/AC model for ultra-fast NBTI in deep EOT scaled HKMG p-MOSFETs." In 2014 IEEE International Reliability Physics Symposium (IRPS). IEEE, 2014. http://dx.doi.org/10.1109/irps.2014.6861100.

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Illarionov, Yu Yu, M. Bina, S. E. Tyaginov, et al. "A reliable method for the extraction of the lateral position of defects in ultra-scaled MOSFETs." In 2014 IEEE International Reliability Physics Symposium (IRPS). IEEE, 2014. http://dx.doi.org/10.1109/irps.2014.6861190.

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Journal articles
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