Relevant bibliographies by topics / Universal asynchronous receiver / transmitter (UART)

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  2. Dissertations / Theses
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Academic literature on the topic 'Universal asynchronous receiver / transmitter (UART)'

Author: Grafiati
Published: 4 June 2025
Last updated: 8 July 2025

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Journal articles on the topic "Universal asynchronous receiver / transmitter (UART)"

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Singh, Ashutosh Kumar. "Universal Asyncronous Receiver Transmitter." International Journal for Research in Applied Science and Engineering Technology 12, no. 3 (2024): 1054–56. http://dx.doi.org/10.22214/ijraset.2024.58997.

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Abstract: This project focuses on the Verilog-based design and implementation of a Universal Asynchronous ReceiverTransmitter (UART) communication module. The UART is a fundamental component in digital systems, facilitating serial data transmission between devices. Our objective is to develop a robust and efficient Verilog description of the UART module, emphasizing simplicity, modularity, and ease of integration. The baud rate generator allows for flexible communication speeds, accommodating diverse applications. The module ensures accurate framing of transmitted and received data through the proper generation of start and stop bits. Error-detection mechanisms are implemented to enhance data integrity. The project enhances the digital design field by delivering a Verilog implementation of a UART communication module that is both dependable and efficient.
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BINDU, MADDI. "Design and Implementation of High-Speed Universal Asynchronous Receiver and Transmitter (UART)." INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 08, no. 12 (2024): 1–9. https://doi.org/10.55041/ijsrem40371.

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The Universal Asynchronous Receiver and Transmitter (UART) are described, which is essentially a serial data transfer protocol used in digital circuit applications. The UART transmitter architecture has a baud rate generator, a parity generator, a transmitter finite state machine (FSM), and a parallel in serial out (PISO) register. The UART receiver is composed of a baud rate generator, a negative edge detector, a parity checker, a receiver Finite State Machine (FSM), and a serial in parallel out (SIPO) register. The transmitter and the receiver have the same baud rate generator; therefore, the transmitter/receiver baud rate is the same. The baud rate generator is the same as the frequency divider circuit. A UART transmitter data frame has 1 start bit, 8 transmit data bits, 1 parity bit, and 1 stop bit. The transmission rate of the transmitter and receiver is 4 Mbps using a 64 MHz system clock. Implementation, simulation and synthesis are done using Xilinx Vivado version 2018.2. The design is verified using a simulated waveform and synthesized on an FPGA Zed board. Keywords: Finite State Machine (FSM), Parallel in Serial out (PISO), Serial in Parallel out (SIPO), FPGA
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Ms. Banti Kumari, Ms. Kanika Jindal, and Mr. Amit Bindal. "Design and Implementation of Verilog Based High Speed Low Power UART." International Research Journal on Advanced Engineering Hub (IRJAEH) 2, no. 05 (2024): 1468–77. http://dx.doi.org/10.47392/irjaeh.2024.0203.

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The most crucial component of serial communication is a microcircuit called a universal asynchronous receiver/transmitter (UART). Receive-transmitter asynchronous technology is known as UART, and it is widely used for device-to-device communication protocols. Using asynchronous serial communication at a speed that can be adjusted. A hardware communication technique called UART Asynchronous conditions occur when the output of the transmitting device and the receiving end are not in sync with a clock. In UART, receiving a signal is known as RxD, and transmitting a signal is known as TxD. In comparison to the existing conventional UART design, we were able to reduce delay by 29% and power usage by 33% using our approach. The effectiveness of the novel UART design is noticed with the reduction in delay and power consumption. Synthesis and simulation are done in Xilinx ISE and Modelsim and Verilog HDL is used to implement a unique UART design.
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Gong, Jiajun, Wenbo Guo, and Weijian Sun. "UART communication protocol frame format explanation and application." Applied and Computational Engineering 14, no. 1 (2023): 47–56. http://dx.doi.org/10.54254/2755-2721/14/20230757.

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Universal Asynchronous Transceiver (UART) is a Universal Serial Data Bus, hardware communication protocol using asynchronous serial communication in a configurable manner rate. In most embedded systems, microcontrollers and computers, UART plays an important communication role as a hardware communication protocol between devices to ensure the efficient transmission of communication data. The understanding and use of the UART protocol is crucial in our design process. In order to better understand. basic principle this protocol and realize the use of URAT, this paper introduces serial communication, UART frame format explanation, the working principle of UART, simulation of simple UART3. Depending on the source clock, also known as the Baud Clock, each heterogeneous device in a complete system may be able to create a distinct baud rate and connect with other devices over a UART interface. The fundamental tenet of the UART protocol stipulates that for proper communication, the transmitter and receiver must be set at the same baud rate. It also introduces several advanced designs and applications of UART with baud rate, namely UART with automatic frequency generator and frequency divider and Determination of UART Receiver Baud Rate Tolerance.
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Dong, Meiting. "A Comparative Analysis of Synchronous USART And Asynchronous UART Communication Protocols." Highlights in Science, Engineering and Technology 81 (January 26, 2024): 567–74. http://dx.doi.org/10.54097/hm6hre11.

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In contemporary applications, the integration of the STM32F103ZET6 microcontroller with various peripherals is indispensable, emphasizing the critical role of serial communication in data transmission between the microcontroller and these peripherals. This study delineates the distinctions between Universal Synchronous Asynchronous Receiver-Transmitter (USART) and Universal Asynchronous Receiver-Transmitter (UART) within the context of USART synchronous communication. The superiority of USART is underscored by its utilization of a uniform clock and identical baud rate for simultaneous and synchronous transmission, enhancing data transfer efficiency significantly. This methodology facilitates the transmission of larger data quantities concurrently and mitigates data loss during prolonged transmission, a prevalent issue in UART asynchronous communication. Additionally, USART preserves essential functionalities such as the detection of data boundaries, automatically discerning the initiation and termination of individual data frames, which guarantees the uninterrupted reception and transmission of data. This analysis is pivotal for professionals seeking optimized communication protocols in microcontroller-based systems.
 In contemporary applications, the integration of the STM32F103ZET6 microcontroller with various peripherals is indispensable, emphasizing the critical role of serial communication in data transmission between the microcontroller and these peripherals. This study delineates the distinctions between Universal Synchronous Asynchronous Receiver-Transmitter (USART) and Universal Asynchronous Receiver-Transmitter (UART) within the context of USART synchronous communication. The superiority of USART is underscored by its utilization of a uniform clock and identical baud rate for simultaneous and synchronous transmission, enhancing data transfer efficiency significantly. This methodology facilitates the transmission of larger data quantities concurrently and mitigates data loss during prolonged transmission, a prevalent issue in UART asynchronous communication. Additionally, USART preserves essential functionalities such as the detection of data boundaries, automatically discerning the initiation and termination of individual data frames, which guarantees the uninterrupted reception and transmission of data. This analysis is pivotal for professionals seeking optimized communication protocols in microcontroller-based systems.
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Li, Zhangchi. "Design, refinement, and enhancement of FPGA-implemented UART circuitry." Applied and Computational Engineering 37, no. 1 (2024): 259–65. http://dx.doi.org/10.54254/2755-2721/37/20230520.

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This article provides an overview of the universal asynchronous receiver/transmitter, commonly referred to as Universal Asynchronous Receiver/Transmitter (UART). The UART stands as a noteworthy exemplar of a serial communication protocol, facilitating the exchange of data within a serial connection while accommodating full-duplex communication. The architecture of the UART hinges upon three principal constituents: the transmitter, the receiver, and the baud rate generator, the latter essentially a frequency divider. Each of these elements is meticulously crafted using the Verilog hardware description language, thereby ensuring distinct and efficient design. Furthermore, this discourse delves into refined iterations of these implementations. For instance, it introduces the concept of a baud rate self-adaptive function and expounds upon multibyte transmission techniques. In a concerted effort to streamline circuit design and curtail the electro circuit's footprint, a deliberate decision is made to forgo the integration of a parity check module. Consequently, the chosen data format is the widely adopted 8N1 (8 data bits, 1 stop bit and no parity bit) configuration.
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Govil, Anchal, Anmol Karnwal, Govinda Sindhu, Ayush Singh, and Dr Shubham Shukla. "Design and Implementation of UART Using FPGA Board." International Journal for Research in Applied Science and Engineering Technology 10, no. 4 (2022): 1187–90. http://dx.doi.org/10.22214/ijraset.2022.41478.

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Abstract: This paper introduces the implementation of the Universal Asynchronous Receiver- Transmitter Controller (UART) based on Microprogrammed Controller on Field Programmable Gate Array (FPGA. Our UART design is fully functional and built-in. Coded using the Verilog design from top to bottom and visible in Spartan-3E FPGA using Xilinx ISE Webpack 14.7. Use results show that the design can work Spartan-3E FPGA maximum clock frequency of 218.248 MHz. The maximum frequent use of the UART controller is 192.773 MHz. of bits and hence this is why with a small amount of storage. Keywords: Receiver, Transmitter, Microprogrammed Controller and Field Programmable Gate Array (FPGA).
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Gopal, P. Bala, and K. Hari Kishore. "An FPGA Implementation of On Chip UART Testing with BIST Techniques." International Journal of Reconfigurable and Embedded Systems (IJRES) 5, no. 3 (2016): 176. http://dx.doi.org/10.11591/ijres.v5.i3.pp176-182.

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A Universal Asynchronous Receiver Transmitter (UART) is usually implemented for asynchronous serial communication, mostly used for short distance communications. It allows full duplex serial communication link and is used in data communication and control system. Nowadays there is a requirement for on chip testing to overcome the product failures. This paper targets the introduction of Built-in self test (BIST) for UART to overcome the above two constraints of testability and data integrity. The 8-bit UART with BIST module is coded in Verilog HDL and synthesized and simulated using Xilinx XST and implemented on SPARTAN 3E FPGA. Results indicate that this model eliminates the need for expensive testers and thereby it can reduce the development time and cost.
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Sigit Prakosa Adhi Nugraha, Lilo Sunuharjo, and Muhammad 'Atiq. "Komunikasi Arduino I2C, SPI dan UART." Switch : Jurnal Sains dan Teknologi Informasi 2, no. 4 (2024): 80–85. http://dx.doi.org/10.62951/switch.v2i4.187.

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Communication between devices is an important aspect when developing an Arduino-based system. The three communication protocols commonly used with Arduino are I2C (Inter-Integrated Circuit), SPI (Serial Peripheral Interface), and UART (Universal Asynchronous Receiver/Transmitter). Each of these protocols has unique characteristics that make them suitable for different applications. These three communication protocols provide flexible options when developing systems that communicate with sensors, actuators, or other modules on the Arduino platform. Selecting the appropriate protocol depends on specific needs, such as speed, number of connected devices, and system complexity.
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Zhang, Hang. "A Systematic Analysis of The UART Transceiver Theory and Application." Highlights in Science, Engineering and Technology 61 (July 30, 2023): 172–79. http://dx.doi.org/10.54097/hset.v61i.10290.

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This article introduces the theoretical foundation and application of Universal Asynchronous Receiver/Transmitter (UART) in four chapters, including the history and structure of UART transceivers, and so on. UART is a kind of communication hardware using serial Asynchronous communication, which has the advantages of simple structure and good stability. It can convert serial data and parallel data to each other and transmit data between devices. It is widely used on various devices. In the 50 years since its invention, it has undergone many improvements and improvements. In the end, UART transceivers became one of the extremely important hardware in modern electronic technology. At present, UART transceivers are applied in many fields, including healthcare, the Internet of Things, and avionics. Its application in the fields of healthcare and the Internet of Things is of great significance, providing more possibilities for a more convenient life for humanity. Meanwhile, researchers are also attempting to continue improving the transmission speed of UART transceivers and reducing their power consumption.
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Dissertations / Theses on the topic "Universal asynchronous receiver / transmitter (UART)"

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Monti, Michele. "Ottimizzazione di sistemi Wake-Up Radio per applicazioni RFID basate su microcontrollori ultra-low power." Bachelor's thesis, Alma Mater Studiorum - Università di Bologna, 2017. http://amslaurea.unibo.it/13265/.

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Oggetto di studio di questa tesi di laurea è la realizzazione di un firmware dedicato alla sezione logica di controllo di una Wake-up Radio implementata su tag RFID, realizzata attraverso l'utilizzo di un microcontrollore ultra-low power. Per la realizzazione del sistema, si é deciso di utilizzare il microcontrollore Apollo prodotto da Ambiq Micro. Tale dispositivo, basandosi sull'architettura Subthreshold Power Optimized Technology (SPOT) brevettata da Ambiq, utilizza transistori polarizzati in regione di sottosoglia, presentando i migliori valori di consumo dichiarati sul mercato.
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Books on the topic "Universal asynchronous receiver / transmitter (UART)"

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Boles, Melanie. DsPIC33/PIC24 FRM, Multiprotocol Universal Asynchronous Receiver Transmitter (UART) Module. Microchip Technology Incorporated, 2016.

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Boles, Melanie. DsPIC33/PIC24 FRM, Multiprotocol Universal Asynchronous Receiver Transmitter (UART) Module. Microchip Technology Incorporated, 2017.

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Takenaka, Norio. TB3156 - Universal Asynchronous Receiver Transmitter (UART) on 8-Bit PIC Microcontrollers. Microchip Technology Incorporated, 2017.

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Pierce, Linda. TB3156 - Universal Asynchronous Receiver Transmitter (UART) on 8-Bit PIC MCUs. Microchip Technology Incorporated, 2017.

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Zhu, Juliet. TB3156 - Universal Asynchronous Receiver Transmitter (UART) on 8-Bit PIC® Microcontrollers. Microchip Technology Incorporated, 2017.

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Jiang, Linda. DsPIC33/PIC24 Family Reference Manual: Multi-Protocol Universal Asynchronous Receiver Transmitter Module. Microchip Technology Incorporated, 2018.

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Book chapters on the topic "Universal asynchronous receiver / transmitter (UART)"

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Dawoud, Dawoud Shenouda, and Peter Dawoud. "Universal Asynchronous Receiver/Transmitter (UART)." In Serial Communication Protocols and Standards. River Publishers, 2022. http://dx.doi.org/10.1201/9781003339496-2.

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Gadre, Dhananjay V., and Sarthak Gupta. "Universal Asynchronous Receiver and Transmitter (UART)." In Getting Started with Tiva ARM Cortex M4 Microcontrollers. Springer India, 2017. http://dx.doi.org/10.1007/978-81-322-3766-2_12.

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Weik, Martin H. "universal asynchronous receiver-transmitter." In Computer Science and Communications Dictionary. Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_20465.

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"Universal Synchronous Asynchronous Receiver Transmitter (USART)." In Technical Aspects of Data Communication. Elsevier, 1988. http://dx.doi.org/10.1016/b978-1-4831-8400-5.50036-x.

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"◾ Serial Communications Using the Universal Synchronous and Asynchronous Serial Receiver and Transmitter." In Some Assembly Required. CRC Press, 2016. http://dx.doi.org/10.1201/b11791-11.

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Conference papers on the topic "Universal asynchronous receiver / transmitter (UART)"

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Nanda, Umakanta, and Sushant Kumar Pattnaik. "Universal Asynchronous Receiver and Transmitter (UART)." In 2016 3rd International Conference on Advanced Computing and Communication Systems (ICACCS ). IEEE, 2016. http://dx.doi.org/10.1109/icaccs.2016.7586376.

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Gupta, Akash, and Chhagan Charan. "Analysis of Universal Asynchronous Receiver-Transmitter(UART)." In 2024 2nd International Conference on Device Intelligence, Computing and Communication Technologies (DICCT). IEEE, 2024. http://dx.doi.org/10.1109/dicct61038.2024.10532820.

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Gupta, Ashok Kumar, Ashish Raman, Naveen Kumar, and Ravi Ranjan. "Design and Implementation of High-Speed Universal Asynchronous Receiver and Transmitter (UART)." In 2020 7th International Conference on Signal Processing and Integrated Networks (SPIN). IEEE, 2020. http://dx.doi.org/10.1109/spin48934.2020.9070856.

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Sonwane, Rahul, Atul Deshmukh, and Swapna Choudhary. "UART (Universal Asynchronous Receiver Transmitter) for Serial Data Communication: Design and Implementation on FPGA Platform." In 2023 2nd International Conference on Futuristic Technologies (INCOFT). IEEE, 2023. http://dx.doi.org/10.1109/incoft60753.2023.10425295.

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Cosar, Emre I., Maurizio Bocca, and Lasse M. Eriksson. "High Speed Portable Wireless Data Acquisition System for High Data Rate Applications." In ASME 2009 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2009. http://dx.doi.org/10.1115/detc2009-86459.

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Communication between a sink node and a PC can constitute a bottleneck for high data rate applications of wireless sensor networks (WSNs) including, but not limited to, structural health monitoring, condition monitoring, wireless surveillance and patient health monitoring. In this paper, we evaluate four different data acquisition alternatives for data-intensive WSN applications. We will concentrate especially on optimizing UART (universal asynchronous receiver transmitter) communication in conjunction with WSN applications. Furthermore, we propose a new method for sink node to PC communication, which is based on using a USB-connected data acquisition (DAQ) board that samples the node external I/O. This method can provide an efficient solution to transfer data from the sink node to PC at a reasonable cost. Wireless sink node converts the data received from the network into analog signal levels, which are sampled through the DAQ board connected to a PC, and the original data is reconstructed offline. Tests on a wooden bridge built to scale with six wireless sensor nodes and a sink node show that with the proposed method it is possible to collect the data from the network and transfer them onto the PC significantly faster than with the 115.2 kbps UART communication regularly used in WSN applications.
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Realpe Muñoz, Paulo César, Jorge Erazo Aux, Javier Cortés Carvajal, and Javier Vargas. "Diseño e implementación de un sistema de sincronización GPS para la medición de la aceleración usando hardware programable." In Ingeniería para tranformar territorios. Asociación Colombiana de Facultades de Ingeniería - ACOFI, 2023. http://dx.doi.org/10.26507/paper.3320.

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Este trabajo presenta el diseño e implementación de un modelo en hardware programable para la sincronización entre una señal GPS como referencia, y una señal de reloj con una frecuencia de operación fija generada por el mismo diseño usando un lazo de seguimiento de fase digital DPLL (Digital Phase-Locked Loop), que permite la medición de la aceleración en tiempo real usando el acelerómetro ADLX355. Para realizar la sincronización y la medición de la aceleración en el sistema programable, se utilizan los lenguajes de descripción de hardware VHDL y Verilog. Los datos de aceleración del sensor ADLX355 se envían al sistema programable mediante el protocolo de comunicación I2C (Inter-Integrated Circuit). La transmisión de los datos de medición entre el sistema programable y el computador se realiza mediante una interfaz de comunicación UART (Universal Asynchronous Receiver-Transmitter). El diseño hardware se sintetizó en el dispositivo programable 10CL025YU256I7, verificando su funcionamiento en ModelSim y en la placa de desarrollo Intel® Cyclone 10LP. Los resultados de síntesis y desempeño muestran que la implementación diseñada es adecuada para aplicaciones de sistemas embebidos ya que tiene un alto rendimiento y una buena compensación entre el tiempo de cómputo y los recursos del área.
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Chun-zhi, He, Xia Yin-shui, and Wang Lun-yao. "A universal asynchronous receiver transmitter design." In 2011 International Conference on Electronics, Communications and Control (ICECC). IEEE, 2011. http://dx.doi.org/10.1109/icecc.2011.6066542.

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More, Jayesh, Rushank Suryavanshi, Gaurav Dasarwar, S. Sivanantham, and K. Sivasankaran. "FPGA implementation of universal asynchronous transmitter and receiver." In 2015 Online International Conference on Green Engineering and Technologies (IC-GET). IEEE, 2015. http://dx.doi.org/10.1109/get.2015.7453796.

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BERGMAN, L. A., R. TELL, B. SCHOBER, S. T. ENG, and J. PETERSON. "High-speed fiber-optic universal asynchronous receiver transmitter for asynchronous computer communications." In Optical Fiber Communication Conference. OSA, 1987. http://dx.doi.org/10.1364/ofc.1987.tuq23.

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Singh, Sunny, Abhishek Jain, Amanpreet Kaur, and Bishwajeet Pandey. "Thermal Aware Low Power Universal Asynchronous Receiver Transmitter Design on FPGA." In 2014 International Conference on Computational Intelligence and Communication Networks (CICN). IEEE, 2014. http://dx.doi.org/10.1109/cicn.2014.198.

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