Academic literature on the topic 'Universal Verification Methodology (UVM)'
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Journal articles on the topic "Universal Verification Methodology (UVM)"
Kulkarni, Manjiri, and Dr S. P. Meharunnisa. "Study on Transformation to Universal Verification Methodology." International Journal for Research in Applied Science and Engineering Technology 10, no. 8 (2022): 1847–49. http://dx.doi.org/10.22214/ijraset.2022.46466.
Full textNiharika, Sahu, and Sahu Chandrahas. "Boosting chip verification efficiency: UVM-based adder verification with QuestaSim." i-manager's Journal on Digital Signal Processing 11, no. 1 (2023): 16. http://dx.doi.org/10.26634/jdp.11.1.19768.
Full textPulli, A., I. Kremastiotis, and S. Kulis. "Verification methodology of a multi-mode radiation-hard high-speed transceiver ASIC." Journal of Instrumentation 17, no. 03 (2022): C03008. http://dx.doi.org/10.1088/1748-0221/17/03/c03008.
Full textSonali, Sangode, and Sahu Chandrahas. "Design and verification of memory by using UVM methodology." i-manager's Journal on Digital Signal Processing 11, no. 1 (2023): 35. http://dx.doi.org/10.26634/jdp.11.1.19769.
Full textLiao, Chin-Wen, Hsiu-Chou Yu, and Yu-Cheng Liao. "Verification of SPI Protocol Using Universal Verification Methodology for Modern IoT and Wearable Devices." Electronics 14, no. 5 (2025): 837. https://doi.org/10.3390/electronics14050837.
Full text., Geethashree. "Verification of Dual Port RAM using System Verilog and UVM." International Journal for Research in Applied Science and Engineering Technology 9, no. VI (2021): 3651–56. http://dx.doi.org/10.22214/ijraset.2021.35847.
Full textBindu, A. "A rigorous approach to microprocessor verification using UVM." i-manager’s Journal on Electronics Engineering 13, no. 1 (2022): 39. http://dx.doi.org/10.26634/jele.13.1.19344.
Full textS Y, Janardhana. "Verification of AMBA AHB Protocol using UVM." International Journal for Research in Applied Science and Engineering Technology 9, no. VI (2021): 5287–92. http://dx.doi.org/10.22214/ijraset.2021.36203.
Full textResearcher. "UVM METHODOLOGY: INDUSTRY-SPECIFIC APPLICATIONS IN MODERN HARDWARE VERIFICATION." International Journal of Computer Engineering and Technology (IJCET) 15, no. 6 (2024): 20–32. https://doi.org/10.5281/zenodo.14040112.
Full textLi, Haoqiang, and Shikai Zuo. "Functional verification of QSPI module based on UVM implementation." Journal of Physics: Conference Series 2645, no. 1 (2023): 012002. http://dx.doi.org/10.1088/1742-6596/2645/1/012002.
Full textDissertations / Theses on the topic "Universal Verification Methodology (UVM)"
Jayabalan, Arun. "Development of a Massively Parallel Coarse Grained Reconfigurable Fabric verification Environment using Universal Verification Methodology." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-206099.
Full textVavro, Tomáš. "Periferie procesoru RISC-V." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2021. http://www.nusl.cz/ntk/nusl-445553.
Full textTiikkainen, M. (Martti). "Automated functional coverage driven verification with Universal Verification Methodology." Master's thesis, University of Oulu, 2017. http://jultika.oulu.fi/Record/nbnfioulu-201711033027.
Full textYang, Xiaokun. "A High Performance Advanced Encryption Standard (AES) Encrypted On-Chip Bus Architecture for Internet-of-Things (IoT) System-on-Chips (SoC)." FIU Digital Commons, 2016. http://digitalcommons.fiu.edu/etd/2477.
Full textZachariášová, Marcela. "Metody akcelerace verifikace logických obvodů." Doctoral thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2015. http://www.nusl.cz/ntk/nusl-261278.
Full textAraújo, Pedro Manuel Azevedo. "Development of a Reconfigurable Multi-Protocol Verification Environment Using UVM Methodology." Master's thesis, 2014. https://repositorio-aberto.up.pt/handle/10216/73167.
Full textAraújo, Pedro Manuel Azevedo. "Development of a Reconfigurable Multi-Protocol Verification Environment Using UVM Methodology." Dissertação, 2014. https://repositorio-aberto.up.pt/handle/10216/73167.
Full textBooks on the topic "Universal Verification Methodology (UVM)"
A, Meade Kathleen, ed. A practical guide to adopting the Universal Verification Methodology (UVM). Cadence Design Systems, 2010.
Find full textConley, Raymond. Universal Verification Methodology : Doulos Uvm Golden Reference Guide: Uvm Debug. Independently Published, 2021.
Find full textMeade, Kathleen, and Sharon Rosenberg. Practical Guide to Adopting the Universal Verification Methodology (UVM) Ebook. Lulu Press, Inc., 2010.
Find full textSalemi, Ray. The UVM Primer: A Step-by-Step Introduction to the Universal Verification Methodology. Boston Light Press, 2013.
Find full textMeade, Kathleen, and Sharon Rosenberg. A Practical Guide to Adopting the Universal Verification Methodology Second Edition. Lulu.com, 2012.
Find full textBook chapters on the topic "Universal Verification Methodology (UVM)"
Mehta, Ashok B. "UVM (Universal Verification Methodology)." In ASIC/SoC Functional Design Verification. Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-59418-7_4.
Full textNagesh, K. Arpitha, and D. R. Shilpa. "Verification of SerDes Design Using UVM Methodology." In Lecture Notes in Electrical Engineering. Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-0275-7_49.
Full textTieth, Sarabjeet Singh, and P. M. Menghal. "Verification of Microprocessor Using Universal Verification Methodology." In Smart Technologies for Energy, Environment and Sustainable Development, Vol 1. Springer Singapore, 2022. http://dx.doi.org/10.1007/978-981-16-6875-3_41.
Full textMohamed, Khaled Salah. "New Trends in SoC Verification: UVM, Bug Localization, Scan-C0068ain-Based Methodology, GA-Based Test Generation." In Analog Circuits and Signal Processing. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-22035-2_6.
Full textLogeish Raj, R., and Rosmiwati Mohd-Mokhtar. "Autonomous Agent for Universal Verification Methodology Testbench of Hard Memory Controller." In 9th International Conference on Robotic, Vision, Signal Processing and Power Applications. Springer Singapore, 2016. http://dx.doi.org/10.1007/978-981-10-1721-6_2.
Full textRaia, Gaetano, Gianluca Rigano, David Vincenzoni, and Maurizio Martina. "A Case Study on Formal Equivalence Verification Between a C/C++ Model and Its RTL Design." In Lecture Notes in Computer Science. Springer Nature Switzerland, 2024. http://dx.doi.org/10.1007/978-3-031-71177-0_23.
Full textMarconi, Sara, Elia Conti, Pisana Placidi, Andrea Scorzoni, Jorgen Christiansen, and Tomasz Hemperek. "A SystemVerilog-UVM Methodology for the Design, Simulation and Verification of Complex Readout Chips in High Energy Physics Applications." In Lecture Notes in Electrical Engineering. Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-47913-2_5.
Full textBoiko, Yana. "MODELLING AS A METHOD OF COGNITION IN THE HUMANITIESMODELLING AS A METHOD OF COGNITION IN THE HUMANITIES." In Development of scientific, technological and innovation space in Ukraine and EU countries. Publishing House “Baltija Publishing”, 2021. http://dx.doi.org/10.30525/978-9934-26-151-0-1.
Full textConference papers on the topic "Universal Verification Methodology (UVM)"
B V, Uma, and Kumar Muchalambi. "Design and Verification of DDR5 Subsystem Using UVM Methodology." In 2024 8th International Conference on Computational System and Information Technology for Sustainable Solutions (CSITSS). IEEE, 2024. https://doi.org/10.1109/csitss64042.2024.10817033.
Full textBhuneswary, N., K. Kiran Kumar Reddy, M. Surya Sagar Reddy, K. Venkata Sai, and K. Satyanarayana. "Serial Peripheral Interface with SOC Using Universal Verification Methodology." In 2024 Global Conference on Communications and Information Technologies (GCCIT). IEEE, 2024. https://doi.org/10.1109/gccit63234.2024.10862338.
Full textQamar, Shumaila, Wasi Haider Butt, Muhammad Waseem Anwar, Farooque Azam, and Muhammad Qasim Khan. "A Comprehensive Investigation of Universal Verification Methodology (UVM) Standard for Design Verification." In ICSCA 2020: 2020 9th International Conference on Software and Computer Applications. ACM, 2020. http://dx.doi.org/10.1145/3384544.3384547.
Full textLoh, Siu Hong, You Hong Liew, and Jia Jia Sim. "VLSI Design Course with Verification of RISC-V Design using Universal Verification Methodology (UVM)." In 2022 IEEE 12th International Conference on Control System, Computing and Engineering (ICCSCE). IEEE, 2022. http://dx.doi.org/10.1109/iccsce54767.2022.9935582.
Full textShui, Xuanxuan, Yichun Wu, Junyi Zhou, and Yuanfeng Cai. "Component and Integration Test of an FPGA-Based PWR Protection Sub-System Using UVM." In 2017 25th International Conference on Nuclear Engineering. American Society of Mechanical Engineers, 2017. http://dx.doi.org/10.1115/icone25-66526.
Full textDrechsler, Rolf, Christophe Chevallaz, Franco Fummi, et al. "Panel: Future SoC verification methodology: UVM evolution or revolution?" In Design Automation and Test in Europe. IEEE Conference Publications, 2014. http://dx.doi.org/10.7873/date2014.385.
Full textDrechsler, Rolf, Christophe Chevallaz, Franco Fummi, et al. "Panel: Future SoC verification methodology: UVM evolution or revolution?" In Design Automation and Test in Europe. IEEE Conference Publications, 2014. http://dx.doi.org/10.7873/date.2014.385.
Full textFathy, Khaled, and Khaled Salah. "An Efficient Scenario Based Testing Methodology Using UVM." In 2016 17th International Workshop on Microprocessor and SOC Test and Verification (MTV). IEEE, 2016. http://dx.doi.org/10.1109/mtv.2016.14.
Full textSu, Rui, Rui Chen, Yongping Men, and Xinen Cao. "Study on universal automatic FPGA simulation verification platform based on UVM." In 2023 3rd International Conference on Digital Signal and Computer Communications (DSCC 2023), edited by Yang Yue and Shuwen Xu. SPIE, 2023. http://dx.doi.org/10.1117/12.2685650.
Full textBiswal, Barada P., Anurag Singh, and Balwinder Singh. "Cache coherency controller verification IP using SystemVerilog Assertions (SVA) and Universal Verification Methodologies (UVM)." In 2017 11th International Conference on Intelligent Systems and Control (ISCO). IEEE, 2017. http://dx.doi.org/10.1109/isco.2017.7855984.
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