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Journal articles on the topic 'Variable gain power amplifier'

Author: Grafiati

Published: 7 July 2024

Last updated: 31 July 2025

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1

Choi, Ye-Ji, and Jee-Youl Ryu. "Design of Low-Power Variable Gain Amplifier." Journal of Institute of Control, Robotics and Systems 28, no. 1 (2022): 1–5. http://dx.doi.org/10.5302/j.icros.2022.21.0138.

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2

Zhang, Jing Zhi. "A 520MHz Wideband Variable Gain Amplifier." Applied Mechanics and Materials 556-562 (May 2014): 1564–67. http://dx.doi.org/10.4028/www.scientific.net/amm.556-562.1564.

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The design and realization of a wideband variable gain amplifier for RF system is presented. The cascade of LNA and controllable attenuation makes the design have a 0-90dB gain adjustment range. Special care is devoted to the solution of typical problems encountered in the design of the amplifier, such as signal shielding and power supply decoupling. The amplifier uses passive amplitude-frequency equalization, 0.1-460MHz band variation is less than 1dB, the 3dB bandwidth is up to 520MHz. The noise characteristic is low, the total input referred noise is less than 15.5nV⁄√¯Hz.

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3

Fujimoto, Y., H. Tani, M. Maruyama, H. Akada, H. Ogawa, and M. Miyamoto. "A low-power switched-capacitor variable gain amplifier." IEEE Journal of Solid-State Circuits 39, no. 7 (2004): 1213–16. http://dx.doi.org/10.1109/jssc.2004.829919.

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4

Vintola, V. T. S., M. J. Matilainen, S. J. K. Kalajo, and E. A. Jarvinen. "Variable-gain power amplifier for mobile WCDMA applications." IEEE Transactions on Microwave Theory and Techniques 49, no. 12 (2001): 2464–71. http://dx.doi.org/10.1109/22.971637.

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5

Huang, Yan-Yu, Wangmyong Woo, Hamhee Jeon, Chang-Ho Lee, and J. Stevenson Kenney. "Compact Wideband Linear CMOS Variable Gain Amplifier for Analog-Predistortion Power Amplifiers." IEEE Transactions on Microwave Theory and Techniques 60, no. 1 (2012): 68–76. http://dx.doi.org/10.1109/tmtt.2011.2175234.

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6

Quoc-Hoang Duong, Quan Le, Chang-Wan Kim, and Sang-Gug Lee. "A 95-dB linear low-power variable gain amplifier." IEEE Transactions on Circuits and Systems I: Regular Papers 53, no. 8 (2006): 1648–57. http://dx.doi.org/10.1109/tcsi.2006.879058.

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Tang, Fang, Amine Bermak, Amira Abbes та Mohieddine Amor Benammar. "Continuous-TimeΣΔADC with Implicit Variable Gain Amplifier for CMOS Image Sensor". Scientific World Journal 2014 (2014): 1–7. http://dx.doi.org/10.1155/2014/208540.

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This paper presents a column-parallel continuous-time sigma delta (CTSD) ADC for mega-pixel resolution CMOS image sensor (CIS). The sigma delta modulator is implemented with a 2nd order resistor/capacitor-based loop filter. The first integrator uses a conventional operational transconductance amplifier (OTA), for the concern of a high power noise rejection. The second integrator is realized with a single-ended inverter-based amplifier, instead of a standard OTA. As a result, the power consumption is reduced, without sacrificing the noise performance. Moreover, the variable gain amplifier in th

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Xie, Hongyun, Shuo Liu, Lianghao Zhang, et al. "Low power dissipation SiGe HBT dual-band variable gain amplifier." Microelectronics Journal 46, no. 7 (2015): 626–31. http://dx.doi.org/10.1016/j.mejo.2015.03.007.

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9

Kang, So Young, Jooyoung Jang, Inn-Yeal Oh, and Chul Soon Park. "A 2.16 mW Low Power Digitally-Controlled Variable Gain Amplifier." IEEE Microwave and Wireless Components Letters 20, no. 3 (2010): 172–74. http://dx.doi.org/10.1109/lmwc.2010.2040222.

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10

Mustaffa, Mohd Tafir. "A Variable-Gain Low-Noise Amplifier for MedRadio Band Applications." International Journal of Electrical and Electronic Engineering & Telecommunications 13, no. 4 (2024): 293–303. http://dx.doi.org/10.18178/ijeetc.13.4.293-303.

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A variable-gain 0.18 μm Complementary Metal- Oxide-Semiconductor (CMOS) Low-Noise Amplifier (LNA) for Medical Device Radiocommunications Service (MedRadio) applications has been designed and verified through simulations in Cadence IC5 with Silterra’s C18G CMOS technology Process Design Kit. Unlike other MedRadio LNAs from previous works, this proposed LNA can vary its gain from just above 10 dB to nearly 30 dB. It consists of three stages; the input-matching stage, the interstage buffer, and the gain-varying stage. The input-matching stage provides an input impedance match and drives the initi

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11

Kledrowetz, Vilem, Roman Prokop, Lukas Fujcik, Michal Pavlik, and Jiří Háze. "Low-power ASIC suitable for miniaturized wireless EMG systems." Journal of Electrical Engineering 70, no. 5 (2019): 393–99. http://dx.doi.org/10.2478/jee-2019-0071.

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Abstract Nowadays, the technology advancements of signal processing, low-voltage low-power circuits and miniaturized circuits have enabled the design of compact, battery-powered, high performance solutions for a wide range of, particularly, biomedical applications. Novel sensors for human biomedical signals are creating new opportunities for low weight wearable devices which allow continuous monitoring together with freedom of movement of the users. This paper presents the design and implementation of a novel miniaturized low-power sensor in integrated circuit (IC) form suitable for wireless e

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12

Lahiani, Sawssen, Samir Ben Salem, Houda Daoud, and Mourad Loulou. "A CMOS Low-Power Digital Variable Gain Amplifier Design for a Cognitive Radio Receiver “Application for IEEE 802.22 Standard”." Journal of Circuits, Systems and Computers 27, no. 09 (2018): 1850135. http://dx.doi.org/10.1142/s0218126618501359.

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This paper presents the design of a new Digital Variable Gain Amplifier cell (DVGA). The proposed circuit based on transconductance, gm, amplifier and a transconductance amplifier is analyzed and designed for a cognitive radio receiver. The variable-gain amplifier (VGA) proposed consists of a digital control block, an auxiliary pair to retain a constant current density, and offers a gain-independent bandwidth (BW). A novel cell structure is designed for high gain, high BW, low power consumption and low Noise Figure (NF). The Heuristic Method is used to optimize the proposed circuit performance

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13

Motamed, A., Changku Hwang, and M. Ismail. "A low-voltage low-power wide-range CMOS variable gain amplifier." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 45, no. 7 (1998): 800–811. http://dx.doi.org/10.1109/82.700927.

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14

Liao, Hsien-Yuan, Kuan-Yu Chen, Joseph D. S. Deng та Hwann-Kaeo Chiou. "0.35-μm SiGe BiCMOS variable-gain power amplifier for WiMAX transmitters". Microwave and Optical Technology Letters 49, № 11 (2007): 2750–53. http://dx.doi.org/10.1002/mop.22851.

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15

Iji, Ayobami, Xi Zhu, and Michael Heimlich. "High gain/power quotient variable-gain wideband low-noise amplifier for capsule endoscopy application." Microwave and Optical Technology Letters 54, no. 11 (2012): 2563–65. http://dx.doi.org/10.1002/mop.27111.

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16

Arbet, Daniel, Viera Stopjaková, Martin Kováč, Lukáš Nagy, Matej Rakús, and Michal Šovčík. "130 nm CMOS Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications." Journal of Circuits, Systems and Computers 26, no. 08 (2017): 1740003. http://dx.doi.org/10.1142/s0218126617400035.

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In this paper, a variable gain amplifier (VGA) designed in 130 nm CMOS technology is presented. The proposed amplifier is based on the bulk-driven (BD) design approach, which brings a possibility to operate with low supply voltage. Since the supply voltage of only 0.6 V is used for the amplifier to operate, there is no risk of latch-up event that usually represents the main drawback of the BD circuit systems. BD transistors are employed in the input differential stage, which makes it possible to operate in rail-to-rail input voltage range. Achieved simulation results indicate that gain of the

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17

Alam, M. J., Mohammad Arif Sobhan Bhuiyan, Md Torikul Islam Badal, Mamun Bin Ibne Reaz, and Noorfazila Kamal. "Design of a low-power compact CMOS variable gain amplifier for modern RF receivers." Bulletin of Electrical Engineering and Informatics 9, no. 1 (2020): 87–93. http://dx.doi.org/10.11591/eei.v9i1.1468.

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The demand for portability has speeded up the design of low-power electronic communication devices. Variable gain amplifier (VGA) is one of the most vulnerable elements of every modern receiver for the proper baseband processing of the signal. CMOS VGAs are generally suffered from low bandwidth and small gain range. In this research, a two-stage class AB VGA, each stage comprising of a direct transconductance amplifier and a linear transimpedance amplifier, is designed in Silterra 0.13-μm CMOS utilizing Mentor Graphics environment. The post-layout simulation results reveal that the VGA design

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18

M., J. Alam, A. S. Bhuiyan M., T. I. Badal M., B. I. Reaz M., and Kamal N. "Design of a low-power compact CMOS variable gain amplifier for modern RF receivers." Bulletin of Electrical Engineering and Informatics 9, no. 1 (2020): 87–93. https://doi.org/10.11591/eei.v9i1.1468.

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The demand for portability has speeded up the design of low-power electronic communication devices. Variable gain amplifier (VGA) is one of the most vulnerable elements of every modern receiver for the proper baseband processing of the signal. CMOS VGAs are generally suffered from low bandwidth and small gain range. In this research, a two-stage class AB VGA, each stage comprising of a direct transconductance amplifier and a linear transimpedance amplifier, is designed in Silterra 0.13-μm CMOS utilizing Mentor Graphics environment. The post-layout simulation results reveal that the VGA desi

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19

Han, Jingyu, Yu Jiang, Guiliang Guo, and Xu Cheng. "A Reconfigurable Analog Baseband Circuitry for LFMCW RADAR Receivers in 130-nm SiGe BiCMOS Process." Electronics 9, no. 5 (2020): 831. http://dx.doi.org/10.3390/electronics9050831.

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A highly reconfigurable open-loop analog baseband circuitry with programmable gain, bandwidth and filter order are proposed for integrated linear frequency modulated continuous wave (LFMCW) radar receivers in this paper. This analog baseband chain allocates noise, gain and channel selection specifications to different stages, for the sake of noise and linearity tradeoffs, by introducing a multi-stage open-loop cascaded amplifier/filter topology. The topology includes a course gain tuning pre-amplifier, a folded Gilbert variable gain amplifier (VGA) with a symmetrical dB-linear voltage generato

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20

ZIABAKHSH, SOHEYL, HOSEIN ALAVI-RAD, MORTEZA ALINIA AHANDANI, and MUSTAPHA C. E. YAGOUB. "DESIGN AND OPTIMIZATION OF A FULLY DIFFERENTIAL CMOS VARIABLE-GAIN LNA WITH DIFFERENTIAL EVOLUTION ALGORITHM FOR WLAN APPLICATIONS." Journal of Circuits, Systems and Computers 23, no. 09 (2014): 1450124. http://dx.doi.org/10.1142/s0218126614501242.

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In this paper, we optimized the performance of a 2.4 GHz variable gain low-noise amplifier for WLAN applications which provides high dynamic range with relatively low power consumption. First, the differential evolution algorithm was used to optimize the width of input transistors, then the tunable on-chip switching stage method was applied to control the amplifier gain when the input signal increases. The optimization was performed in terms of gain, noise figure (NF), IIP3 and power dissipation. The LNA has achieved a variable gain from 16.55 to 20.45 dB with excellent NF between 1.63 and 1.7

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21

Semsar Parapari, Ehsan, Elmira Semsar Parapari, Ziaddin Daie Koozehkanani, and Siroos Toofan. "A low power 102 dB Reconfigurable Variable Gain Amplifier for Multistandard Receivers." AEU - International Journal of Electronics and Communications 132 (April 2021): 153631. http://dx.doi.org/10.1016/j.aeue.2021.153631.

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22

Nguyen, H. H., Q. H. Duong, H. B. Le, J. S. Lee, and S. G. Lee. "Low-power 42 dB-linear single-stage digitally-controlled variable gain amplifier." Electronics Letters 44, no. 13 (2008): 780. http://dx.doi.org/10.1049/el:20081269.

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23

Chen, Zhiming, Yuanjin Zheng, Foo Chung Choong, and Minkyu Je. "A Low-Power Variable-Gain Amplifier With Improved Linearity: Analysis and Design." IEEE Transactions on Circuits and Systems I: Regular Papers 59, no. 10 (2012): 2176–85. http://dx.doi.org/10.1109/tcsi.2012.2185331.

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24

Sánchez‐Rodríguez, Trinidad, Juan Antonio Galán, Manuel Pedro, Antonio J. López‐Martín, Ramon G. Carvajal, and Jaime Ramírez‐Angulo. "Low‐power CMOS variable gain amplifier based on a novel tunable transconductor." IET Circuits, Devices & Systems 9, no. 2 (2015): 105–10. http://dx.doi.org/10.1049/iet-cds.2014.0130.

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25

Ma, Dongsheng, Chen Zheng, Hio Leong Chao, and Mike Koen. "Integrated low-power CMFB-free variable-gain amplifier for ultrasound diagnostic applications." Analog Integrated Circuits and Signal Processing 61, no. 2 (2009): 171–79. http://dx.doi.org/10.1007/s10470-009-9296-8.

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26

Xuelian, Zhang, Yan Jun, Shi Yin, and Dai Fa Foster. "5.2 GHz variable-gain amplifier and power amplifier driver for WLAN IEEE 802.11a transmitter front-end." Journal of Semiconductors 30, no. 1 (2009): 015008. http://dx.doi.org/10.1088/1674-4926/30/1/015008.

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27

Lee, Samuel B. S., Hang Liu, Kiat Seng Yeo, Jer-Ming Chen, and Xiaopeng Yu. "Design of Differential Variable-Gain Transimpedance Amplifier in 0.18 µm SiGe BiCMOS." Electronics 9, no. 7 (2020): 1058. http://dx.doi.org/10.3390/electronics9071058.

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This paper presents two new inductorless differential variable-gain transimpedance amplifiers (DVGTIA) with voltage bias controlled variable gain designed in TowerJazz’s 0.18 µm SiGe BiCMOS technology (using CMOS transistors only). Both consist of a modified differential cross-coupled regulated cascode preamplifier stage and a cascaded amplifier stage with bias-controlled gain-variation and third-order interleaving feedback. The designs have wide measured transimpedance gain ranges of 24.5–60.6 dBΩ and 27.8–62.8 dBΩ with bandwidth above 6.42 GHz and 5.22 GHz for DVGTIA designs 1 and 2 respecti

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28

Duan, Ji Hai, and Chun Lei Kang. "A Fully Integrated 5.2-GHz CMOS Variable Gain LNA for 802.11a WLAN." Advanced Materials Research 433-440 (January 2012): 5579–83. http://dx.doi.org/10.4028/www.scientific.net/amr.433-440.5579.

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A fully integrated 5.2GHz variable gain low noise amplifier (VGLNA) in a 0.18μm CMOS process is proposed in this paper. The VGLAN can achieve a maximum small signal gain of 17.85 dB within the noise figure (NF) of 2.04 dB and a minimum gain of 2.04 dB with good input return loss. The LNA’s P1dB in the high gain mode is -17.5 dBm. The LAN consumes only 14.58 mW from a 1.8V power supply.

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29

DUONG, Q. H., C. W. KIM, and S. G. LEE. "All CMOS Low-Power Wide-Gain Range Variable Gain Amplifiers." IEICE Transactions on Electronics E91-C, no. 5 (2008): 788–97. http://dx.doi.org/10.1093/ietele/e91-c.5.788.

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30

Nam, Hyosung, Taejoo Sim, and Junghyun Kim. "A 2.4 GHz 20 W 8-channel RF Source Module with Solid-State Power Amplifiers for Plasma Generators." Electronics 9, no. 9 (2020): 1378. http://dx.doi.org/10.3390/electronics9091378.

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This paper presents a novel multi-channel type RF source module with solid-state power amplifiers for plasma generators. The proposed module is consisted of a DC control part, RF source generation part, and power amplification part. A 2-stage power amplifier (PA) is combined with a gallium arsenide hetero bipolar transistor (GaAs HBT) as a drive PA and a gallium nitride high electron mobility transistor (GaN HEMT) as a main PA, respectively. By employing 8 channels, the proposed module secures better area coverage on the wafer during semiconductor processes such as chemical vapor deposition (C

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31

Bao, Jiazhen, Yifeng Cao, and Qian Huang. "Maximum gain optimization of thulium-doped fiber amplifier based on genetic algorithm for peak gain spectrum at 1800- 2000nm." Applied and Computational Engineering 10, no. 1 (2023): 72–78. http://dx.doi.org/10.54254/2755-2721/10/20230143.

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The optical fiber amplifier doped with rare earth elements has the characteristics of high gain, high doping concentration and short length. Compared with other fiber optic systems, the fiber used is shorter, also known as lumped fiber amplifier. At present, Er, Pr, Tm, Nd and Yb doped fiber amplifiers and lasers are mainly studied more. To further extend the transmission distance, improve the transmission quality and increase the transmission capacity, it is very important for the research of fiber amplifier. In this research, using a two-level structure, we investigate the maximum of the pea

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32

Shin, Gibeom, Kyunghwan Kim, Kangseop Lee, Hyun-Hak Jeong, and Ho-Jin Song. "An E-Band 21-dB Variable-Gain Amplifier with 0.5-V Supply in 40-nm CMOS." Electronics 10, no. 7 (2021): 804. http://dx.doi.org/10.3390/electronics10070804.

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This paper presents a variable-gain amplifier (VGA) in the 68–78 GHz range. To reduce DC power consumption, the drain voltage was set to 0.5 V with competitive performance in the gain and the noise figure. High-Q shunt capacitors were employed at the gate terminal of the core transistors to move input matching points for easy matching with a compact transformer. The four stages amplifier fabricated in 40-nm bulk complementary metal oxide semiconductor (CMOS) showed a peak gain of 24.5 dB at 71.3 GHz and 3‑dB bandwidth of more than 10 GHz in 68–78 GHz range with approximately 4.8-mW power consu

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33

Rahmatian, Behnoosh, та Shahriar Mirabbasi. "A low-power 75 dB digitally programmable variable-gain amplifier in 0.18μm CMOS". Canadian Journal of Electrical and Computer Engineering 32, № 4 (2007): 181–86. http://dx.doi.org/10.1109/cjece.2007.4407663.

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34

van Lieshout, P. J. G., and R. J. van de Plassche. "A power-efficient, low-distortion variable gain amplifier consisting of coupled differential pairs." IEEE Journal of Solid-State Circuits 32, no. 12 (1997): 2105–10. http://dx.doi.org/10.1109/4.643668.

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35

Wu, Junjie, and Jianhui Wu. "A 12-Bit 200 MS/s Pipelined-SAR ADC Using Back-Ground Calibration for Inter-Stage Gain." Electronics 9, no. 3 (2020): 507. http://dx.doi.org/10.3390/electronics9030507.

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A 12-bit 200 MS/s pipelined successive-approximation-register (SAR) analogue-to-digital-converter (ADC) implemented in 40 nm CMOS is presented. Such an ADC consists of two asynchronous SAR ADCs and a dynamic amplifier, which consumes a static power of 1.2 mW (the total power is 8 mW) and occupies an area of 0.046 mm2. The inter-stage gain is affected by the parasitic capacitance in SAR ADCs as well as the gain of the dynamic amplifier, which is variable with respect to process-voltage-temperature (PVT). A background calibration of the inter-stage gain is proposed to adjust the inter-stage gain

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36

Zhang, Wei Jia, and Bo Wang. "A SiGe HBT Variable Gain Amplifier for Wireless Receiver System with On-Chip Filter." Applied Mechanics and Materials 155-156 (February 2012): 167–70. http://dx.doi.org/10.4028/www.scientific.net/amm.155-156.167.

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A using SiGe HBT variable gain amplifier (VGA) with filtering for wireless receiver system is presented in this paper. The VGA consists of three stages. The first stage is the gain control stage, and the second stage is the fixed gain stage. The third is the GM-C filter. The VGA is driven by a 3.3-V power supply, and linear gain control range varying is from 26 dB to 62dB. When control voltage varies from 0 to 1.8V. The input 1-dB compression point is -4dBm at minimum gain. The VGA is fabricated in a 0.5 μm = 80GHz and =90GHz silicon germanium heterojunction transistor technology.

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37

Kumar, Vijay, and Sujatha Ravichandran. "A Low Noise Variable Gain Amplifier with 97.2 dB Linear Gain Range for CW Radar." Defence Science Journal 74, no. 01 (2023): 85–90. http://dx.doi.org/10.14429/dsj.74.19149.

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This manuscript reports the design of a low noise variable gain amplifier (VGA) having wide dB linear gain characteristics for a continuous wave (CW) radar. A pseudo-exponential gain control function has been adopted in this VGA for the wide dB-linear behavior. Also, a BJT-based gain stage has been proposed to improve the gain dynamic range and low noise performance due to its higher transconductance/gain and lower flicker noise contribution. This proposed 2-gain stage VGA has been implemented in 130 nm SiGe bipolar complementary metal–oxide–semiconductor (BiCMOS) technology. This design perfo

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Lee, Lini, Roslina Mohd Sidek, Sudhanshu Shekhar Jamuar, and Sabira Khatun. "Cascode Current Mirror for a Variable Gain Stage in a 1.8 GHz Low Noise Amplifier (LNA)." ECTI Transactions on Electrical Engineering, Electronics, and Communications 6, no. 1 (2007): 47–52. http://dx.doi.org/10.37936/ecti-eec.200861.171760.

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A high frequency CMOS variable gain low noise amplifier (VGLNA) constructed based on an inductive source degenerated LNA and a cascode current mirror is proposed. The 'variable' concept is to prevent the unwanted saturation phenomenon due to large input signal. A cascode current mirror cell which consumes minimal voltage headroom without sacrificing the accuracy of the circuit is proposed in the circuit. With a 0.18 m CMOS technology, this technique is applied on a VGLNA operating at 1.8 GHz for GSM band application. The simulation results reveal that the maximum gain is 17.29 dB with gain tun

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39

Zhang, Da Hui, Ze Dong Nie, Feng Guan, and Lei Wang. "An Energy-Efficient Receiver for Human Body Communication." Applied Mechanics and Materials 195-196 (August 2012): 84–89. http://dx.doi.org/10.4028/www.scientific.net/amm.195-196.84.

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A low-power, wideband signaling receiver for data transmission through a human body was presented in this paper. The receiver utilized a novel implementation of energy-efficient wideband impulse communication that uses the human body as the transmission medium, provides low power consumption, high reception sensitivity. The receiver consists of a low-noise amplifier, active balun, variable gain amplifier (VGA) Gm-C filter, comparator, and FSK demodulator. It was designed with 0.18um CMOS process in an active area of 1.54mm0.414mm. Post-simulation showed that the receiver has a gain range of-2d

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Zhao, Yinan, Jinwu Zhuang, Zhihao Ye, Zhiliang Qian, and Fang Peng. "Simulation of Steady-State Temperature Rise of Electric Heating Field of Wireless Sensor Circuit Fault Current Trigger." Journal of Sensors 2021 (September 30, 2021): 1–11. http://dx.doi.org/10.1155/2021/8359504.

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This article analyzes the structure of the wireless sensor circuit, considering the balance of power consumption, integration, area, noise, etc., and adopts a radio frequency wireless sensor circuit with a low-IF structure. Through the analysis and comparison of traditional analog current trigger and digital current trigger structure, the feed-forward current trigger structure is selected, which is composed of received signal strength indicator (RSSI) and variable gain amplifier (VGA), which achieves low power consumption, fast stabilization time, and wide dynamic range design. The received si

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41

Jazayeri, Farzan, Behjat Forouzandeh, and Farshid Raissi. "Low-power variable gain amplifier with wide UGBW based on nanoscale Field Effect Diode." IEICE Electronics Express 6, no. 1 (2009): 51–57. http://dx.doi.org/10.1587/elex.6.51.

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42

Ma, Rui, Maliang Liu, Hao Zheng, and Zhangming Zhu. "A 77-dB Dynamic Range Low-Power Variable-Gain Transimpedance Amplifier for Linear LADAR." IEEE Transactions on Circuits and Systems II: Express Briefs 65, no. 2 (2018): 171–75. http://dx.doi.org/10.1109/tcsii.2017.2684822.

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43

Rivetti, A. "A low-power variable-gain front-end amplifier in a 0.25 μm CMOS technology". IEEE Transactions on Nuclear Science 50, № 4 (2003): 948–54. http://dx.doi.org/10.1109/tns.2003.815131.

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44

Lahiani, Sawssen, Houda Daoud, Samir Ben Salem, and Mourad Loulou. "Low power CMOS variable gain amplifier design for a multistandard receiver WLAN/WIMAX/LTE." Analog Integrated Circuits and Signal Processing 101, no. 2 (2019): 255–65. http://dx.doi.org/10.1007/s10470-019-01509-8.

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45

del Pino, J., Sunil L. Khemchandani, D. Galante-Sempere, and C. Luján-Martínez. "A Compact Size Wideband RF-VGA Based on Second Generation Controlled Current Conveyors." Electronics 9, no. 10 (2020): 1600. http://dx.doi.org/10.3390/electronics9101600.

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This paper presents a methodology to design a wideband radio frequency variable gain amplifier (RF-VGA) in a low-cost SiGe BiCMOS 0.35 μm process. The circuit uses two Class A amplifiers based on second-generation controlled current conveyors (CCCII). The main feature of this circuit is the wideband input match along with a reduced NF (5.5–9.6 dB) and, to the authors’ knowledge, the lowest die footprint reported (62 × 44 μm2 area). The implementation of the RF-VGA based on CCCII allows a wideband input match without the need of passive elements. Due to the nature of the circuit, when the gain

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Togawa, Kazuaki, Hirokazu Maesaka, Reichiro Kobana, and Hitoshi Tanaka. "Frequency-segmented power amplification using multi-band radio frequency amplifiers to produce a high-voltage pulse." Review of Scientific Instruments 93, no. 7 (2022): 073304. http://dx.doi.org/10.1063/5.0093915.

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A method of frequency-segmented power amplification using multiband radio frequency (RF) amplifiers was proposed to generate stable and arbitrary high-voltage pulses. The concept behind this method is that an arbitrary pulse with a specified duration and sharp edges can be reconstructed using only several frequencies, and most of the power is concentrated on the fundamental frequency. The high-voltage pulse can, therefore, be obtained by amplifying each segmented frequency and then combining it with the RF power combiners. To correct the frequency-dependent group delays and gain of the amplifi

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47

Nam, Hyungseok, Dang-An Nguyen, Yanghyun Kim, and Chulhun Seo. "Design of 6 GHz Variable-Gain Low-Noise Amplifier Using Adaptive Bias Circuit for Radar Receiver Front End." Electronics 12, no. 9 (2023): 2036. http://dx.doi.org/10.3390/electronics12092036.

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This paper presents a variable-gain low-noise amplifier (VGLNA) based on an adaptive bias (ADB) circuit for the radar receiver front end. The ADB circuit processes the signal separated by a coupler at the LNA output port. First, the ADB circuit rectifies the coupled signal into positive DC voltage through a rectifier, which is then inverted to control a junction-gate field-effect transistor (JFET). The voltage-controlled current of JFET flows through a voltage-divider network and finally produces the DC biasing voltage for the BJT base termination, which decreases with the increase in the inpu

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48

Chilukuri, Manu, Sungyong Jung, and Hoon-Ju Chung. "A Charge Amplifier Based Complementary Metal–Oxide–Semiconductor Analog Front End for Piezoelectric Microphones in Hearing Aid Devices." Journal of Low Power Electronics 15, no. 3 (2019): 315–22. http://dx.doi.org/10.1166/jolpe.2019.1615.

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In this paper, a low noise and low power analog front end for piezoelectric microphones used in hearing aid devices is presented. It consists of a Charge Amplifier, followed by a Variable Gain Amplifier and an Analog-to-Digital Converter. At the core of charge amplifier a two stage opamp with modified cascode current mirror is designed which achieves a gain of 93 dB and phase margin of 62°. Designed analog front end achieves an input referred noise of 0.12 μVrms and SNR of 74 dB. It consumes power of 430 μW from 1.8 V supply and occupies an area of 1.2 mm × 0.22 mm. Proposed circuit is designe

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Wang, Yanjie, Bagher Afshar, Lu Ye, Vincent C. Gaudet, and Ali M. Niknejad. "Design of a Low Power, Inductorless Wideband Variable-Gain Amplifier for High-Speed Receiver Systems." IEEE Transactions on Circuits and Systems I: Regular Papers 59, no. 4 (2012): 696–707. http://dx.doi.org/10.1109/tcsi.2011.2169852.

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Hau, G., T. B. Nishimura, and N. Iwata. "High efficiency, wide dynamic range variable gain and power amplifier MMICs for wideband CDMA handsets." IEEE Microwave and Wireless Components Letters 11, no. 1 (2001): 13–15. http://dx.doi.org/10.1109/7260.905953.

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