Academic literature on the topic 'Very large scale integration'

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Journal articles on the topic "Very large scale integration"

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Hirose, Masataka. "Future very-large-scale integration technology." Materials Science and Engineering: B 1, no. 3-4 (1988): 213–20. http://dx.doi.org/10.1016/0921-5107(88)90001-3.

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Murarka, Shyam P. "Codeposited silicides in very-large-scale integration." Thin Solid Films 140, no. 1 (1986): 35–50. http://dx.doi.org/10.1016/0040-6090(86)90157-4.

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Jiang, Q., Y. F. Zhu, and M. Zhao. "Copper Metallization for Current Very Large Scale Integration." Recent Patents on Nanotechnology 5, no. 2 (2011): 106–37. http://dx.doi.org/10.2174/187221011795909152.

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Joswig, H., A. Kohlhase, and P. Ku¨cher. "Advanced metallization of very-large-scale integration devices." Thin Solid Films 175 (August 1989): 17–22. http://dx.doi.org/10.1016/0040-6090(89)90802-x.

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Saxena, A. N., and D. Pramanik. "Megaelectronvolt implantations in silicon very-large-scale integration." Materials Science and Engineering: B 2, no. 1-3 (1989): 1–13. http://dx.doi.org/10.1016/0921-5107(89)90069-x.

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P, Sukumar. "Very-Large-Scale Integration Design." Journal of Electrical & Electronic Systems 06, no. 01 (2017). http://dx.doi.org/10.4172/2332-0796.1000e120.

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"Isolation tecniques for very large scale integration." Microelectronics Journal 16, no. 4 (1985): 41. http://dx.doi.org/10.1016/s0026-2692(85)80092-6.

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"19th international conference on very large scale integration." IEEE Embedded Systems Letters 3, no. 1 (2011): 51. http://dx.doi.org/10.1109/les.2011.2129930.

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"1989 Canadian conference on very large scale integration." Integration 7, no. 1 (1989): 99–100. http://dx.doi.org/10.1016/0167-9260(89)90066-7.

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"IEEE Transactions on Very Large Scale Integration (VLSI) Systems." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29, no. 2 (2021): C3. http://dx.doi.org/10.1109/tvlsi.2021.3053710.

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Dissertations / Theses on the topic "Very large scale integration"

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Gross, Peter Alan. "Rapid single flux quantum very large scale integration." Thesis, Stellenbosch : Stellenbosch University, 2002. http://hdl.handle.net/10019.1/49734.

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Thesis (MScEng)--University of Stellenbosch, 2002.<br>ENGLISH ABSTRACT: Very Large Scale Integration (VLSI) of the Rapid Single Flux Quantum (RSFQ) superconducting logic family is researched. Insight into the design methodologies used for large-scale digital systems and related logistics are reviewed. A brief overview of basic RSFQ logic gates with in mind their application in a cell based layout scheme suited for RSFQ is given. A standard cell model is then proposed, incorporating these cells, on which, a library of low temperature superconducting (L TS) cells are laid out. Research is
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Le, Riguer E. M. J. "Generic VLSI architectures : chip designs for image processing applications." Thesis, Queen's University Belfast, 2001. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.368593.

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Bampi, Sergio. "A modified lightly doped drain mosfet for very large scale integration." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 1987. http://hdl.handle.net/10183/17967.

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Reducing MOSFET dimensions while maintaining a constant supply voltage leads to higher electric fields inside the active regions of VLSI transistors. Operation of micron and submicron MOSFETs in the presence of high-field effects has required design innovations so that a constant supply voltage, acceptable punchthrough voltage, and long-term reliability are possible as device scaling continues. Drain engineering is necessary to cope with the susceptibility of MOSFETs to hot-carrier-related degradation. Reducing the electric fields at the drain end of the channel is critical to device reliabili
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Hong, Won-kook. "Single layer routing : mapping topological to geometric solutions." Thesis, McGill University, 1986. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=66030.

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Jafar, Mutaz 1960. "THERMAL MODELING/SIMULATION OF LEVEL 1 AND LEVEL 2 VLSI PACKAGING." Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/276959.

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Voranantakul, Suwan 1962. "CONDUCTIVE AND INDUCTIVE CROSSTALK COUPLING IN VLSI PACKAGES." Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/277037.

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Matsumori, Barry Alan. "QUALIFICATION RESEARCH FOR RELIABLE, CUSTOM LSI/VLSI ELECTRONICS." Thesis, The University of Arizona, 1985. http://hdl.handle.net/10150/275313.

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Hum, Herbert Hing-Jing. "A linear unification processor /." Thesis, McGill University, 1987. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=63790.

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Dagenais, Michel R. "Timing analysis for MOSFETS, an integrated approach." Thesis, McGill University, 1987. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=75459.

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Timing and electrical verification is an essential part of the design of VLSI digital MOS circuits. It consists of determining the maximum operating frequency of a circuit, and verifying that the circuit will always produce the expected logical behavior at or under this frequency. This complex task requires considerable computer and human resources.<br>The classical simulation approach cannot be used to insure the timing and electrical correctness of the large circuits that are now being designed. The huge number of possible states in large circuits renders this method impractical. Worst-case
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Chu, Chung-kwan, and 朱頌君. "Computationally efficient passivity-preserving model order reduction algorithms in VLSI modeling." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B38719551.

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Books on the topic "Very large scale integration"

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2.

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Center, Langley Research, ed. Very large scale optimization. National Aeronautics and Space Administration, Langley Research Center, 2002.

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1948-, Fuchs Henry, ed. 1985 Chapel Hill Conference on Very Large Scale Integration. Computer Science Press, 1985.

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Workshop on Large Scale Computational Device Modeling (1985 Naperville, Ill.). Large scale computational device modeling. Coordinated Science Laboratory, University of Illinois, 1986.

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name, No. VLSI circuits and systems: 19-21 May 2003, Maspalomas, Gran Canaria, Spain. SPIE, 2003.

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Fco, López José, Pavlidis Dimitris, Montiel-Nelson Juan A, and Society of Photo-optical Instrumentation Engineers., eds. VLSI circuits and systems. SPIE, 2003.

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Churiwala, Sanjay. Principles of VLSI RTL design: A practical guide. Springer, 2011.

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Institute Of Electrical and Electronics Engineers. IEEE transactions on very large scale integration (VLSI) systems. Institute of Electrical and Electronics Engineers, 1993.

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Tsui, Frank F. LSI/VLSI testability design. McGraw-Hill, 1987.

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Riesgo, Teresa. VLSI circuits and systems V: 18-20 April 2011, Prague, Czech Republic. Edited by SPIE (Society). SPIE, 2011.

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Book chapters on the topic "Very large scale integration"

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Introduction." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_1.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "On-Chip Control Synthesis." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_10.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Testing and Fault-Tolerant Design." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_11.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Design Methodology for Flow-Based Microfluidic Biochips." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_2.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Biochip Architecture Model." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_3.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Biochemical Application Modeling." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_4.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Compiling High-Level Languages." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_5.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Application Mapping and Simulation." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_6.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Control Synthesis and Pin-Count Minimization." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_7.

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Pop, Paul, Wajid Hassan Minhass, and Jan Madsen. "Allocation and Schematic Design." In Microfluidic Very Large Scale Integration (VLSI). Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-29599-2_8.

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Conference papers on the topic "Very large scale integration"

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Watts, Michael R., Erman Timurdogan, Jie Sun, et al. "Very Large Scale Silicon Photonics Integration." In CLEO: Science and Innovations. OSA, 2014. http://dx.doi.org/10.1364/cleo_si.2014.sm4o.4.

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Singh, R. "Dielectrics for very large scale integration (VLSI)." In AIP Conference Proceedings Volume 138. AIP, 1986. http://dx.doi.org/10.1063/1.35544.

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Press, Ron, and Jay Jahangiri. "The Demand and Practical Approach for 100x Test Compression." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313241.

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Xu, Justin, and Cheng-Chew Lim. "Modelling Heterogeneous Interactions in SoC Verification." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313211.

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Wu, Shih-chieh, and Chun-yao Wang. "PEACH: A Novel Architecture for Probabilistic Combinational Equivalence Checking." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313212.

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Kshirsagar, R. V., and R. M. Patrikar. "Design of a Reconfigurable Multiprocessor Core for Higher Performance and Reliability of Embedded Systems." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313242.

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"Organizing Committee." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313276.

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"Program Committee." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313277.

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"Keynotes." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313278.

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Benkowski, Jacques. "The system is really in the SoC : new investment opportunities." In 2006 IFIP International Conference on Very Large Scale Integration. IEEE, 2006. http://dx.doi.org/10.1109/vlsisoc.2006.313279.

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Reports on the topic "Very large scale integration"

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Nash, J. G. VLSI (Very Large Scale Integration) Floating Point Chip Design Study. Defense Technical Information Center, 1985. http://dx.doi.org/10.21236/ada164198.

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Leighton, F. T. Theoretical Aspects of VLSI (Very Large Scale Integration) Circuit Design. Defense Technical Information Center, 1986. http://dx.doi.org/10.21236/ada175051.

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Hinman, Michael L. Analog Very Large Scale Integration (VLSI) Implementations of Artificial Neural Networks. Defense Technical Information Center, 1992. http://dx.doi.org/10.21236/ada256621.

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Stine, Jr, and James E. Exploration of Nanometer Cognitive Reasoning Very Large Scale Integration (VLSI) Computer Architecures. Defense Technical Information Center, 2012. http://dx.doi.org/10.21236/ada560043.

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Cybart, Shane A., Steven M. Anton, Stehen M. Wu, John Clarke, and Robert C. Dynes. Very Large Scale Integration of Nano-Patterned YBa2Cu3O7-delta Josephson Junctions in a Two-Dimensional Array. Defense Technical Information Center, 2010. http://dx.doi.org/10.21236/ada522059.

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Poor, H. V. Very Large-Scale Multiuser Detection (VLSMUD). Defense Technical Information Center, 2006. http://dx.doi.org/10.21236/ada458334.

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Lu, Shuai, Pavel V. Etingov, Ruisheng Diao, et al. Large-Scale PV Integration Study. Office of Scientific and Technical Information (OSTI), 2011. http://dx.doi.org/10.2172/1028573.

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Popek, Gerald J., and Wesley W. Chu. Very Large Scale Distributed Information Processing Systems. Defense Technical Information Center, 1991. http://dx.doi.org/10.21236/ada243983.

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Penfield, Jr, Agarwal Paul, Dally Anant, et al. Critical Problems in Very Large Scale Computer Systems. Defense Technical Information Center, 1988. http://dx.doi.org/10.21236/ada202129.

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Ernst, Bernhard, Uwe Schreirer, Frank Berster, et al. Large Scale Wind and Solar Integration in Germany. Office of Scientific and Technical Information (OSTI), 2010. http://dx.doi.org/10.2172/977319.

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