Relevant bibliographies by topics / VLSI CAD

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'VLSI CAD'

Author: Grafiati
Published: 4 June 2021
Last updated: 26 July 2025

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Journal articles on the topic "VLSI CAD"

1

Jones, J. W. "CAD for VLSI." Electronics and Power 32, no. 1 (1986): 79. http://dx.doi.org/10.1049/ep.1986.0049.

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ATTAOUI, Yassine, Mohamed Chentouf, Zine El Abidine Alaoui Ismaili, and Aimad Elmourabit. "Machine Learning in VLSI Design: A Comprehensive Review." Journal of Integrated Circuits and Systems 19, no. 2 (2024): 1–14. http://dx.doi.org/10.29292/jics.v19i2.826.

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State-of-the-art ML applications and aspects of AI in VLSI/CAD EDA. As VLSI chip complexity increases, driven by shrinking chip sizes and higher performance demands, manufacturing high-performance chips poses significant challenges. Recent studies have investigated the use of Artificial Intelligence and Machine Learning in VLSI CAD/EDA (Computer-Aided Design/Electronic Design Automation). Machine Learning is experiencing a rapid growth in VLSI design and is being increasingly integrated into EDA tool development due to its capacity for achieving higher accuracy in reduced runtime. This paper o
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Shekar, K., and Sandhya Rachamalla. "A Survey on Machine Learning Applications in VLSI CAD." International Journal of Computer Science & Engineering Survey 15, no. 5 (2024): 01–09. http://dx.doi.org/10.5121/ijcses.2024.15501.

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The incorporation of machine learning (ML) methodologies into VLSI computer-aided design (CAD) procedures is gaining prominence owing to its capacity to enhance design efficiency, forecast performance, and diminish time-tomarket. This literature overview examines the advanced machine learning techniques used at many phases of VLSI design. This review synthesizes data from current research articles, emphasizing the strengths, limits, and prospective avenues for machine learning implementations in VLSI CAD.
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Edwards, M. D. "Book Review: CAD for VLSI." International Journal of Electrical Engineering & Education 23, no. 2 (1986): 191–92. http://dx.doi.org/10.1177/002072098602300232.

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Walker, Ian. "A Smalltalk/V VLSI CAD application." Computer-Aided Engineering Journal 8, no. 2 (1991): 47. http://dx.doi.org/10.1049/cae.1991.0011.

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Fiebrich, Rolf-dieter. "A Supercomputer Workstation for VLSI CAD." IEEE Design & Test of Computers 3, no. 3 (1986): 31–37. http://dx.doi.org/10.1109/mdt.1986.294989.

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Kumar, Alok, Vijeta Kashyap, S. D. Sherlekar, et al. "Ideas: a tool for VLSI CAD." IEEE Design & Test of Computers 6, no. 5 (1989): 50–57. http://dx.doi.org/10.1109/54.43079.

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Batory, D. S., and Won Kim. "Modeling concepts for VLSI CAD objects." ACM Transactions on Database Systems 10, no. 3 (1985): 322–46. http://dx.doi.org/10.1145/3979.4018.

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Gupta, Indu, and R. K. Pandey. "CAD Tool for Modelling VLSI Designs." IETE Technical Review 20, no. 6 (2003): 541–45. http://dx.doi.org/10.1080/02564602.2003.11417113.

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Gupta, Rajiv, Wesley H. Cheng, Rajesh Gupta, Ido Hardonag, and Melvin A. Breuer. "An object-oriented VLSI CAD framework." Computer 22, no. 5 (1989): 28–37. http://dx.doi.org/10.1109/2.27954.

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Dissertations / Theses on the topic "VLSI CAD"

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Liu, Huiqun. "Circuit partitioning algorithms for CAD VLSI design /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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Minato, Shin-ichi. "Binary Decision Diagrams and Their Applications for VLSI CAD." Kyoto University, 1995. http://hdl.handle.net/2433/160759.

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本文データは平成22年度国立国会図書館の学位論文(博士)のデジタル化実施により作成された画像ファイルを基にpdf変換したものである<br>Kyoto University (京都大学)<br>0048<br>新制・課程博士<br>博士(工学)<br>甲第6015号<br>工博第1412号<br>新制||工||984(附属図書館)<br>UT51-95-D334<br>京都大学大学院工学研究科情報工学専攻<br>(主査)教授 失島 脩三, 教授 上林 彌彦, 教授 石田 亨<br>学位規則第4条第1項該当
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Cao, Ke. "Design for manufacturing (DFM) in submicron VLSI design." Thesis, [College Station, Tex. : Texas A&M University, 2007. http://hdl.handle.net/1969.1/ETD-TAMU-1430.

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Hu, Shiyan. "Algorithmic techniques for nanometer VLSI design and manufacturing closure." Texas A&M University, 2008. http://hdl.handle.net/1969.1/85905.

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As Very Large Scale Integration (VLSI) technology moves to the nanoscale regime, design and manufacturing closure becomes very difficult to achieve due to increasing chip and power density. Imperfections due to process, voltage and temperature variations aggravate the problem. Uncertainty in electrical characteristic of individual device and wire may cause significant performance deviations or even functional failures. These impose tremendous challenges to the continuation of Moore's law as well as the growth of semiconductor industry. Efforts are needed in both deterministic design stage and
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Waghmode, Mandar. "Buffer insertion in large circuits using look-ahead and back-off techniques." Texas A&M University, 2005. http://hdl.handle.net/1969.1/4674.

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Buffer insertion is an essential technique for reducing interconnect delay in submicron circuits. Though it is a well researched area, there is a need for robust and effective algorithms to perform buffer insertion at the circuit level. This thesis proposes a new buffer insertion algorithm for large circuits. The algorithm finds a buffering solution for the entire circuit such that buffer cost is minimized and the timing requirements of the circuit are satisfied. The algorithm iteratively inserts buffers in the circuit improving the circuit delay step by step. At the core of this algorithm are
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Reimann, Tiago Jose. "Roteamento global de circuitos VLSI." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2013. http://hdl.handle.net/10183/71269.

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Este trabalho apresenta a implementação de um roteador global de circuitos integrados capaz de tratar os problemas de roteamento atuais, utilizando como referência para avaliação os circuitos de benchmark publicados durante as competições de roteamento global realizadas no ACM International Symposium on Physical Design 2007 e 2008. O roteador global desenvolvido utiliza como ferramenta principal a técnica de ripup and reroute associada às técnicas de roteamento monotônico e maze routing, ambas com grande histórico de uso nas ferramentas acadêmicas descritas também neste trabalho. O desenvolvim
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Johann, Marcelo de Oliveira. "Novos algoritmos para roteamento de circuitos VLSI." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2001. http://hdl.handle.net/10183/2177.

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Este trabalho apresenta novos algoritmos para o roteamento de circuitos integrados, e discute sua aplicação em sistemas de síntese de leiaute. As interconexões têm grande impacto no desempenho de circuitos em tecnologias recentes, e os algoritmos propostos visam conferir maior controle sobre sua qualidade, e maior convergência na tarefa de encontrar uma solução aceitável. De todos os problemas de roteamento, dois são de especial importância: roteamento de redes uma a uma com algoritmos de pesquisa de caminhos, e o chamado roteamento de área. Para o primeiro, procura-se desenvolver um algoritmo
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Marchioro, Gilberto Fernandes. "Silex : sistema para a integração de ferramentas de projeto de circuitos integrados." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 1992. http://hdl.handle.net/10183/26381.

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SILEX é um ambiente aberto e integrado que busca auxiliar a concepção de CIs. 0 sistema e composto por ferramentas internas (servidoras de recursos) e ferramentas do usuário (clientes de recursos). O usuário interage com o sistema SILEX através de uma interface gráfica baseada em janelas, ativando os recursos de forma padronizada e consistente. Sendo um sistema de CAD, SILEX e formado por um conjunto de módulos (ferramentas) interdependentes. Cada módulo realiza a sua função e transmite seus resultados. O usuário torna-se cliente de um conjunto de processos que concorrentemente responde as sua
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Hentschke, Renato Fernandes. "Algoritmos para o posicionamento de células em circuitos VLSI." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2002. http://hdl.handle.net/10183/2598.

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Este trabalho faz uma análise ampla sobre os algoritmos de posicionamento. Diversos são extraídos da literatura e de publicações recentes de posicionamento. Eles foram implementados para uma comparação mais precisa. Novos métodos são propostos, com resultados promissores. A maior parte dos algoritmos, ao contrário do que costuma encontrar-se na literatura, é explicada com detalhes de implementação, de forma que não fiquem questões em aberto. Isto só possível pela forte base de implementação por trás deste texto. O algorítmo de Fidduccia Mateyeses, por exemplo, é um algorítmo complexo e por ist
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GIBSON, DENNIS. "INTEGRATING BEHAVIORAL MODELING AND SIMULATION FOR MEMS COMPONENTS INTO CAD FOR VLSI." University of Cincinnati / OhioLINK, 2002. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1029435944.

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Books on the topic "VLSI CAD"

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G, Russell, ed. CAD for VLSI. Van Nostrand Reinhold (UK), 1985.

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Drechsler, Rolf. Evolutionary algorithms for VLSI CAD. Kluwer Academic Publishers, 1998.

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Thornton, Mitchell Aaron. Spectral techniques in VLSI CAD. Kluwer Academic Publishers, 2001.

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Fichtner, Wolfgang, and Martin Morf, eds. VLSI CAD Tools and Applications. Springer US, 1987. http://dx.doi.org/10.1007/978-1-4613-1985-6.

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Thornton, Mitchell Aaron, Rolf Drechsler, and D. Michael Miller. Spectral Techniques in VLSI CAD. Springer US, 2001. http://dx.doi.org/10.1007/978-1-4615-1425-1.

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Drechsler, Rolf. Evolutionary Algorithms for VLSI CAD. Springer US, 1998. http://dx.doi.org/10.1007/978-1-4757-2866-8.

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Wolfgang, Fichtner, and Morf Martin, eds. VLSI CAD tools and applications. Kluwer Academic Publishers, 1987.

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Fichtner, Wolfgang. VLSI CAD Tools and Applications. Springer US, 1987.

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Drechsler, Rolf. Evolutionary Algorithms for VLSI CAD. Springer US, 1998.

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Thornton, Mitchell Aaron. Spectral Techniques in VLSI CAD. Springer US, 2001.

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Book chapters on the topic "VLSI CAD"

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Koranne, Sandeep. "VLSI CAD Tools." In Handbook of Open Source Tools. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7719-9_15.

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Brauer, Johannes. "Datenbankkonzepte für VLSI/CAD." In Datenhaltung in VLSI-Entwurfssystemen. Vieweg+Teubner Verlag, 1990. http://dx.doi.org/10.1007/978-3-663-11986-9_4.

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Nebel, Wolfgang. "Der VLSI Entwurfsprozeß." In CAD-Entwurfskontrolle in der Mikroelektronik. Vieweg+Teubner Verlag, 1985. http://dx.doi.org/10.1007/978-3-322-94653-9_3.

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Shepelev, V. A., U. Z. Gorbunov, and A. V. Vlasov. "System Shell for VLSI CAD." In Advanced Information Processing. Springer Berlin Heidelberg, 1990. http://dx.doi.org/10.1007/978-3-642-93464-3_31.

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Post, Hans-Ulrich. "CAD für den VLSI-Entwurf." In Entwurf und Technologie hochintegrierter Schaltungen. Vieweg+Teubner Verlag, 1989. http://dx.doi.org/10.1007/978-3-322-84815-4_8.

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Walker, Robert A., and Raul Camposano. "Univ. of Waterloo’s VLSI CAD Tools." In A Survey of High-Level Synthesis Systems. Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3968-1_41.

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Lagger, H., and H. G. Thonemann. "CAD-gerechte Datenhaltung beim VLSI-Entwurf." In Informatik in der Praxis. Springer Berlin Heidelberg, 1986. http://dx.doi.org/10.1007/978-3-642-93336-3_6.

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Brauer, Johannes. "Modellierung von VLSI-Entwurfsobjekten." In CAD-Schnittstellen und Datentransferformate im Elektronik-Bereich. Springer Berlin Heidelberg, 1987. http://dx.doi.org/10.1007/978-3-642-73133-4_3.

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Kahn, H. J. "SIDESMAN: A CAD System for VLSI Design." In Intelligent CAD Systems I. Springer Berlin Heidelberg, 1987. http://dx.doi.org/10.1007/978-3-642-72945-4_15.

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Thornton, Mitchell Aaron, Rolf Drechsler, and D. Michael Miller. "Introduction." In Spectral Techniques in VLSI CAD. Springer US, 2001. http://dx.doi.org/10.1007/978-1-4615-1425-1_1.

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Conference papers on the topic "VLSI CAD"

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Bharath, Duttuluru, A. Jagadeesh, Uday Chaitanya M, and T. Jaya. "Analysis of CAD tools in VLSI Physical design." In 2025 IEEE International Students' Conference on Electrical, Electronics and Computer Science (SCEECS). IEEE, 2025. https://doi.org/10.1109/sceecs64059.2025.10940370.

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Gunter, Andrew David, and Steven Wilton. "Machine Learning VLSI CAD Experiments Should Consider Atomic Data Groups." In 2024 ACM/IEEE 6th Symposium on Machine Learning for CAD (MLCAD). IEEE, 2024. http://dx.doi.org/10.1109/mlcad62225.2024.10740199.

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Khan, Esrat, Shahzad Muzaffar, Lamees M. Al Qassem, and Ibrahim M. Elfadel. "OSHDA: A Containerized CAD Tool for the Design and Analysis of Behavioral FSM Logic Locking." In 2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC). IEEE, 2024. https://doi.org/10.1109/vlsi-soc62099.2024.10767810.

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Caldwell, Andrew E., Andrew B. Kahng, Andrew A. Kennings, and Igor L. Markov. "Hypergraph partitioning for VLSI CAD." In the 36th ACM/IEEE conference. ACM Press, 1999. http://dx.doi.org/10.1145/309847.309955.

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"Session C2 CAD for VLSI." In International Conference on Electrical, Electronic and Computer Engineering, 2004. ICEEC '04. IEEE, 2004. http://dx.doi.org/10.1109/iceec.2004.1374371.

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Pan, D. Z., Jhih-Rong Gao, and Bei Yu. "VLSI CAD for emerging nanolithography." In 2012 International Symposium on VLSI Design, Automation and Test (VLSI-DAT). IEEE, 2012. http://dx.doi.org/10.1109/vlsi-dat.2012.6212644.

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"In-House CAD versus Vendor CAD for High-Performance VLSI." In Proceedings ISSCC '95 - International Solid-State Circuits Conference. IEEE, 1995. http://dx.doi.org/10.1109/isscc.1995.535536.

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Piguet, C. "Design methodologies and CAD tools [VLSI]." In 1989 Proceedings of the IEEE Custom Integrated Circuits Conference. IEEE, 1989. http://dx.doi.org/10.1109/cicc.1989.56845.

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Luo, Yan. "Session details: CAD." In GLSVLSI '14: Great Lakes Symposium on VLSI 2014. ACM, 2014. http://dx.doi.org/10.1145/3246696.

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Kirovski, Darko, David Liu, Jennifer Wong, and Miodrag Potkonjak. "Forensic engineering techniques for VLSI CAD tools." In the 37th conference. ACM Press, 2000. http://dx.doi.org/10.1145/337292.337584.

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Reports on the topic "VLSI CAD"

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Banerjee, Prithviraj. VLSI CAD on Scalable High Performance Computing Platforms. Defense Technical Information Center, 1998. http://dx.doi.org/10.21236/ada358137.

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Kang, S. M., E. Rosenbaum, Y. K. Cheng, L. P. Yuan, and T. Li. Reliability-Driven CAD System for Deep-Submicron VLSI Circuits. Defense Technical Information Center, 1998. http://dx.doi.org/10.21236/ada353021.

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