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1
Turner, Nathan Isaac. "High Temperature Microwave Frequency Voltage-Controlled Oscillator." Thesis, Virginia Tech, 2018. http://hdl.handle.net/10919/84935.
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As the oil and gas industry continues to explore higher temperature environments, electronics that operate at those temperatures without additional cooling become critical. Additionally, current communications systems cannot support the higher data-rates being offered by advancements in sensor technology. An RF modem would be capable of supplying the necessary bandwidth to support the higher data-rate. A voltage-controlled oscillator is an essential part of an RF modem. This thesis presents a 2.336-2.402 GHz voltage-controlled oscillator constructed with 0.25 μm GaN-on-SiC technology high electron mobility transistor (HEMTs). The measured operating temperature range was from 25°C to 225°C. A minimum tuning range of 66 MHz, less than 20% variation in output power, and harmonics more than 20 dB down from the fundamental is observed. The phase noise is between -88 and -101 dBc/Hz at 100 kHz offset at 225°C. This is the highest frequency oscillator that operates simultaneously at high temperatures reported in literature.Master of Science
2
McKearney, James F. "Analysis of nonlinearities in a voltage-controlled oscillator." Master's thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-01122010-020048/.
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Bosley, Ryan Travis. "A VHF/UHF Voltage Controlled Oscillator in 0.5um BiCMOS." Thesis, Virginia Tech, 2003. http://hdl.handle.net/10919/31452.
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The dramatic increase in market demand for wireless products has inspired a trend for new designs. These designs are smaller, less expensive, and consume less power. A natural result of this trend has been the push for components that are more highly integrated and take up less real estate on the printed circuit board (PCB). Major efforts are underway to reduce the number of integrated circuits (ICs) in newer designs by incorporating several functions into a single chip. Availability of newer technologies such as silicon bipolar with complementary metal oxide semiconductor (BiCMOS) has helped facilitate this move toward more complex circuit topologies onto one die. BiCMOS achieves efficient chip area utilization by combining bipolar transistors, suited for higher frequency analog circuits with CMOS transistors that are useful for digital functions and lower frequency analog circuits. A voltage controlled oscillator (VCO) is just one radio frequency (RF) circuit block that can benefit from a more complex semiconductor process like BiCMOS.
This thesis presents the design and evaluation of an integrated VCO in the IBM 5S BiCMOS process. IBM 5S is a 0.5 um, single poly, five-metal process with surface channel PFETs and NFETs. The process also features self-aligned extrinsic base NPN bipolar devices exhibiting ft of up to 24 GHz.
The objective of this work is to obtain a VCO design that provides a high degree of functionality while maximizing performance over environmental conditions. It is shown that an external feedback and resonator network as well as a bandgap voltage referenced bias circuit help to achieve these goals. An additional objective for this work is to highlight several pragmatic issues associated with designing an integrated VCO capable of high volume production.
The Clapp variant of the Colpitts topology is selected for this application for reasons of robust operation, frequency stability, and ease of implementing in integrated form. Design is performed at 560 MHz using the negative resistance concept. Simulation results from Pspice and the Agilent ADS are presented. Implementation related issues such as bondwire inductances and layout details are covered. The VCO characterization is shown over several environmental conditions. The final nominal design is capable of: tuning over 150 MHz (22%) and delivering â 4.2 dBm into a 50 Ohm load while consuming only 9mA from a 3.0V supply. The phase noise at these conditions is
-92.5 dBc/Hz at a frequency offset of 10 kHz from the carrier. Finally, the conclusion of this work lists some suggestions for potential future research.Master of Science
4
Yu, Yue. "Low-power low-phase-noise voltage-controlled oscillator design." The Ohio State University, 2006. http://rave.ohiolink.edu/etdc/view?acc_num=osu1413475974.
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Murugan, Deepak. "Design of a Voltage Controlled Oscillator for Galileo/GPS Receiver." Thesis, Linköpings universitet, Institutionen för systemteknik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-76279.
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The main aim of this thesis is to implement a voltage-controlled oscillator for a Galileo/GPS receiver with a center frequency of 1.5 GHz in 150 nm CMOS process. As the designed VCO has to be integrated in a phase locked loop, VCO gain is selected high enough for the PLL to lock even with process variations. A new state of art architecture called double harmonic tuned VCO is selected and designed for this GPS application. It uses a complex combination of inductors and capacitors to reduce phase-noise of the VCO by suppressing second harmonic oscillations in the tail node of VCO. The designed VCO shows significant improvement in phase-noise performance compared to a normal LC tank VCO by reducing phase-noise around 4 dBc/Hz. The VCO has a phase-noise of -128 dBc/Hz at 1 MHz offset from center frequency with a power consumption of 5 mW and a tuning range of about 257 MHz for a 1 V tuning voltage range.
6
Hitko, Donald A. (Donald Anthony). "A low power, low noise, 1.8 GHz voltage-controlled oscillator." Thesis, Massachusetts Institute of Technology, 1997. http://hdl.handle.net/1721.1/43316.
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Vermaak, Elrien. "Development of a low phase noise microwave voltage controlled oscillator." Thesis, Link to the online version, 2008. http://hdl.handle.net/10019/1940.
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Zhang, Yang. "Phase noise suppression techniques for 5-6GHZ oscillator design." Online access for everyone, 2007. http://www.dissertations.wsu.edu/Thesis/Fall2007/y_zhang_113007.pdf.
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Hsieh, Hsuan-Yu, and 謝宣佑. "Design of Novel CMOS Voltage-Controlled Oscillator and Quadrature Voltage-Controlled Oscillator." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/35825098398286815725.
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碩士國立臺灣科技大學
電子工程系
100
In the RF transceiver, the VCO’s phase noise is good or bad will have the effect to (1) increase of digital communication bit error rate, (2) reduce the sensitivity of the transceiver, (3) increase signal jitter,so reduced voltage-controlled oscillator’s phase noise is a very important. First, this thesis designs complementary Colpitts voltage controlled oscillator, At the supply voltage of 1.5 V, the output phase noise of the VCO is -118.7dBc/Hz at 1MHz offset frequency from the carrier frequency of 10.2 GHz, and the figure of merit is -191.72dBc/Hz. The VCO core power consumption is 5.2 mW. Tuning range is about 1.8GHz, from 10.04 to 11.84 GHz, while the control voltage was tuned from 0 V to 1.5 V. And we design complementary Colpitts QVCO. At the supply voltage of 1.5 V, the total power consumption is 6.72 mW. The free-running frequency tuning range is 15.37 %, tunable from 10.24 to 11.98 GHz as the tuning voltage is varied from 0.0 V to 1.5 V. The QVCO has been implemented with the TSMC 0.18 μm CMOS technology and the die area is 0.811 ×1.38 mm2. The measured phase noise at 1 MHz offset is -116.39 dBc/Hz at the oscillation frequency of 10.24 GHz and the figure of merit (FOM) of the proposed QVCO is about -188.3 dBc/Hz. Secondly, we propose a high-quality LC tank quadrature voltage-controlled oscillator. At the supply voltage of 0.7 V, the total power consumption is 2.58 mW. The free-running frequency of the QVCO is tunable from 5.15 GHz to 5.55 GHz as the tuning voltage is varied from 0 V to 0.7 V. The measured phase noise at 1 MHz frequency offset is -120.88 dBc/Hz at the oscillation frequency of 5.28 GHz and the figure of merit (FOM) of the proposed QVCO is -191.21 dBc/Hz. Finally,chapter is a dual band QVCO, useing 0.18 μm SiGe technology, At the supply voltage of 1.6 V, the total core power consumption is 11.52 mW. The low-/high-band free-running frequency of the QVCO is tunable from 3/6.14 GHz to 2.6/5.71 GHz as the tuning voltage is varied from 0.0/1.4 V to 1.3/2 V. The measured phase noise at 1MHz frequency offset is -128.97/-123.47 dBc/Hz at the oscillation frequency of 2.99/6.07 GHz and the high-/low-band figure of merit (FOM) of the proposed QVCO is about -188.0dBc/Hz.
10
Chen, Meng-hsin, and 陳孟信. "Reserch of 0.3V Voltage-Controlled Oscillator And High Performance Quadrature Voltage-Controlled Oscillator." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/4s8j79.
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碩士國立臺灣科技大學
光電工程研究所
99
he voltage-controlled oscillator (VCO) is one of main blocks of a frequency synthesizer’s. A good VCO must exhibit low-phase-noise characteristic to prevent noise in adjacent frequencies from being down-converted or up-converted. For modern portable production (such as cell-phone) and multi-band system, the RF circuit satisfy except high-performance and low-complexity, designing requirements of these circuits become more stringent on the low-power, in recent years This thesis presents three voltage-controlled oscillators. One voltage-controlled oscillator is supplied by low voltage, other one is using active-inductor, and another is a quadrature voltage-controlled oscillator. Firstly, we present a 0.3V 4.5 GHz VCO using the TSMC 0.18-μm CMOS 1P6M process is fabricated. With the supply voltage of 0.3 V, the measured output phase noise is -115.47 dBc/Hz at 1 MHz offset frequency. The carrier frequency is 4.56 GHz and the figure of merit is -187.16 dB. The total power consumption of VCO-core is 1.41 mW with the 0.3 V supply voltage. Tuning range is from 4.56 GHz to 4.77 GHz about 210 MHz while the control voltage was tuned from 0 V to 1.1 V. The low voltage operation is obtained via an inductive gate voltage boosting technique, forward-biasing the bodies of the switching MOSFETs with a rectified voltage and three-pairs of varactors in series. Secondly, a new differential active inductor voltage-controlled oscillator (VCO) is presented. It utilizes the complementary cross-coupled pairs to generate differential negative resistance. The active inductor is formed with complementary CMOS. The proposed CMOS low-phase noise VCO has been implemented with the UMC 90nm CMOS technology. At the supply voltage of 0.9 V, the total power consumption is 4.5 mW. The free-running frequency of VCO is tunable from 1.22 to 1.86 GHz as the tuning voltage is varied from 0.0 to 0.9 V. The measured phase noise at 1MHz offset is -111.56 dBc/Hz at the oscillation frequency of 1.22 GHz and the figure of merit (FOM) of the proposed VCO is about -166.75 dBc/Hz.. Finally, we propose a BiCMOS quadrature voltage-controlled oscillator (VCO), which was implemented in the standard TSMC 0.18 μm SiGe 3P6M BiCMOS process. The QVCO consists of two nMOSFET cross-coupled oscillators stacked in series with source degenerated HBT diodes. Four MOSFETs connected to the degenerated diodes are used for the coupling transistors. The time-varying effective transconductance of cross-coupled transistors is used as the coupling mechanism of two differential VCOs to form the QVCO.At the supply voltage of 1.3 V, the output phase noise of the VCO is -126.63 dBc/Hz at 1MHz offset frequency from the carrier frequency of 4.7 GHz, and the figure of merit is -194.16 dBc/Hz
11
Lee, Chun-Yi, and 李俊毅. "RF Quadrature Voltage-Controlled Oscillator." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/63660262934172879594.
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碩士國立成功大學
電機工程學系碩博士班
91
Technical advanced and market growth in wireless communications and LANs have created a need for integrated circuits or system on a single chip. The recent trend is to design almost all circuits in differential form and dividing the signal into I/Q two channels. Therefore, quadrature signal will be frequently used. In this thesis, a radio-frequency quadrature voltage-controlled oscillator is designed and realized it on a chip. There are six chapters in this thesis. The first chapter is the overview. Then, in chaper two, some concepts of oscillator designs and system considerations are discussed. Chapter three presents some popular topologies of oscillators and quadrature VCOs. New quadrature VCO is introduced in the fourth chapter. Results of using computer simulations and chip measurements are summarized in chapter five. Finally, chapter six outlines the conclusions and suggested future works.
12
Kuo, Chun Yuan, and 郭俊源. "New Quadrature Voltage Controlled Oscillator Design." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/55537910991832220717.
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碩士長庚大學
電子工程學系
98
In this paper, we present to apply 24GHz dual-phase output and 5.2GHz quadrature output VCO which is fabricated in a TSMC 0.18μm 1P6M CMOS process, provide by National Chip Implementation Center(CIC). For this demands of wireless application, is focused on the characteristic of low power consumption. Two of them are used single-ended conventional Colpitts oscillator basis circuit frames. Planning the the RF frequency are 24GHz and 5.2GHz. These supply voltage are both 1.8V, and the base-band frequency are the same 100MHz. Technical advanced in wireless communications and LANs have created a need for integrated circuits on system. The recent trend is to design almost all circuits in differential form and dividing the signal into I/Q two channels. Besides, we boldness used single-ended conventional Colpitts oscillator frame for cut down phase noise and power consumption. Hope to apply in transceiver will be work. In this thesis, a radio-frequency dual-phase and quadrature VCO are designed and the dual-phase VCO realized it on a chip. Dual-phase VCO output power is -7.448dBm. Tuning range is 23.6 ~ 24.1GHz. Center frequency is 24GHz. Power Consumption is 3.06mW. Phase noise is -104.4dBc/Hz@1MHz. 5.2GHz Quadrature VCO output is -6.842dBm. Tuning range is 4.408 ~ 5.25GHz. Center frequency is 5.2GHz. Power consumption is 4.482mW. Phase noise is -111.902 dBc/Hz@1MHz. 20GHz Quadrature VCO output is -10.265dBm. Tuning range is 20.21 ~ 20.79GHz. Center frequency is 20GHz. Power consumption is 8.568mW. Phase noise is -101.454 dBc/Hz@1MHz.
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Pan, Shien-Paio, and 潘憲鑣. "Design of Microwave Voltage Controlled Oscillator." Thesis, 1994. http://ndltd.ncl.edu.tw/handle/13873626096916624565.
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碩士國立海洋大學
電子工程學系
82
The modulation bandwidth of a microwave voltage controlled oscillator (VCO) is mainly limited by the capatance swings of the active device and the varactor diodes. Recently, the following two methods can be used to improve the modulation bandwidth of the VCO. Firstly, a serial varactor diode is added as feedback circuit. Secondly, a shunt inductor is used as an impedance- compensated element. In this thesis, the first method is utilized and an additional varactor diode is in serial with the drain of the active device. In the meanwhile, a HEMT and a silicon hyperabrupt varactor diode are used to achieve the better output performance. In this thesis, the characteristics and advantages of the designed VCO are discussed. Moreover, the VCO is simulated by microwave CAD software before it is realized. Finally, the performance of this VCO is measured and compared.
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Li, Wen-Ching, and 李文慶. "Dual-Band Voltage Controlled Oscillator Design." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/70723819538721506917.
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碩士國立雲林科技大學
電子與光電工程研究所碩士班
101
The dual-band voltage controlled oscillator (DVCO) is implemented in TSMC 0.18μm CMOS process. The proposed DVCO feature phase noise of -120dBc/Hz at 1MHz offset frequency away from the carrier frequency of 2.4GHz and -118dBc/Hz at 1MHz offset frequency away from the carrier frequency of 5.2GHz. At 1.8-V power supply voltage, the power dissipation is 5.04mW for a 2.4GHz band and 13.77mW for a 5.2GHz. A total tuning range of 450MHz (from 2.15GHz to 2.6GHz) in the low-band and the tuning range of 900MHz (from 4.3GHz to 5.2GHz) is achieved as the tuning voltage ranging from 0-V to 1.8-V. The figure of merit (FOM) of the DVCO operating at 2.4GHz and 5.2 GHz are -176.24dBc/Hz and -180.96dBc/Hz.
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LIN, SHIH-HUA, and 林士華. "Design of Low Power Voltage-Controlled Oscillator and Injection-Locked Voltage-Controlled Oscillator with Spontaneously-matched Transconductance." Thesis, 2017. http://ndltd.ncl.edu.tw/handle/562b79.
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碩士國立中正大學
電機工程研究所
105
In this thesis, four different voltage-controlled oscillator (VCO) chips in CMOS 180 nm technology are designed, where the first three are free-running VCOs and the fourth is injection-locked. For the first two VCOs, the source resistive degeneration in the cross-coupled MOSFET pair was adopted for the differential and quadrature outputs. In the third chip, the back-to-back series varactor configuration was applied for phase noise enhancement. In the fourth VCO, the common-mode injection was employed for the free-running oscillation locked onto the externally-injected signal and the spontaneous transconductance match technique was employed for the signal output amplitude balance. Since the interconnect lines, except the cross-over line section, were not included in the electromagnetic simulation, the oscillation frequency is shifting from 15 GHz to 9 GHz. The second chip fails since the narrow power line-width is insufficient to carry the actual current density. The third and fourth VCOs work successfully. The third VCO has a measured oscillation frequency range of 2.47-3.02 GHz with -124.8 dBc/Hz phase noise, giving an excellent FOM of -342.2 dBc/Hz. The power consumption is 1.4 mW and the chip size is 1.5×0.9 mm2. For the injection-locked VCO, the measured oscillation frequency range is 2.68-3.73 GHz with -119.0 dBc/Hz phase noise and the locking bandwidth is 0.87 MHz. The power consumption is 1.6 mW and the chip size is 1.1×0.8 mm2. The injection-locked VCO achieves the best FOM of -347.5 dBc/Hz. Index Terms: Voltage Control Oscillator, Injection Locking, Source resistive degeneration.
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Lin, Yan-Cu, and 林延簇. "Design of Low Power Consumption and Low Phase Noise Voltage-Controlled Oscillator and Quadrature Voltage-Controlled Oscillator." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/64599952530704258477.
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碩士國立臺灣科技大學
電子工程系
104
Rapid growth has been achieved in wireless communication system nowadays. High efficiency and low error are required and phase locked loop (PLL), with the voltage controlled oscillator (VCO) and the divider circuit, plays an important role in the trend. The VCO requested with low phase-noise, low power consumption and wide tuning rage, and the performance of VCO can be examined by the Figure of Merit (FOM). First, this thesis features an ultra-low supply voltage VCO, which implemented in TSMC SiGe 0.18μm 3P6M CMOS process. The circuit not only uses a native MOSFET of near zero threshold voltage as negative transconductor, but also designs a transformer as resonator tank to increase the output swing. Chip area is also saved with the homemade transformer.. At the supply voltage of 0.2 V, the output phase noise of the VCO is -108.12 dBc/Hz at 1MHz offset frequency from the carrier frequency of 978MHz, and the figure of merit is -170.6 dBc/Hz. Total power consumption is 0.536mW. Tuning range is about 111MHz, from 978 to 1108MHz, while the control voltage was tuned from 0 V to 2 V. The die area is 0.472 × 0.722 mm2. Second, a quadrature voltage controlled oscillator (QVCO) achieves power-saving benefit and easier startup with dynamic biasing circuit. The phase noise of the proposed QVCO is also reduced by using varactor to generate quadrature phase. The chip was implemented using the TSMC 0.18μm CMOS 1P6M process. At the supply voltage of 1.1 V and tuning voltage at 0.7V, the output phase noise of the VCO is -130.34 dBc/Hz at 1MHz offset frequency from the carrier frequency of 2.04GHz, and the figure of merit is -190.6 dBc/Hz. Total power consumption is 3.9mW. Tuning range is about 422MHz, from 1.978 to 2.4GHz, while the control voltage was tuned from 0 V to 2 V. The die area is 0.528 × 1.168 mm2. Finally, this thesis also proposes an oscillator which achieved low power consumption and low phase noise voltage controlled in TSMC SiGe 0.18μm 3P6M CMOS process. This circuit suppresses second harmonic with noise filter, while phase noise in the circuit is reduced with a homemade inductor. At the supply voltage of 1.2V, the output phase noise of the VCO is -122.79 dBc/Hz at 1MHz offset frequency from the carrier frequency of 2.47GHz, and the figure of merit is -197 dBc/Hz. Total power consumption is 0.24mW. Tuning range is about 21MHz, from 2.479 to 2.5GHz, while the control voltage was tuned from 0 V to 2 V. The die area is 0.799 × 0.809 mm2.
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Huang, Kuei-Chen, and 黃癸禎. "Tempeature-Stable Voltage Reference, Transconductor, and Voltage-Controlled Oscillator." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/80295709853083861334.
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碩士國立彰化師範大學
工業教育學系
88
In the recent years, small size, light weight, and reliable operation in any environment have become the basic requirement in the electronic products such as personal communication systems and notebooks. But smaller feature sizes, higher packing density and rising power consumption lead to dramatic temperature increases in current high-performance VLSI circuits. To achieve stable performance of circuits, we should consider the influence of the temperature variation in the circuit design. In this thesis, we focus on the performance of the voltage reference, transconductor, and voltage-controlled oscillator versus the temperature variations. And we will provide several ways to compensate the influence of temperature drift. Using these compensation circuits, the temperature-stable voltage reference, transconductor, and voltage-controlled oscillator can be obtained.
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Li, Hong-Jyun, and 李鴻駿. "Design of Low Voltage and Wideband Voltage Controlled Oscillator." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/y7byf5.
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碩士國立雲林科技大學
電子與資訊工程研究所
96
There is great interest in the development of low power, low cost CMOS technique for wireless transceiver front-end. The major purpose of this thesis is to challenge fully integrated voltage controlled oscillators with excellent performance. The chip fabrication of VCO circuit is made by TSMC 0.18um CMOS process. Finally, the efficiency of the circuit was demonstrated by measurement. The first chip was designed a low power supply and low phase noise LC tank VCO with capacitor feedback for WiMAX system. The measured results exhibiting the output spectrum of 5.17GHz, and frequency offset of 1MHz phase noise is -120.3dBc/Hz and the power dissipation of the core circuit is 10.2mW under 0.6V supply voltage. The tuning range of the circuit is 800MHz (5.02~5.86GHz). This circuit has excellent phase noise under low consumption condition, and can reach FOM value of -185.4dB. The second chip was designed a low power supply, low phase noise and wide tuning range LC tank VCO using transformer feedbback for a UWB system. The final measured results exhibiting the output frequency is 5.45GHz, the phase noise is -111.5 dBc/Hz at frequency offset of 1MHz, and the power dissipation of the core circuit is 6.9mW under 0.6V supply voltage. The tuning range of the circuit is 1.30GHz (3.69GHz~5.75GHz). This circuit has excellent phase noise under bandwidth of 2GHz, and can reach FOM value of -177.8 dBc/Hz.
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Wu, I.-Tung, and 吳易東. "Design of a Wideband Voltage-Controlled Oscillator and a Dielectric Resonated Voltage-Controlled Oscillator for DVB-T Applications." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/18518882569411647538.
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碩士國立高雄第一科技大學
電腦與通訊工程所
97
Due to the increasingly need of digital TV, and the better techniques, thedesign of the broadband tuning circuits also becomes important in RF designing.Consequently, in this thesis, we also design a low phase noise dielectronic resonate VCO of being used for the digital TV system. Therefore, we design a 1.22 GHz low noise voltage-controlled oscillator by using the model of LC-tank Oscillator to collocate dielectronic resonator. In addition, we have also combined the simulation of RF circuit software proceed with the circuit and simulation. In practical, we used ATF-55143 Low Enhancement Mode MOSFET of Agilent. As for the varactor, we used 1SV239 of TOSHIBA. The 1.22 GHz low phase noise dielectronic resonate VCO has an output range of 1.12 to 1.24 GHz with a 8.47dBm output power. The phase noise is as good as -117 dBc/Hz at 100 kHz offset from carrier frequency. And design a broadband VCO, the thesis is accomplished by using Balanced VCO,with the standard of the first IF that in the structure of the dual-conversion, and the range of the frequency scope must be above 815 MHz. Actually, we used 2SC5007 transistor of NEC and BB135 varactor diode of Philips. Final, it operates between 1.18 to 2.41 GHz with phase noise is -107 dBc/Hz at 100 kHz offset from carrier frequency.
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Shih, Shao Ping, and 石紹平. "The Design of V-band GaAs Voltage-Controlled Oscillator and High RF Power Source GaN Voltage-controlled Oscillator." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/27674444520173581848.
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碩士長庚大學
光電工程研究所
100
In this thesis, three VCO is designed. The first VCO is using dual cross-coupled pair configuration, capacitance-splitting technique and push-push topology. The VCO circuit uses 0.15 m GaAs pHEMT technology. The phase noise is -108.43 dBc/Hz at 1 MHz offset frequency of the push-push signal of 62 GHz and -116.36 dBc/Hz for the fundamental frequency of 30.9 GHz. The operating frequency is about 61.11 GHz ~ 62.66 GHz of the push-push signal and 30.5 GHz ~ 31.22 GHz of the fundamental signal. The power consumption of the VCO with 1.04 mm2 chip area was 24 mW, from a 1 V power supply. The second VCO is based on common source series feedback to generate the negative resistance, using 0.35 m GaN HEMT on silicon substrate technology. The VCO can be tuned, between 3.92 GHz and 4.39 GHz, and has low phase noise, of -119 dBc/Hz, at a 1 MHz offset. The output power of the VCO is 14.6 dBm at 4.2 GHz from a 20 V power supply, while the total die size was 1.35 mm2. The third VCO is the first report of GaN-on-Si HEMT differential oscillator. The VCO is using cross-coupled pair configuration. The VCO circuit uses 0.35 m GaN HEMT on silicon substrate technology. The VCO can be tuned, between 2.56 GHz and 2.67 GHz, and has low phase noise, of -129.5 dBc/Hz, at a 1 MHz offset. The output power of the VCO is 17.55 dBm at 2.6 GHz from a 20 V power supply, while the total die size was 0.87 mm2.
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Chan, Chih-Sheng, and 詹志盛. "An SC Auto-Tuned Voltage Controlled Oscillator." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/49592536034183199543.
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碩士國立臺灣大學
電機工程學研究所
87
In order to meet the great demand of high speed data transmission, several methods have been proposed. However, taking cost and popularity into consideration, the Asymmetrical Digital Subscriber Loop (ADSL) technology based on existing telephone construction seems most feasible. Our objective is to develop a reliable timing recovery loop in the ADSL transmission system. In this thesis, a 3V 0.5mm low thermal drift and low process variation CMOS VCO running at 51.2MHz is presented for the CAP-based ADSL transceiver. The VCO core utilizes double grounded timing capacitors, thus 50% duty cycle can be easily achieved. The 3V architecture permits relatively high charging threshold voltage level so that the effects caused by noise can be minimized. A master-slave control scheme is employed to provide the VCO with a stable bias. This architecture makes the slave biasing resistor track the switched-capacitor resistor in the master block. Since the capacitor ratio is precise in modern VLSI process, a current bias immune to temperature change and process offset is available, which insures the accurate free-running frequency, accordingly. From the simulation results, the TC of the presented VCO is less than -500 ppm/°C. By running Monte Carlo simulation, the variation of master-slave current bias is ±0.6%, while the VCO output has only ±2.4% frequency offset. A prescaler with multiple-frequency division capability is also designed for the ADSL system. By using 2-bit select lines, the output frequency of VCO is divided by 31, 32, and 33, respectively. Finally, a 1.6MHz clock is generated and sent to the timing recovery loop in the ADSL transmission system.
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Jhu, Jin Bao, and 朱晉葆. "The Design of Voltage Controlled Crystal Oscillator." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/33797789654877477307.
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碩士長庚大學
電子工程學系
98
The purpose of the thesis is to make the crystal oscillator for the process. It's different from the traditional quartz crystal that needs to segment and beveling. If we use the process to make the crystal oscillator, we will make the volume of an element become much smaller than before. In addition, we also can achieve the goal for the better , lower cost and lower power consumption. Crystal oscillator is the standard element in communication. If you just use low power, the quartz crystal will create the oscillation of the same frequency. Most important of all, the change of the sealed temperature doesn't have a great effect upon the frequency of crystal oscillator is a kind of a material of piezoelectricity for people to get it easily. By the precise segment and beveling, we can make the crystal oscillator maintain the frequency. The thesis is mainly aimed at this aspect for me to make a research.
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Chou-Hai, Houng, and 黃洲海. "Design of High Frequency Voltage-Controlled Oscillator." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/36970145423364195430.
Full textAbstract:
碩士國立彰化師範大學
工業教育學系
87
Voltage-controlled oscillators (VCOs) are the key building blocks in the circuits of communication systems. Desirable properties of a VCO include: linearity, wide tuning range, low phase-noise and drift with temperature, spectral purity with sinusoidal output, and low cost. High-performance VCOs have been implemented in III-V or bipolar technologies. However, it is more desirable to design circuits in mainstream VLSI technologies so that data processing can be performed on the same chip. Various architectures of monolithic VCOs such as resonator-type, relaxation-based, and ring-structured VCOs have been reported in the literatures. Each of them has one or more limitations on performance. Among them, ring-structure VCOs meet most of the desirable properties except the sensitivity to the variations of supply voltage and temperature. In this thesis, we present a current-source driven ring voltage-controlled oscillator. Experimental results show that the design VCO is able to generate 4.2 GHz oscillating frequency with 33 mW power dissipation for ±1.5 V supply voltage. The drift of frequency due to the variation of temperature is below 1124 ppm/°C and the variation due to supply voltage is suppressed below 3.2 %/0.1V.
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Chi, Hong-Sian, and 紀宏憲. "Design of CMOS Quadrature Voltage Controlled Oscillator." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/90871257096219940335.
Full textAbstract:
碩士國立勤益科技大學
電子工程系
102
A rapid oscillator design approach is proposed in this thesis. By using the rapid oscillator design approach, three CMOS Quadrature Voltage Controlled Oscillator (QVCO) are proposed, and to compare with five previous works. Based on TSMC CMOS 1P6M 0.18um standard process technology with supply voltage 1.8V, Spectre-RF and HSPICE are used to perform simulation on five previous QVCOs and three proposed QVCOs. Proposed Type-Ⅰ, Type-Ⅱ and Type-Ⅲ QVCO schemes have significantly decreased phase noise (Pnoise), which are -167.05 dBc/Hz, -172.84 dBc/Hz and 177.94 dBc/Hz at 1 MHz offset frequency, respectively. Type-Ⅲ has the best FoM (Figure of Merit) to be -227.46 dBc/Hz. The oscillation frequency of QVCO schemes has ranging from 750MHz to 1.15GHz as the control voltage adjusted from 0V to 1.8V.
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HUANG, CIN-SYUAN, and 黃欽鉉. "Study of Voltage Controlled Ring Oscillator Design." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/gnsp8r.
Full textAbstract:
碩士國立勤益科技大學
電子工程系
107
The voltage controlled ring oscillator (VCRO) is widely used in low-power portable electronic systems due to its simplicity. In this thesis, two low power VCROs with 5GHz frequency are proposed for portable electronic applications. The circuit designs are performed based on TSMC 1P6M 0.18μm standard process technology with supply voltage 1.8V. The objective is to fetch smaller layout area and reduced fabrication cost, but to keep its superiority. Simulation results show that the proposed VCRO designs as compared to existing current staved VCRO, the number of transistors is reduced. The layout area of the proposed Type-I VCRO circuit has reduced by 12.4%, and that of Type-II circuit has 38.2% reduced. In fact, the proposed two VCROs suggest higher oscillating frequency with 5 G Hz, however dissipate lower power consumption. Therefore, the two proposed VCROs are superior to other references, and they are practical and feasible for low-power portable electronic applications.
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Chiu, Chun-Yuan, and 邱俊元. "A Complementary Colpitts Voltage Controlled Oscillator Implemented with Ring Inductor and Dual Band CMOS Complementary Colpitts Voltage Controlled Oscillator." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/88939518911543029033.
Full textAbstract:
碩士國立臺灣科技大學
電子工程系
95
This thesis is mainly composed of three topics. First, we present a novel differential voltage controlled oscillator (VCO) with high figure of merit. The VCO is composed of two single-ended complementary Colpitts LC VCOs coupled by two identical inductors and is implemented in 0.18μm CMOS technology with 1.5V supply voltage. This differential VCO operates at 5.76 GHz ~6.76 GH. The phase noises of the VCO operating at 6.29GHz are -122.4 dBc/Hz at 1MHz offset while the VCO draws 3.75 mA and 5.625 mW consumption from a supply voltage of 1.5V. Secondly,A new fully integrated, dual-band CMOS voltage controlled oscillator (VCO) is presented. The VCO is composed of two complementary Colpitts VCOs and is implemented in 0.18μm CMOS technology with 2 V supply voltage. The circuit allows the VCO to operate at two resonant frequencies with a common LC tank. This VCO is configured with 2.4 GHz and 5.2 GHz frequency bands with differential outputs. The dual-band VCO operates at 2.39 GHz ~2.68 GH and 4.84 GHz ~5.58 GHz. The phase noises of the VCO operating at 2.4 GHz and 5.13 GHz are -121.11 and -111.76 dBc/Hz at 1MHz offset, respectively, while the VCO draws 7.45/5.92 mA and 14.9/11.84 mW consumption at high/low frequency band from a 2 V supply. And finally, This half-quarter distributed voltage controlled oscillator operates at 4.72 GHz ~5.13 GHz. The phase noises of the VCO operating at 4.89GHz are -115 dBc/Hz at 1MHz offset while the VCO draws 13.09 mA consumption 18.32mW from a supply voltage of 1.4V.
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Chan, Kai-Chun, and 詹凱鈞. "Implementations on C-band CMOS Low Phase Noise Class-C Voltage Controlled Oscillator, Transformer-coupled Quadrature Voltage Controlled Oscillator, C-band Integer-N Phase Locked Loop with Class-F Voltage Controlled Oscillator and X-band III-V Power Oscillators." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/5554um.
Full textAbstract:
碩士國立中央大學
電機工程學系
106
This thesis developed six local oscillator (LO) circuits for the signal sources of C band and X band transceivers. Three C band LOs were realized in tsmcTM CMOS processes. The X band high power LOs were realized in WINTM 0.25 m GaN and InGaAs pHEMT technologies. The developed LO circuits are listed as follow, A Implementations on C-band CMOS Local Oscillator Circuits I.Low Phase Noise Class-C Voltage Control Oscillator The Class-C oscillator has the features of low power consumption, high current efficiency and low phase noise. This thesis analyzed the phase noise performance of the traditional Colpitts oscillator and Class-C oscillator, repectively. Then, the author proposed a dynamic bias circuit to solve hard start-up problem of the Class-C oscillator. The designed oscillator consumed the dc power of 3.9 mW. The measured tuning range is 5.28 - 5.53 GHz (4.62 %). The lowest phase noise at 1-MHz offset frequency is -120.1 dBc/Hz which is correspondent to the FoM of -188.7. The chip size includes all pads is 0.671 × 0.909 mm2. II.Transformer Coupled Quadrature Voltage Control Oscillator The thesis introduced the requirements of the quadrature signal and how to generate the IQ signals by using transformer coupling technique. Meanwhile, the bi-model problem in IQ signal generation can be solved by this technique accordingly. The use of tail filter also improved the phase noise of quadrature oscillator. These IQ signals totally consumed the dc power of 21.6 mW. The tuning range of the circuit is from 5.23 to 5.73 GHz (9.1 %). The lowest phase noise at 1-MHz offset frequency is -119.75 dBc/Hz which is correspondent to a lowest FoM of -180.8. The chip size include all pads is 1.132 × 0.738 mm2. III.Integer-N Phase Locked Loop (PLL) with Class-F Voltage Controlled Oscillator The PLL adopted a Class-F VCO to improve the phase noise perforamnce. This thesis analyzed the mathematical model of the PLL and developed all functional block cicruits of the PLL. The PLL consumed the dc power of 32.5 mW. The phase noise at 10-kHz offset frequency as the PLL was locked is -95.4 dBc/Hz, and achieves a low frequency FoM of -192.3. The chip size include all pads is 0.887 × 1.077 mm2. B.Implementations on X-band III-V High Power Local Oscillator Circuits I.Clapp Power Oscillator The Clapp power oscillator circuit was realized in WINTM 0.25 m GaN high power process. Total power consumption of the circuit is 416 mW. The lowest phase noise at 1 MHz offset frequency is -118.02 dBc/Hz. The output power is 19.6 dBm. The DC-RF conversion efficiency is 21.9 %. The FoMPOSC, which adds output power and efficiency performance in the conventional FoM of oscillator, is -210.9. The chip size includes all pads is 1.5 × 1 mm2. II.Clapp Power Voltage Control Oscillator The Clapp power voltage control oscillator circuit was realized by 0.15 m InGaAs pHEMT technology. The GaAs equvilent diode was used as a varactor for the frequrncy tuning. The total power consumption is 20 mW. The tuning range is from 9.41 to 10.04 GHz (6.4 %). The lowest phase noise at 1 MHz offset frequency is -100.55 dBc/Hz. The highest output power is 7.7 dBm. The DC-R Fconversion efficiency is 35.6 %. The FoMPOSC is -202.4. The chip size included all pads is 1.5 × 1 mm2. III.Power Oscillator use Class-E Network The Class-E power oscillator was realized in 0.25 m GaN high power process. The phase noise was estimated according to the phase noise measured before. Since the circuit is still in the process, the design process and full EM simulation result is shown in this thesis. The expected total power consumption is 2.9 W. The lowest phase noise at 1 MHz offset frequency is estimated as -126.5 dBc/Hz. The highest output power is 30.5 dBm. The DC-RF efficiency 39.1 % was calculated. The FoMPOSC is -232.9. The chip size is 1.5 × 1 mm2.
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WANG, CHUN-CHIH, and 王俊智. "Design of Low Power Consumption and Low Phase Noise Class-C Voltage-Controlled Oscillator and Dual Band Voltage-Controlled Oscillator." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/24214422096076873329.
Full textAbstract:
碩士國立臺灣科技大學
電子工程系
105
Rapid growth has been achieved in modern wireless communication system. Therefore recently design of high efficiency, high communication data rate and low error communication system are required, making the phase locked loop (PLL) design more challenging nowadays. Among the voltage controlled oscillator (VCO) is most important circuit in the PLL. The VCO requested with low phase-noise, low power consumption and wide tuning rage, and the performance of VCO can be examined by the Figure of Merit (FOM). First, this thesis presents a 3-phase class-C current reused voltage controlled oscillator (VCO) with dynamic biasing circuit. The 3-phase Class-C VCO is implemented in TSMC 0.18 μm CMOS process and it uses three identical single-ended current reused VCOs in a ring configuration. A dynamic bias circuit is used to reduce the power consumption, and the back-gate BJTs in PMOSFETs are used as a phase coupling device, the circuit oscillates from 4.48 GHz to 5.1 GHz and the power consumption is 3.53 mW at 1.0 V supply voltage. The measured phase noise is -116.52 dBc/Hz at 1 MHz offset frequency from 5.08 GHz. The VCO occupies a chip area of 1.0 × 0.72 mm2 and provides a figure of merit is -185.16 dBc/Hz. Second, a 2.5GHz class-C VCO with dynamic back gate biased MOSFET is proposed. A dynamic gate biasing circuit is used to reduce power consumption by switching NMOS from initial class-AB to class-C operation in steady state. Moreover the VCO uses dynamic back gate bias to reduce threshold voltage of switching MOSFET during the start-up oscillation. The Class-C differential VCO is implemented in TSMC 0.18 μm BiCMOS process. The measured phase noise of -124.8 dBc/Hz at 1MHz offset frequency from 2.48 GHz carrier while consuming 2.64mW power from a 0.8V supply. Tuning range of VCO is 0.72 GHz, from 2.48 GHz to 3.3 GHz, while the control voltage was tuned from 0V to 2V. The VCO occupies a chip area of 0.446×0.84mm2 and provides a figure of merit of -197.55 dBc/Hz. Third, a dual band QVCO using switched transformer coupling is proposed. The proposed QVCO comprises two complementary cross-coupled dual-resonance VCOs and 4 switched-transformers in a ring for coupling the two differential VCOs to generate the quadrature outputs. The measured phase noise at 1MHz offset frequency from 2.41 GHz and 3.08 GHz carrier are -121.4 dBc/Hz and -113.9 dBc/Hz. Tuning range of VCO is 0.39 GHz and 0.61 GHz, from 2.41 GHz to 2.8 GHz and 2.83 GHz to 3.44 GHz while the control voltage was tuned from 0V to 2V. The VCO occupies a chip area of 1.2×1.2mm2 and the figure of merit of -181.8 dBc/Hz and -173.7 dBc/Hz while consuming 5.2mW and 9.7mW power, implemented in TSMC 0.18 μm 1P6M CMOS process. Finally, this thesis also proposes a new concurrent dual band CMOS voltage-controlled oscillator (VCO). The oscillator consists of two sub-VCO operates at 4GHz and 6GHz respectively. The two sub-VCOs are coupled by a pair of MIM capacitors. The proposed oscillator has been implemented with the TSMC 0.18μm BiCMOS technology. By controlling the supply voltages, the VCO has three different operational modes, capable of generating a single frequency in either the 4- or 6-GHz band as well as two frequencies in the 4- and 6-GHz bands simultaneously. In the concurrent mode, the VCO can generate differential signals at 4GHz, 6GHz and their harmonics and other cross-modulation products. The measured phase noise is -111.99 and -121.75 dBc/Hz at 1-MHz offset frequency when the oscillator oscillates at a single frequency of 6.24 or 4.03 GHz, respectively. The measured phase noise is -113.41 and -108.94 dBc/Hz, respectively, when the oscillator oscillates at 3.97 and 6.64 GHz simultaneously. The die area of the concurrent oscillator is 1.178×0.583 mm2.
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Kil, Donghyeok. "Automatic generation of an LC voltage controlled oscillator." 2013. http://hdl.handle.net/2152/22715.
Full textAbstract:
A Voltage Controlled Oscillator (VCO) is used to generate a signal with a frequency that is a function of an input voltage amplitude, and is an integral part of circuits such as phase locked loops, frequency synthesizers, down conversion receivers, and clock generators. A typical design flow for a VCO involves architecture selection based on specification, calculation of circuit parameters, simulation, and iterations of circuit parameters based on the simulation result. In such a design flow, changes in specification or process can lead to significant redesign. This report focuses on a C++ based LC VCO generation software that seeks to automate the design process and that includes calculation of circuit parameters, creation of Spectre netlist, invocation of simulation, automated checking of the result, and a feedback mechanism to modify circuit parameters until the design can converge to the desired specification. Object Oriented Programming principles such as inheritance, polymorphism, encapsulation, class abstraction are exercised to maximize reusability and portability to other projects which may require different foundry device models and supply voltages.text
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LinZhi-peng and 林志鵬. "2.4/5.2 GHz Dual-band Voltage-Controlled Oscillator." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/50739562024568588591.
Full textAbstract:
碩士崑山科技大學
電子工程研究所
93
In recent years, the application products of the wireless local network have already been used extensively on the market. To save cost and reduce volume, concurrent multi-band receivers which can satisfy at least two standards is essential. Hence, the development of dual-band component seems extremely important. The wireless products with the smaller size, lower power consumption, lower cost and high integration are the major stream of the current market. Hence, it has become an inevitable trend to use the CMOS technologies to implement the RF transceivers. In this thesis, we have studied the techniques of design and implementation of the dual-band VCO which are applied to the WLAN systems. It is in both 2.4GHz and 5.2GHz frequency bands. The dual-band VCO conforms to the protocols of the IEEE 802.11a and IEEE 802.11b systems. In this thesis, a differentially cross-coupled structure and LC resonance circuits are used to implement the dual-band functions. The inductors of the traditional LC resonator are replaced with switched inductors in order to arrive at the performances of dual-band oscillation. The studied circuits have been designed under the TSMC 0.18um CMOS processes. These Chips have also been fabricated and measured by the support of CIC in Taiwan. The measured and simulated results are approximate. We study also how to increase the tuning range in order to mitigate the influence of the fabrication variation on the performance by simulation. It is obvious that the tuning range can be increased by biasing bodies of MOS varactors.
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Wang, Yu-Cheng, and 王昱椉. "IEEE 802.11a WLAN CMOS Quadrature Voltage-Controlled Oscillator." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/72444229446191993137.
Full textAbstract:
碩士中華大學
電機工程學系(所)
94
In communication and signal process system, the oscillator is playing an important role. Transceivers often need to quadrature phase oscillator that the signal is being outputted, can modulation or demodulation. The low phase noise and wide-band oscillator have been designer's goals pursued all the time. This thesis design quadrature phase of voltage-controlled oscillator circuit make with CIC in TSMC 0.18um that offer, and this quadrature phase voltage-controlled oscillator will regard IEEE 802.11a WLAN standard as the specification, will design and apply to the circuit on WLAN, combine its integrated circuit finally. This design the specification of using the resonance (Crystal-liked structure ) after improving to reach the low phase noise, supply voltage as 1.8V, the adjustable frequency range is in 5.15 ~ 5.35 GHz, the phase noise is -107.948 dBc/Hz@1MHz, power consumption is 33.3mW, the area of the chip is 1.31224 X 1.279 mm2.
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Tzuhsuan, Peng, and 彭子軒. "A Low Jitter High Linearity Voltage Controlled Oscillator." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/86239292001038107094.
Full textAbstract:
碩士國立中山大學
電機工程學系研究所
92
Phase locked loops (PLL) are used in many applications. Application examples include clock and data recovery, clock synthesis, frequency synthesis, modulator, and de-modulator. In many circuits, PLL must provide an output clock to follow the input clock closely. For high speed environments, the noises also rise up. Noises mainly come from the power supply and substrate. They produce jitter. A low jitter design is important in PLL circuit. In this thesis, we discuss the Voltage Controlled Oscillator (VCO) which has the largest jitter in PLL system. We propose a low jitter voltage controlled oscillator designed in TSMC 0.35μm 2P4M Mixed-Signal process technology. We include a regulator to reduce jitter by increasing the VCO PSRR. This structure also provides a high linearity gain (Kvco) which decreases the VCO jitter in the PLL circuit and improve the system stability.
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Chen, Yin-Yi, and 陳尹翊. "Instability Analysis of a Microwave Voltage-Controlled Oscillator." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/38542733362699111194.
Full textAbstract:
碩士國立臺灣大學
電信工程學研究所
102
This thesis presents the instability analyses using various linear methods including impedance, admittance, reflection coefficient, stability factor, and normalized determinant function (NDF). Instability of oscillator is usually analyzed with impedance, admittance, reflection coefficient, stability factor K-Δ and μ, but the Rollet proviso should be satisfied. Therefore, the use of circuit network determinant to analyze the oscillator instability through NDF is applicable. On the voltage controlled oscillator design, we firstly investigate the various configurations of transistor and its feedback network. Various linear methods are then applied to perform the instability analysis with the help of MWO microwave software. Although the measurement result of oscillation frequency is not consistent to that of the simulation result, it is close to the possible oscillation frequency shown in the simulation.
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Liu, Tzu-Hung, and 劉子弘. "Design of a Wideband Quadrature Voltage Controlled Oscillator." Thesis, 2010. http://ndltd.ncl.edu.tw/handle/19534457334149583117.
Full textAbstract:
碩士國立高雄第一科技大學
電腦與通訊工程所
98
The use of wireless communications growing volume and importance, makes wireless communications circuit requirements, will also increase. In the radio frequency transceiver of the system, often need to use four-phase quadrature signal output of the oscillator, before proceeding modulation and demodulation of the action. So in today''s wireless communications systems, can produce the phase difference with 90 º of the quadrature VCO, thus becoming increasingly important. In this thesis,the use of balanced voltage-controlled oscillator (Balanced VCO) with phase shift circuit to achieve the wideband quadrature voltage controlled oscillator. Theoretical part: 1. Balanced voltage controlled oscillator is a voltage controlled oscillator two of the basic combination of differential use of similar principles to a combination of the two oscillators to achieve a balance so they can raise the tuning frequency range, while can improve stability; 2. phase shift circuit using integrators (Integrator) to use as a phase shift circuit, the high frequency band, often using transimpedance integrator capacitor. In practical, we used 2SC5007 Mode BJT of NEC. As for the varactor, we used BB135 of Philips. For the current reused QVCO,the measurement tuning voltage range is 0~30V. The tuning frequency range is 1.15GHz~2.32GHz. The phase noise as -109. dBc/Hz at 100 kHz offset frequency. The measurement results are phase error are less 5°. Amplitude error of the measured results within 30%.
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Tso-Cheng, Hsu, and 徐佐政. "S-Band Voltage Controlled Oscillator Development and Characterization." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/80836869365152596955.
Full textAbstract:
碩士國立交通大學
電信工程系
88
ABSTRUCT In this thesis, an L-band Voltage Control Oscillator (VCO) within the RF modules and the characteristic measurement are presented. This oscillator is designed to satisfy the oscillation conditions at 2.4 GHz. The measured results agree well with the theoretical simulation. This Hetero-Junction Field Effect Transistor (HJFET) VCO has been developed with 10% tuning range at 2.4 GHz, 6-dBm-output power, at least 20-dBc harmonic suppression, and — 80-dBc/Hz phase noise at offset 100 KHz. The size of the VCO is 600 X 450 mil2.
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CHEN, JUN-DA, and 陳俊達. "Bridge Rectifier Driven Frequency Double Voltage-Controlled Oscillator." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/47192653634181926610.
Full textAbstract:
碩士國立彰化師範大學
工業教育學系
88
Due to the fast development of news information, it becomes a trend to design less, less weight and low power consumption product. Recently, communication and web related equipment are developed quickly product, which meet the requirement of light, thin, short, small, and fast. Beside that, high frequency products with will become the main stream in the future to obtain better product quality. Among them, voltage controlled oscillators are the major parts of such products. In designing a voltage-controlled oscillator, higher frequency, wore wider of adjustable linear range, lower power consumption , and lower voltage are the major consideration. In this thesis, a voltage- controlled oscillator is designed in a 0.6 SPTM CMOS process. This ring-structured VCO consists of three pairs of differential ring oscillator, consisting of, a buffer and a bridge rectifier driven frequency double. The circuit generates a 2.5GHz oscillating frequency, dissipates 17mW for a 2 V supply voltage. The controllable frequency ranges from 700MHz to 2.5GHz. Besides, the designed VCO attains 4.6 GHz oscillating frequencies for 3 V supply voltage. The bias current is 3mA each stage, while consuming only 63mW power.The minimal tuning range of the circuit is over 70%. After the design and simulation procedure, the integrated circuit is realized layout was conducted simultaneously.
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Yang, Chen-Hao, and 楊振豪. "Design of CMOS Differential Voltage Controlled Ring Oscillator." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/05220252527619753755.
Full textAbstract:
碩士國立勤益科技大學
電子工程系
103
In this paper, a CMOS differential voltage controlled ring oscillator (DVCRO) is proposed for wireless energy transmission application. Based on TSMC CMOS 0.18um standard process technology with supply voltage 1.8V, the proposed DVCRO has phase noise -94.37 dBc/Hz with 1 MHz offset frequency. Its oscillation frequency ranges from 0.72GHz to 1.02GHz as the control voltage changing from 0.6 to 1.8 V. Compared with five previous works, the proposed DVCRO has better performance including robust sinusoid output waveform, and lower power consumption ranging from 1.6mW to 1.74mW, approximately 4/5 of the referenced works compared with the best one, and figure of merit (FOM) is -151.18 dBc/Hz.
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Yu-Cheng, Chang, and 張郁政. "Design of 2.4GHz Current Reused Voltage Controlled Oscillator." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/15837341061296658884.
Full textAbstract:
碩士崑山科技大學
電子工程研究所
95
In the wireless communication system of Taiwan, develops already ripely so far, in the product market of communication with competition is intense, manufacturers have priority to consider from the stability and cost of quality invariably. So the products of the commonability seem extremely important when being developed. Direct against the little size, low power consumption, low cost, combination system and efficiency of the production of the wireless communication products, the present trend is developing with CMOS technology. In this thesis, mainly of low power consumption Voltage Controlled Oscillator with design and realizing are our research policy. By the circuit design, make VCOs work in the ISM of 2.4GHz and accord with IEEE 802.11b/g protocol standard. The circuit utilizes the Current Reused Structure with LC tank, and manages to improve this structure the output not symmetry of fault. We increased the parallel resistance on input and output port in order to reduce the difference phase and make the output signal more symmetrical. The VCOs circuit has been designed using TSMC and UMC 0.18um RF CMOS processes . These Chips has been fabricated and measured by the support of CIC in Taiwan. After the comparison with simulated and measured, we proved our design theory accuracy and obtain the measured and simulated results are approximate. The communication system is developed so fast, and the frequency of utilization is more higher, the Ultra Wide-Band will become the communication mainstream in the future, and it is widest band to use 3GHz ~ 5GHz frequency applications, To face the communication application in the future, it designs highly band to be inevitable trend. In the end, we also design a differentially cross-coupled structure and used switched capacitor achieved the 3GHz ~ 5GHz VCO of Ultra Wide-Band standard.
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Wu, Ting-Wei, and 吳定威. "Wideband Active-Inductor Voltage Controlled Oscillator for SDR." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/62119362904048606705.
Full textAbstract:
碩士中華大學
電機工程學系碩士班
100
This thesis mainly studies Wideband Active Inductor Voltage Controlled Oscillator for Soft-Defined Radio(SDR). The structure is divided into two parts. The first part is the design of the active inductor. In order to save the area occupied by passive inductor ,we use active inductor instead. Its principle is to use Gyrator structure such that active MOSFET can equivalent to inductor ,along with parasitic capacitor to form a resonator tank for an oscillator. The second part is the cross-coupled oscillator structure. Incorporating active inductor into our resonator oscillator, we can use its inductor and capacitor to achieve resonated effect. So that ,the whole circuit is only involved MOSFET and resistor to construct a VCO. In this way, we also save the consumed area by passive inductor. The design target is the enough bandwidth for SDR. Firstly ,we design and simulation of circuit designed with TSMC 0.35um 2P4M process. The frequency range to be controlled by voltage is from 0.37GHz to 1.39GHz. The simulated phase noise is small then -103dBc/Hz at 1MHz offset. The IC layout is implemented by Laker layout tool with 0.35um CMOS Library offered by TSMC. After DRC, LVS and Post-Layout simulation, we tape-out this VCO IC chip with chip area of 0.57mm × 0.57mm。
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Kun-LinYang and 楊昆霖. "Implementation of a 27-GHz Voltage-Controlled Oscillator." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/58730443518885262117.
Full textAbstract:
碩士國立成功大學
電機工程學系專班
100
Though the system standards for the applications in the V-band of 57 to 64 GHz are still not clear, the main leadership design companies have already put a great effort on the integration of 60-GHz mm-wave front-end circuits. In this thesis, a 27-GHz voltage-controlled oscillator (VCO) with low power and low phase-noise performances are designed in a mature 0.18-um CMOS process. This oscillator can provide a 54-GHz signal in the case with the help of a frequency doubler. From the measurement results measured by CIC, the output frequency of the VCO ranging from 26.96 to 27.95 GHz (with a tuning range of about 1 GHz). The total power consumption is 3.5 mW from a 1.8V supply voltage. The output power is -7.88 dBm. The measured phase noise at 27 GHz is -99.39 dBc/Hz @ 1MHz offset and -120.94 dBc/Hz@10 MHz offset. The calculated figure-of-merits (FOM) are about in the range of -182.56 dBc (at 1 MHz offset) and -184.11 dBc (at 10 MHz offset). The chip size is about 0.855x0.679 mm2. It is shown that there are some inconsistences between the measurement and simulation results of phase noise. After EM simulation of inductor, it found the result is similar to measurement. In the future, for the more precise simulation results, the layout of inter connection lines, inductors, and capacitances have to be taken into the design. Simultaneously, we would like to transfer this design from a 0.18um CMOS to a 90nm CMOS process, in order to achieve the lower power and higher performance.
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Su, Shyh-Shyang, and 蘇士翔. "Design of Dual Band Left-Hand Circle Voltage-Controlled Oscillator and Triple Band Left-Hand Circle Voltage-Controlled Oscillator with Frequency Tuning." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/09003226607136490012.
Full textAbstract:
碩士國立臺灣科技大學
電子工程系
104
In the wireless communication system, Phase-Locked Loop / Frequency synthesizer are the most important part in the Local part. In the PLL/Frequency synthesizer which Voltage-Controlled Oscillator is the most important unit. The performance of PLL/Frequency synthesizer are depend on VCO. Frequency , power consumption, phase noise are the reference of FoM (Figure of Merit). Frequency tuning range and chip size are another consideration for SoC (System on Chip). For the better performance of PLL/Frequency synthesizer, carefully designed VCO is needed. In the first chip, we design a Left-Hand VCO with dual-band uses two inductors and set Vtune between L1 and L2. The architecture uses L1 with C1、C2 to form a resonator and L2 with C3、C4 to form another resonator. The proposed Dual-band VCO operates with 0.9 V supply voltage and fabricated in TSMC 0.18-µm CMOS process. The measured tuning range are 4.256~4.367GHz and 3.66~3.726GHz. Phase noise is -118.85 dBc/Hz at 1 MHz offset from 4.256 GHz. Power consumption is 5.238 mW. At last, we discuss about frequency tuning with Vc and Vdd. The whole chip size including pads is 0.642×1.063mm2. In the second chip, we design a Left-Hand VCO with dual band using two inductors and set Vtune between L2 and Cross-Couple pair. The architecture uses L1 with C1、C2 to form a resonator and L2 with C3、C4 to form another resonator. The first band range is from 4.04GHz~4.36 GHz. The second band tuning range is from 6.09GHz~6.21GHz. The proposed Dual-band VCO operates with 0.65 V supply voltage and fabricated in TSMC 0.18-µm CMOS process. Power consumption is 4.138mW . At last, we discuss about frequency tuning with Vc and Vdd. For the specific Vt in Hysteresis, we have dual tones at different resonance frequencies in full span spectrum. Whole chip size including pads is 0.527×0.749mm2. In the third chip, we proposes a Triple-band Left-Hand VCO. We use three inductors and three pair capacitors to form three resonators to generator triple-band frequency signals. We set Vtune1 between L2 with L3 and Vtune2 between L1 with a Cross-Coupled MOS pair. The measured first band frequency is from 4.27GHz~4.49GHz . Second band frequency is from 6.98GHz~7.41GHz . Third band frequency is from 4.27GHz ~ 4.49GHz.The power consumption is 3.735mW. This chip is implement in TSMC 0.18 μm 1P6M CMOS process. At last, We discuss about frequency tuning with Vc and Vdd. For the specific Vt in hysteresis, we have dual tones at different resonance frequencies in full span spectrum. The chip size including pads is 0.568 × 1.189 mm2.
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Hsu, Chia-Chun, and 徐嘉駿. "A Voltage Controlled Oscillator and a voltage mode/current mode Schmitt Trigger." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/66427802810816699072.
Full textAbstract:
碩士中原大學
電子工程研究所
94
Abstract This paper presents a Voltage Controlled Oscillator using a Multiplier、an inductor and a capacitor. This paper also presents a Schmitt trigger implemented by an OTRA which can be used as a current mode Schmitt trigger or a voltage mode Schmitt trigger. The Voltage Controlled Oscillator is developed by using Miller theorem. The benefits of this structure are simple and easy to control the frequency of oscillation. The Voltage Control Oscillator in this paper had been proved workable by experiments. The Schmitt trigger can be transferred from current mode Schmitt trigger to voltage mode Schmitt trigger by adding an input resistor. And the current switching points and voltage switching points can be adjusted by using two OTAs for avoiding the variation of the IC process. The Schmitt trigger in this paper had been proved workable by HSPICE simulation.
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Huang, Guo-Chiang, and 黃國強. "Design and Fabrication of a S-Band Low-Voltage Voltage Controlled Oscillator." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/81721383307367768347.
Full textAbstract:
碩士國立中正大學
物理學系
84
AbstractWireless communication has developed prosperously in the recent years. Designing the key components of the radio frequency module ( RF module ), plays a crucial role in the development of the transceiver for handset and base station. In this research , we design and implement low-voltage voltage controlled oscillator, which is an essential device widely used in the frequency synthesizer. By using the computer simulation software HP-MDS and Libra, the VCO is analyzed linearly and nonlinearly in both spectral and time domains. The VCO is investigated for different supply voltages, from 2.5 V to 10 V. The tuning sensitivity of 63 MHz/V and frequency coverage from 1993 MHz to 2200 MHz are obtained. 1 dBm output power and -77 dBc/Hz @10 kHz off phase noise are observed. The size of the circuit is 1.8 cm by 1.4 cm. We have also finished the simulation of a Monolithic Microwave Integrated Circuit ( MMIC ) VCO and find out that it can oscillate between 2010 and 2115 MHz with average output power of 7 dBm.Key Words: Voltage Controlled Oscillator, Hybrid Microwave Integrated Circuit, Harmonic Balance Nonlinear Analysis, Monolithic Microwave Integrated Circuit.
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Chiu, Hsien-Hung, and 邱顯鴻. "Low Voltage CMOS RF Voltage-Controlled Oscillator and Phase-Locked Loop Design." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/83855848355258191733.
Full textAbstract:
碩士國立交通大學
電機學院碩士在職專班電信組
95
The low power consumption plays an important role in RFIC’s for wireless communication transceiver. RFIC usually consists of Mixer, Voltage-Controlled Oscillator (VCO), Filter, Power Amplifier, etc. One of important component is VCO in power consumption issue. In this thesis a low voltage operation circuit for VCO and Phase-Locked Loop (PLL) is developed. The TSMC 0.18μm RF CMOS manufacture Technology is used for ultra low voltage VCO and low voltage phase-locked loop which can be applied to UWB system and dual band quadrature phase voltage-controlled oscillator which can be applied to WiFi system. There are three kinds of low voltage VCOs be implemented with different circuit characteristics. The first kind of VCO uses LC tank with NMOS cross-coupled pair and cross-paralleled capacitor improving the quality factor in the active port. The measured power consumption of VCO core circuit draws only 0.54mW and FOM value is 185. The second kind of VCO modfines to bulk to decreasing noise induces. That improves traditions quadrature phase VCO phase noise. The measured power consumption of VCO core circuit is 2.67mW and FOM value is 181.7 under 0.65V supply. The third kind of dual band low power QVCO simplify traditions dual band VCO circuit and adopts current-reuse topology. The measured power consumption of DB-QVCO core circuit is 5.46mW and 6.75mW under 1.3V and 1.5V supply for low band and high band. FOM value is both 171 . The second part designs low voltage PLLs that can be applied to UWB system. PLLs output frequency is 5.016GHz and including I/Q signals. The low voltage PLL adopts level shift current mode logic (LS-CML) divider at the 1st stage divider. Using reform pre-charge phase frequency detector (PFD) and refine true single phase clock (TSPC) divider. The whole loop simulated power dissipation is 5.58mW.
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Cheng, Gwong-Wai, and 鄭光偉. "A 5.25GHz Fully Integrated CMOS Quadrature Voltage-Controlled Oscillator." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/70224069224159570959.
Full textAbstract:
碩士國立交通大學
電信工程系
90
A 5.25GHz fully integrated CMOS quadrature Voltage-Controlled Oscillator for IEEE 802.11a direct conversion receiver is presented. The quadrature VCO is fabricated by TSMC 0.25um CMOS process using accumulation mode MOS varactor to upgrade tuning range and lower phase noise. The architecture of VCO adopts both NMOS and PMOS cross-coupled pair to enhance negative conductance, and connects two differential LC-tank VCOs to generate four 0,90,180,270 degrees signals The measured result attain a oscillation frequency sweep from 5.260GHz ~ 5.525GHz, tuning range 265MHz, phase noise of -102.83dBc/Hz at 1MHz offset and 17.5mW power consumption at 2.5V DC supply.
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蔡文彬. "The Design and Analysis for 5GHz Voltage-Controlled Oscillator." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/29324164698805114980.
Full textAbstract:
碩士國立清華大學
電子工程研究所
90
In this thesis, 0.18μm CMOS technology is used to design oscillators working at 5GHz for wireless applications. The simulation tool used is the ADS 1.5. At first, we introduce the fundamental components of oscillator, and discuss their behaviors in RF band. The architectures of oscillator are cross-coupled pair and complementary cross-coupled pair. The output signal is in differential form. Phase noise is an important factor of oscillator in RF transceiver systems. Therefore, Lesson model and time-variant model are used to analyze. The Q-value, quality factor, of inductor is very significant to phase noise. According to the mathematic equations and simulation results, more advanced process technology gives better quality factor of inductor and phase noise. In LC oscillator circuit, the main trade off is between power consumption and phase noise. The phase noise is inversely proportional to power consumption. At last, a new structure that can generate higher negative resistance is proposed. It allows the circuit take less time to stable.
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Yao, Chi-Ping, and 姚啟平. "The Circuit Design of Dual-Band Voltage-Controlled Oscillator." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/54154547643571076574.
Full textAbstract:
碩士國立清華大學
電子工程研究所
90
When the device technology improves, the power supply vdd become lower,the voltage used to bias the varactor reduced consequently. As a result, the tuning range of vco reduces.This thesis use CMOS technology to simulate specification of GSM900 and DCS1800 which dual-band voltage-controlled oscillator,and can be used in RF transceiver.So,it introduce mulity channel and wide channel form the design of circuit.Beside, using switch resonator to meet the requirement of dual-band range and using the varactor to tune frequency slightly.
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Kuo, Jiun-Yi, and 郭俊億. "Fabrication of RF Voltage Controlled Oscillator for Wireless Communications." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/47712866502153951819.
Full textAbstract:
碩士中華大學
電機工程學系碩士班
88
This thesis mainly covers the design and the fabrication of voltage-controlled oscillator ( VCO ) for the applications of ISM band wireless communications. Generally speaking, the active device and resonator would decide the characteristics of VCO. In this thesis, the VCO using a resonator consisting of microstrip coupled line and varactor diode is fabricated. If we carefully choosing the position of varactor diode in the tank, it will let the total circuit of VCO have lower phase noise.
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Lin, Chin-Chun, and 林志駿. "The design of Nested cross-coupled voltage controlled oscillator." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/48644459168414646185.
Full textAbstract:
碩士龍華科技大學
電子工程研究所
96
This paper presents the designing of integrated circuit radio frequency voltage controlled oscillators. Improving the performances of LC-Tank VCO, the circuits designed with Nested cross-coupled technique, simulated with ADS and fabricated using TSMC 0.18-μm 1P6M COMS process. The first chip is “Wide Tuning Range VCO for 802.11a Application”. The design improves the tuning range of LC-Tank VCO by Nested cross-coupled technique. The VCO consumes 3.55mW from 1.6V&0.9V power supply and oscillation frequency is 5.75GHz. The phase noise is -115.59 dBc/Hz at 1MHz offset from the carrier frequency. Control voltage tuned from 0V to 1.6V, tuning range is 1.22GHz. Figure of merit is -185.2 dB and the chip area is 0.68 x 0.95 mm2. The second chip is “0.7V Low Phase VCO with Nested Cross-coupled Technique”. The VCO achieves low phase noise performance in low power and low power consumption. The VCO consumes 1.41mW from 0.7V power supply and oscillation frequency is 5.25GHz. The phase noise is -111.9 dBc/Hz at 1MHz offset from the carrier frequency. Control voltage tuned from 0V to 0.7V, tuning range is 620MHz. Figure of merit is -184.8 dB and the chip area is 0.638 x 0.79 mm2. The third chip is “Low Power and Low Phase Noise 10GHz VCO”. With switching biasing and Nested cross-coupled technique, the VCO achieves low phase noise and wide tuning range at 10GHz oscillation frequency. The VCO consumes 2.1mW from 1.8V&0.7V power supply and oscillation frequency is 9.87GHz. The phase noise is -111.5 dBc/Hz at 1MHz offset from the carrier frequency. Control voltage tuned from 0V to 1.8V, tuning range is 1.45GHz. Figure of merit is -188.2 dB and the chip area is 0.609 x 0.958 mm2. The fourth chip is “Low Power Consumption QVCO for WiMax Application”. The switch biasing technique suppresses the noise of the coupling transistors from coupling into the circuit. The QVCO consumes 4.01mW from 0.8V&0.7V power supply and oscillation frequency is 5.4GHz. The phase noise is -109.2 dBc/Hz at 1MHz offset from the carrier frequency. Control voltage tuned from 0V to 0.8V, tuning range is 260MHz. Figure of merit is -178.7 dB and the chip area is 0.61 x 0.962 mm2.
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Chiang, Yeuh-Hua, and 江岳樺. "Design of CMOS Quadrature Voltage-Controlled Oscillator and Divider." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/9j45v7.
Full textAbstract:
碩士國立臺灣科技大學
電子工程系
94
This thesis proposes the design of CMOS Voltage-Controlled Oscillator. The first part proposes the method to improve the nonlinear drawbacks of conventional LC-Voltage-controlled oscillators by a new varactor structure. The main structures are cross coupled pair VCO and “A-mode varactor” using the standard TSMC 0.18μm CMOS 1P6M process. The second part of this thesis proposes a assembling quadrature VCO (QVCO) and a 2.4GHz Colpitts VCO using transformer feedback. We use the Colpitts structure to improve the phase noise of VCO in both of the circuits. In the QVCO circuit, first we use two single-ended Colpitts VCOs to form a differential Colpitts circuit, and then use two differential Colpitts to couple each other to ensure quadrature signals. In the 2.4GHz Colpitts VCO with transformer feedback, we used two transformers to increase the feedback signal and swing range. The third part composes of two different divider structures using VCO as major structure, then using direct-injection and SCL to complete the circuits. All of the circuits in this thesis were made by TSMC and UMC 0.18µm CMOS and were simulated with Cadence Spectre RF. Finally, the performances of these circuits are comapred.