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Journal articles on the topic 'Voltage Divider Circuit'

Author: Grafiati

Published: 2 June 2025

Last updated: 31 July 2025

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1

Selvam, K. C., and S. Latha. "A Novel Voltage Divider Circuit." Engineering, Technology & Applied Science Research 2, no. 5 (2012): 278–80. http://dx.doi.org/10.48084/etasr.239.

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A novel analog divider is described in this paper. The circuit enables the division of a dc voltage with another dc voltage. The constant of the division is dependent upon a third dc voltage and a pair of resistors. Employing a precision source for the third dc voltage and matched resistors, an acceptable level of accuracy can be obtained.

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2

Jetsdaporn, Satansup, and Tangsrirat Worapong. "1.5-V CMOS Current Multiplier/Divider." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 3 (2018): 1478–87. https://doi.org/10.11591/ijece.v8i3.pp1478-1487.

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A circuit technique for designing a compact low-voltage current-mode multiplier/divider circuit in CMOS technology is presented. It is based on the use of a compact current quadratic cell able to operate at low supply voltage. The proposed circuit is designed and simulated for implementing in TSMC 0.25-m CMOS technology with a single supply voltage of 1.5 V. Simulation results using PSPICE, accurately agreement with theoretical ones, have been provided, and also demonstrate a maximum linearity error of 1.5%, a THD less than 2% at 100 MHz, a total power consumption of 508 W, and -3dB small-si

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3

Bordyug, Alexander Sergeevich. "Developing model of transient processes in transformer under capacitive load." Vestnik of Astrakhan State Technical University. Series: Marine engineering and technologies 2022, no. 2 (2022): 80–84. http://dx.doi.org/10.24143/2073-1574-2022-2-80-84.

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Voltage transformers with capacitive loading during transients can cause significant distortion of the secondary voltage of the ship's network. For the analysis, a well-known nonlinear model of a single-phase two-winding transformer is used, in which the magnetic flux is divided into “working” and leakage fluxes coupled to individual windings that close outside the core. For practical purposes, when using such transformers, it is important to know both the conditions for the occurrence of autoparametric oscillations and the dynamics of the transient process. It is convenient to carry out a com

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4

Pant, Pragya, Nihal Shrivastava, Muskan Arora, and Ruchi Paliwal. "Wilkinson Power Divider." International Journal for Research in Applied Science and Engineering Technology 11, no. 5 (2023): 163–69. http://dx.doi.org/10.22214/ijraset.2023.51432.

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Abstract: The basic design of a power divider with two symmetrical quarter-wavelength branches that provide matching conditions at all of its ports is the focus of the research. Fr4 was chosen as the design's substrate, and 2.9 GHz is the operating frequency for the circuit. The structure of the power divider rules, which were derived from a circuit-theoretic analysis of AC power-flow expressions, reflects the topology and voltage profile of the network. We show how the power divider laws can be used to analyse power networks. The Wilkinson Power Divider has several uses, including feeding cir

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5

Asl, S. N., M. Tarkhan, and M. S. Nia. "A Gain Programmable Analog Divider Circuit Based on a Data Converter." Engineering, Technology & Applied Science Research 7, no. 6 (2017): 2251–55. https://doi.org/10.5281/zenodo.1118350.

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Analog dividers are widely used in analog systems. Analog realization of such circuits suffer from limited dynamic range and non-linearity issues, therefore, extra circuitry should be required to compensate these types of shortcomings. In this paper a gain controllable, analog divider is proposed based on data converters. Our circuit can be implemented both in current and voltage mode by selecting proper architectures. The resolution, power consumption and operation speed can be controlled by proper selecting of components. Another advantage of our circuit is its gain programmability. Moreover

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6

Satansup, Jetsdaporn, and Worapong Tangsrirat. "1.5-V CMOS Current Multiplier/Divider." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 3 (2018): 1478. http://dx.doi.org/10.11591/ijece.v8i3.pp1478-1487.

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A circuit technique for designing a compact low-voltage current-mode multiplier/divider circuit in CMOS technology is presented. It is based on the use of a compact current quadratic cell able to operate at low supply voltage. The proposed circuit is designed and simulated for implementing in TSMC 0.25-m CMOS technology with a single supply voltage of 1.5 V. Simulation results using PSPICE, accurately agreement with theoretical ones, have been provided, and also demonstrate a maximum linearity error of 1.5%, a THD less than 2% at 100 MHz, a total power consumption of 508 W, and -3dB small-si

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7

Siddaiah, Premananda Belegehalli, Sahithi Narsepalli, Sanya Mittal, and Abdur Rehman. "Area and power efficient divide-by-32/33 dual-modulus pre-scaler using split-path TSPC with AVLS for frequency divider." Journal of Electrical Engineering 74, no. 5 (2023): 403–12. http://dx.doi.org/10.2478/jee-2023-0048.

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Abstract Pre-scalers are electronic circuits used in phase-locked loops to multiply frequencies. This is achieved by dividing the high-frequency signals generated from a voltage-controlled oscillator. The high-frequency operation of pre-scaler circuits leads to significantly higher power consumption. To address this, D flip-flops (D-FF) realized using true-single phase clocking (TSPC) logic. The work suggests incorporating the Adaptive Voltage Level Source (AVLS) circuit with the Dual Modulus Pre-Scaler (DMPS) circuit to reduce power consumption. In addition to the incorporation of the AVLS ci

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8

Cao, Bao Feng, Jiang Bing Fan, Li Jun Song, et al. "Design of a Two Levels Self-Integrating Capacitive Divider." Applied Mechanics and Materials 599-601 (August 2014): 882–86. http://dx.doi.org/10.4028/www.scientific.net/amm.599-601.882.

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A ims . A kind of two levels self-integrating capacitive voltage divider is designed to online measure high voltage nanosecond pulse. Methods. The circuit principle of capacitive divider is analyzed, and the theoretical voltage ratio is calculated. The calibration is carried out by using a low voltage pulse source. The divider with a primary voltage divide ratio 601 has been tested to frequency response exceed 1GHz. The second voltage divide ratio can be set flexibly using different ratio attenuators according to the different voltage level of the source. Result. Finally, this divider is used

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9

Gyawali, Yadu Prasad, and Mohit Angurala. "Design of Frequency Divider (FD/2 and FD 2/3) Circuits for a Phase Locked Loop." International Journal on Future Revolution in Computer Science & Communication Engineering 8, no. 1 (2022): 27–31. http://dx.doi.org/10.17762/ijfrcsce.v8i1.2103.

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This paper reports on three design of Frequency Divider (FD/2) and Frequency Divider (FD 2/3) circuits. Tanner EDA tool developed on 130nm CMOS technology with a voltage supply of 1.3 V is used to build, model, and compare all circuits. For the FD/2 circuit, E-TSPC Pass Transistor logic uses 1.77 µW, whereas TSPC logic consumes 5.57 µW for the FD 2/3 circuit. It implies that the TSPC logic is the best solution since it meets the speed and power consumption requirements.

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10

Volodymyr, Brzhezitsky, Trotsenko Yevgeniy, and Haran Yaroslav. "OPTIMIZATION OF AMPLITUDE-FREQUENCY CHARACTERISTIC OF BROADBAND VOLTAGE DIVIDER INTENDED FOR MEASUREMENT OF POWER QUALITY PARAMETERS." TECHNOLOGY AUDIT AND PRODUCTION RESERVES 3, no. 1(53) (2020): 35–39. https://doi.org/10.15587/2706-5448.2020.205132.

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<em>The object of research is the circuit diagram of a broadband capacitive-resistive voltage divider with a series-parallel connection of its resistive and capacitive components. For many years, the use of voltage dividers was limited to measuring various voltages in high-voltage laboratories. However, voltage dividers, compared to voltage transformers, are characterized by a wider bandwidth, therefore they began to be considered as one of the main means of measuring voltages in high-voltage electric networks. One of the catalysts for the implementation of this solution may be the intensive d

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11

Haran, Y. O., Y. O. Trotsenko, O. R. Protsenko, and M. M. Dixit. "The impact of parasitic capacitances on the accuracy of scale transformation of high-voltage dividers." Electrical Engineering & Electromechanics, no. 1 (January 2, 2025): 65–72. https://doi.org/10.20998/2074-272x.2025.1.09.

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Purpose. The aim of this work is the determination of the parasitic capacitance’s influence on the accuracy of scale transformation of high-voltage dividers. Analyzing the possibilities of reducing such influence is a pressing problem for high voltage measurement, especially at high frequency range of input voltage. Methodology. Mathematical modeling of the voltage divider equivalent circuit, considering parasitic capacitances and inductances has been performed in the QUCS circuit simulator software under sinusoidal alternating current conditions in the range from 100 Hz to 1 MHz. Using the FE

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12

Asl, S. N., M. Tarkhan, and M. S. Nia. "A Gain Programmable Analog Divider Circuit Based on a Data Converter." Engineering, Technology & Applied Science Research 7, no. 6 (2017): 2251–55. http://dx.doi.org/10.48084/etasr.1436.

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Analog dividers are widely used in analog systems. Analog realization of such circuits suffer from limited dynamic range and non-linearity issues, therefore, extra circuitry should be required to compensate these types of shortcomings. In this paper a gain controllable, analog divider is proposed based on data converters. Our circuit can be implemented both in current and voltage mode by selecting proper architectures. The resolution, power consumption and operation speed can be controlled by proper selecting of components. Another advantage of our circuit is its gain programmability. Moreover

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13

Choi, Hojong. "Harmonic-Reduced Bias Circuit for Ultrasound Transducers." Sensors 23, no. 9 (2023): 4438. http://dx.doi.org/10.3390/s23094438.

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The gain of class-C power amplifiers is generally lower than that of class-A power amplifiers. Thus, higher-amplitude input voltage signals for class-C power amplifiers are required. However, high-amplitude input signals generate unwanted harmonic signals. Therefore, a novel bias circuit was proposed to suppress the harmonic signals generated by class-C power amplifiers, which improves the output voltage amplitudes. To verify the proposed idea, the input harmonic signals when using a harmonic-reduced bias circuit (−61.31 dB, −89.092 dB, −90.53 dB, and −90.32 dB) were measured and were found to

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14

Hu, Bo Xue, He Li, Zhuo Wei, et al. "An Auxiliary Power Supply for Gate Drive of Medium Voltage SiC Devices in High Voltage Applications." Materials Science Forum 924 (June 2018): 836–40. http://dx.doi.org/10.4028/www.scientific.net/msf.924.836.

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A high-reliability auxiliary power supply (APS) for gate drive circuits is crucial to utilization of emerging medium voltage (MV ≥ 10 kV) Silicon Carbide (SiC) devices in high voltage applications. This paper proposes an active voltage divider based APS with lower arm voltage regulation. The proposed APS circuit is targeting the application of MV SiC devices in modular multilevel converters (MMCs). It can harvest energy from a MV (≥ 7 kV) dc bus to provide an isolated low voltage output to gate drive circuits of MV SiC devices. Compared to existing APS solutions, it can achieve a high input vo

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15

Zhao, Xiaohong, Yongbo Su, You Chen, et al. "The Study on Single-Event Effects and Hardening Analysis of Frequency Divider Circuits Based on InP HBT Process." Micromachines 15, no. 4 (2024): 527. http://dx.doi.org/10.3390/mi15040527.

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The single-event effects (SEEs) of frequency divider circuits and the radiation tolerance of the hardened circuit are studied in this paper. Based on the experimental results of SEEs in InP HBTs, a transient current model for sensitive transistors is established, taking into account the influence of factors such as laser energy, base-collector junction voltage, and radiation position. Moreover, the SEEs of the (2:1) static frequency divider circuit with the InP DHBT process are simulated under different laser energies by adding the transient current model at sensitive nodes. The effect of the

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16

K., Prasath, Karthigeyan M., Suresh Moorthy P., and Prasanth S. "Generation of High Voltage with Voltage Multiplier for Insulation Testing." Journal of Signal Processing 6, no. 2 (2020): 1–5. https://doi.org/10.5281/zenodo.3778251.

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DC high voltage is used in testing a variety of insulating material. To obtain higher D.C voltage with the low input source in small scale circuit a high step up D.C to D.C converter with voltage multiplier module is designed. Simulation of high step up D.C to D.C converter with 24 stage cascaded voltage multiplier module is designed and the multi-module circuit is developed by connecting the output voltage of each module in series is done using software MATLAB Simulink. The maximum D.C. yield voltage of 50.93 k V is produced utilizing this smaller converter in reenactment. Then the voltage di

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17

Dadić, Martin, Bruno Sandrić, Petar Mostarac, and Roman Malarić. "A Resistive Voltage Divider for Power Measurements." Journal of Energy - Energija 69, no. 1 (2020): 3–6. http://dx.doi.org/10.37798/202069132.

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The paper presents a resistive voltage divider (RVD), developed for power measurements at much higher frequencies than the traditional 50 Hz. The design of the RVD and the methods of its evaluation are described. The RVD is intended to be used in a digital sampling wattmeter application based on National Instruments PXI-4461 Dynamic Signal Analyzer. The design of the divider includes individual copper guards for each resistor, driven by the auxiliary chain of resistors. To reduce the leakage currents, the PTFE terminals are applied between pins of the resistors and the printed circuit board.

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18

Cho, Kunhee. "An Ultra-Low Quiescent Current Under-Voltage Lockout Circuit for a High-Voltage Gate Driver IC." Electronics 9, no. 10 (2020): 1729. http://dx.doi.org/10.3390/electronics9101729.

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An ultra-low quiescent current under-voltage lockout (UVLO) circuit for a high-voltage gate driver integrated circuit (HVIC) is described for application in portable devices. The UVLO circuit consumes the static current in the high-side circuitry and the resistive divider used to detect the supply-voltage was the major consumer of power in the circuit. Hence, a supply-voltage sensor based on a diode-connected metal–oxide–semiconductor field-effect transistor (MOSFET) with a voltage limiter design is proposed to ensure low power consumption. Unlike the conventional UVLO design, where a resistiv

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19

Li, Yan Qiang, Wen Feng Li, Hai Ming Shao, Fei Peng Lin, Bo Liang, and Huang Hui Zhang. "The Research of Capacitive Load Influence on Inductive Voltage Divider." Advanced Materials Research 718-720 (July 2013): 1537–41. http://dx.doi.org/10.4028/www.scientific.net/amr.718-720.1537.

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The inductive voltage divider is usually used and calibrated at no-load situation, but it also used at taking load situation. For example in the situation of measuring voltage dependence of low voltage capacitors and detecting high voltage bridge, the inductive voltage divider need to take two specific capacitors. This paper have researched the influence of specific capacitive load on its ratio and deduced the analytical formula through related experiments and circuit model analysis when it takes capacitor. And use the method of connecting resistor in series to compensate its ratio accuracy to

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20

Sun, Jinru, Qin Qing, Haoliang Liu, Xueling Yao, Zijiao Jiao, and Yiheng Wu. "A Compact High-Stability Nanosecond Pulse Test System Using Corona-Stabilized Switch and Coaxial Resistance Divider." Energies 16, no. 11 (2023): 4534. http://dx.doi.org/10.3390/en16114534.

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Due to the lack of a standard nanosecond high-voltage pulse generator for sensor calibration, a high-stability nanosecond high-voltage pulse test system was developed in terms of circuit analysis, structural design, and performance test. By establishing the equivalent circuit model of the nanosecond pulse generator, the circuit component parameters of the five-stage Marx loop and the one-stage compression steepening unit were simulated. The influence of the action performance of the steepening gap on the characteristics of output nanosecond pulse was analyzed. The nanosecond pulse test system

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21

Fang, Xiaomin, and Xiaolu Li. "Design and Performance Analysis of Photovoltaic Power Generation Light Emitting Diode Device." Journal of Nanoelectronics and Optoelectronics 19, no. 6 (2024): 605–12. http://dx.doi.org/10.1166/jno.2024.3610.

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This research focuses on an independent photovoltaic power generation system with supercapacitor energy storage as the study subject. The model is simplified, and the photovoltaic power generation light emitting diode (LED) device is designed based on the given parameters. This system selects a Boost-type step-up converter for the supercapacitor charging circuit, capable of achieving Maximum Power Point Tracking (MPPT). The supercapacitor discharge circuit employs an LM2596 series regulator to power the rated load LED (12 V, 1 W), providing good linear regulation capability. In designing other

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22

Kaczmarek, Michal. "Two Channels Opto-Isolation Circuit for Measurements of the Differential Voltage of Voltage Transformers and Dividers." Energies 15, no. 7 (2022): 2694. http://dx.doi.org/10.3390/en15072694.

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In this paper the design of the two channel opto-isolation circuit for measurements of the differential voltage is presented. It is used to ensure high impedance of the measuring channel(s) in the differential system to ensure the rated operation of connected voltage divider(s). Its conversion accuracy tests are oriented to determine the ratio and phase errors introduced by a tested device under three test conditions. The opto-isolation circuit is tested for the internal noise at various levels of common voltage. In the next step the calibration of the zero output voltage at zero differential

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23

Orlov, Aleksandr I., Sergei V. Volkov, Ilsur Kh Garipov, and Sergey G. Nikiforov. "ANALYSIS OF POSSIBILITY OF LOW POWER TAKE-OFF FROM MEDIUM VOLTAGE OVERHEAD TRANSMISSION LINES." Vestnik Chuvashskogo universiteta, no. 1 (March 30, 2022): 100–106. http://dx.doi.org/10.47026/1810-1909-2022-1-100-106.

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The paper considers the possibility of using capacitive power take-off from medium voltage overhead power lines with isolated neutral. Direct scaling of the designs of the known 1-phase capacitive power take-off devices intended for high voltage overhead power lines is impractical for several reasons: the impossibility of obtaining significant power, violation of the operating conditions of protection against single-phase earth faults, the creation of asymmetry of phase voltages relative to the ground. As a power take-off device, it is proposed to use a 3-phase symmetrical circuit of a capacit

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24

Fuada, Syifaul, Maulida Yasmin, Meiliya Cahya Yustina, et al. "Analisis Rangkaian Pembagi Tegangan dan Perbandingan Hasil Simulasinya Menggunakan Simulator Offline." Circuit: Jurnal Ilmiah Pendidikan Teknik Elektro 6, no. 1 (2022): 28. http://dx.doi.org/10.22373/crc.v6i1.11200.

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This paper reveals the voltage divider circuit to better understand the fundamental working principles in detail. The approach was simulated using popular offline simulators (i.e., Pr, CW circuit, and virtual mode, EWB, Mu, P, Ye, TS, QUCS, LTS, SI, and PhET). Two scenarios were carried out: measuring the output voltage (Vout) with known R1, R2, and DC source (Battery) as a voltage input (Vin), then looking for R1 and R2 using four different calculation methods to obtain Vout as expected. Afterward, the value of R1 and R2 were inserted into the simulation circuit to guarantee if the current Vo

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25

Hartono, Bibit. "Application End of Line Resistor (EOLR) and Voltage Divider for Passive Infrared Motion Sensor." ACMIT Proceedings 5, no. 1 (2019): 50–56. http://dx.doi.org/10.33555/acmit.v5i1.74.

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End of Line Resistor (EOLR) is a resistor that has a certain value to protect the circuit at the end of a loop or zone. The End of Line Resistors is used in security systems to enable the control panel to monitor wiring of open and closed. In this research using an Arduino microcontroller and Passive Infrared (PIR) Motion Sensor that connected with the systematic circuit to supervisory a loop or zone. Systematic circuit use combination of the resistor as the end of line resistor and voltage divider method. Analog input on Arduino uses to detect different states of sensors. The 1K resistor in s

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26

Winkelholz, Jonas, Moritz Hitzemann, Alexander Nitschke, Anne Zygmanowski, and Stefan Zimmermann. "Resistive High-Voltage Probe with Frequency Compensation by Planar Compensation Electrode Integrated in Printed Circuit Board Design." Electronics 11, no. 21 (2022): 3446. http://dx.doi.org/10.3390/electronics11213446.

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Resistive voltage dividers tend to have a highly non-linear transfer function as parasitic and stray capacitances exert an increasing influence with increasing frequency. The non-linear transfer function depends on the topology and resistors used and consists of a low-pass filter with an additional high-pass component in the GHz range. Due to the non-linear transfer function the measured signal differs from the original input signal. Here, we present an improved resistive voltage divider with additional compensation capacities to extend the linear bandwidth. With this new concept, the linear b

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27

Hong, Seok-In. "Geometric circuit analysis." Physics Education 58, no. 6 (2023): 065021. http://dx.doi.org/10.1088/1361-6552/acf108.

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Abstract The Smith rectangle symbolises the resistor and its width, height, aspect ratio, and area represent the current through, the voltage across, the resistance of, and the power dissipated in the resistor, respectively. In this article, the mosaic of rectangles (MOR) is introduced as a geometric approach to connected planar resistive network circuits with an ideal voltage source. In the MOR, the geometric Kirchhoff’s current and voltage laws are expressed as width and height conservations, respectively and are automatically satisfied. Four basic circuits are considered as applications of

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28

Gao, Wanhang, Wei Zhang, and Yanyan Liu. "A Wide Locking Range and Low Power Divide-by-2/3 LC Injection-Locked Frequency Divider." Journal of Circuits, Systems and Computers 25, no. 02 (2015): 1650013. http://dx.doi.org/10.1142/s0218126616500134.

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A direct divide-by-2/3 LC injection-locked frequency divider (ILFD) is presented in this paper. The proposed ILFD circuit is based on a CMOS LC tank oscillator coupled with an injection NMOS transistor in series with an inductor. Together with body-biased technique and current-reused topology, the locking range of the ILFD is improved and the power consumption is reduced. The circuit is implemented in a 0.18[Formula: see text][Formula: see text]m standard RF CMOS process. At the incident power of 0[Formula: see text]dBm, the measured locking range of the divide-by-2 and divide-by-3 modes are f

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29

Zaizen, Shohei, Kyohei Asami, Takashi Furukawa, et al. "The Development of a Compact Pulsed Power Supply with Semiconductor Series Connection." Electronics 12, no. 21 (2023): 4541. http://dx.doi.org/10.3390/electronics12214541.

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In this study, high-voltage switching was performed by connecting semiconductors in series. By employing Snubber circuits and voltage divider resistors for each semiconductor, the destruction of the semiconductors was prevented. Additionally, a pulse transformer was installed between the function generator and the photocoupler to isolate the gate circuit, preventing electrical discharges in the circuit and enabling operation at an output voltage of 10 kV and an operating frequency of 200 Hz. The temperature of the semiconductors increased with the increase in operating frequency, which was cou

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30

Duan, Honglian, Pengbo Yin, Hong Shen, Yifeng Ye, and Xin Tong. "Simulation of secondary overvoltage of voltage divider for wall bushing in flexible direct current transmission system." Journal of Physics: Conference Series 3011, no. 1 (2025): 012081. https://doi.org/10.1088/1742-6596/3011/1/012081.

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Abstract Wall bushings used in Flexible Direct Current Transmission Systems are key equipment for achieving electrical connections between equipment inside and outside the valve hall, and the ground voltage of the bushings can reflect their operating status. However, there have been cases of damage to the secondary side of the voltage divider in engineering applications using the voltage measurement method of dividing the voltage at the end screen of the wall bushing, which is currently used as a monitoring method. This article first analyzes the structure of the bridge arm capacitive wall bus

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31

Li, Wei, and Kwok-Keung M. Cheng. "A Novel, Low-Voltage, Current Reused, Quadrature VCO and Divide-by-4 Frequency Divider Circuit." IEEE Microwave and Wireless Components Letters 23, no. 2 (2013): 87–89. http://dx.doi.org/10.1109/lmwc.2012.2236886.

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32

Jang, Sheng-Lyang, та Tsung-Chao Fu. "Effects of Hot-Carrier Stress on the RF Performance of a 0.18-μm MOS Divide-by-4 LC Injection-Locked Frequency Divider". Fluctuation and Noise Letters 13, № 02 (2014): 1450009. http://dx.doi.org/10.1142/s0219477514500096.

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The effect of ac hot-carrier stress on the performance of a wide locking range divide-by-4 injection-locked frequency divider (ILFD) is investigated. The ILFD was implemented in the TSMC 0.18 μm 1P6M CMOS process. The ILFD uses direct injection MOSFETs for coupling external signal to the resonators. Radio frequency (RF) circuit parameters such as oscillation frequency, tuning range, phase noise, and locking range before and after RF stress at an elevated supply voltage for 5 h have been examined by experiment. The measured locking range, operation range and phase noise after RF stress shows si

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33

Lukić, Jelena, and Dragan Denić. "A Novel Design Of An NTC Thermistor Linearization Circuit." Metrology and Measurement Systems 22, no. 3 (2015): 351–62. http://dx.doi.org/10.1515/mms-2015-0035.

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Abstract A novel design of a circuit used for NTC thermistor linearization is proposed. The novelty of the proposed design consists in a specific combination of two linearization circuits, a serial-parallel resistive voltage divider and a two-stage piecewise linear analog-to-digital converter. At the output of the first linearization circuit the quasi-linear voltage is obtained. To remove the residual voltage nonlinearity, the second linearization circuit, i.e., a two-stage piecewise linear analog-to-digital converter is employed. This circuit is composed of two flash analog-to-digital convert

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34

S., Jaisudha, Sowmiya Srinivasan, and Kanimozhi Gunasekaran. "Bidirectional Resonant DC-DC converter for Microgrid Applications." International Journal of Power Electronics and Drive Systems (IJPEDS) 8, no. 4 (2017): 1548. http://dx.doi.org/10.11591/ijpeds.v8.i4.pp1548-1561.

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<p>This paper proposes a non-isolated soft-switching bidirectional dc/dc converter for interfacing energy storage in DC microgrid. The proposed converter employs a half-bridge boost converter at input port followed by a LCC resonant tank to assist in soft-switching of switches and diodes, and finally a voltage doubler circuit at the output port to enhance the voltage gain by two times. The LCC resonant circuit also adds a suitable voltage gain to the converter. Therefore, overall high voltage gain of the converter is obtained without a transformer or large number of multiplier circuit. F

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35

Peng, Jing, Shouhao Wang, Xiaoning Li, and Ke Wang. "A Novel 10-Watt-Level High-Power Microwave Rectifier with an Inverse Class-F Harmonic Network for Microwave Power Transmission." Electronics 13, no. 18 (2024): 3705. http://dx.doi.org/10.3390/electronics13183705.

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A novel 10-Watt-Level high-power microwave rectifier with an inverse Class-F harmonic network for microwave power transmission (MPT) is presented in this paper. The high-power microwave rectifier circuit comprises four sub-rectifier circuits, a 1 × 4 power divider, and a parallel-series dc synthesis network. The simple inverse Class-F harmonic control network serves dual roles: harmonic control and impedance matching. The 1 × 4 power divider increases the RF input power fourfold, reaching 40 dBm (10 W). The parallel-series dc synthesis network enhances the resistance to load variation. The hig

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Guo, Zhongjie, Ziyi Qiu, Yuan Yang, and Ningmei Yu. "Research on Fixed-Slope On-Chip Soft-Start Method Applied to Buck DC–DC Converter." Electronics 13, no. 12 (2024): 2292. http://dx.doi.org/10.3390/electronics13122292.

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A fixed-slope soft-start method applicable to Buck converters for on-chip integration is proposed to address the issue of varying power stresses (device voltage, current stress) during start-up with different output voltages. The main mechanism involves combining feedback coefficient sampling with a fixed-slope reference voltage to achieve a slow rise in the reference voltage by equating the soft-start charging current to a pulse current through the on-chip integration of a small capacitor. This allows for fixed-slope start-ups for different set output voltages. Spike elimination techniques ar

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YI, MAOBIN, WEI SUN, XIAOJIAN TIAN, GANG JIA, and SHIYONG LIU. "A PRACTICAL ELECTRO-OPTIC SAMPLER FOR CHARACTERIZATION INTERNAL TO GaAs ICs." International Journal of High Speed Electronics and Systems 07, no. 03 (1996): 463–69. http://dx.doi.org/10.1142/s0129156496000268.

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This paper describes a practical electro-optic sampler of the measuring-microscope mode for noninvasive measurements of voltage waveforms at points internal to a GaAs integrated circuit. A 360° linear sweep phase shifter is used to provide the scanning delay of the sampling point in time, and was typically demonstrated in measuring the dynamic frequency divider circuit. In addition to the characterization internal to GaAs ICs, the overlap of the electrical signal field in an integrated circuit and the interference effect on the signal voltage calibration are also investigated.

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CHANG, ROBERT C., LUNG-CHIH KUO, and HOU-MING CHEN. "A LOW-VOLTAGE LOW-POWER CMOS PHASE-LOCKED LOOP." Journal of Circuits, Systems and Computers 14, no. 05 (2005): 997–1006. http://dx.doi.org/10.1142/s0218126605002738.

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A low-voltage low-power CMOS phase-locked loop (PLL) is presented in this paper. It consists of a phase frequency detector, a charge pump, a loop filter, a voltage-control oscillator, and a frequency divider. A new phase frequency detector is proposed to reduce the dead zone and the mismatch effect of the charge pump circuit. A novel charge pump circuit with a small area and wide output range is described. The PLL circuit has been designed using the TSMC 0.35 μm 1P4M CMOS technology. The chip area is 1.08 mm × 1.01 mm. The post-layout simulation results show that the frequency of 900 MHz can b

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Arbet, Daniel, Viera Stopjaková, Martin Kovác, Lukás Nagy, and Gabriel Nagy. "Design of CMOS readout frontend circuit for MEMS capacitive microphones." Facta universitatis - series: Electronics and Energetics 28, no. 2 (2015): 263–74. http://dx.doi.org/10.2298/fuee1502263a.

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This paper deals with a frontend part of the readout circuit developed as an integrated circuit that after bonding together with a MEMS capacitive microphone (MCM) chip will be used in a noise dosimeter applicable in very noisy and harsh environment, e.g. mine. Therefore, the main attention has been paid to the high dynamic range, low offset and low noise of the developed readout interface as well as its low-power consumption feature. For conversion of the MCM?s capacitance variation into voltage, an approach based on the buffered input conversion stage biased by a voltage divider was used. Th

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Arbet, Daniel, Viera Stopjaková, Martin Kováč, Lukáš Nagy, and Gabriel Nagy. "Design of CMOS readout frontend circuit for MEMS capacitive microphones." Facta universitatis - series: Electronics and Energetics 28, no. 2 (2015): 263–74. https://doi.org/10.2298/FUEE1502263A.

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This paper deals with a frontend part of the readout circuit developed as an integrated circuit that after bonding together with a MEMS capacitive microphone (MCM) chip will be used in a noise dosimeter applicable in very noisy and harsh environment, e.g. mine. Therefore, the main attention has been paid to the high dynamic range, low offset and low noise of the developed readout interface as well as its low- power consumption feature. For conversion of the MCM’s capacitance variation into voltage, an approach based on the buffered input conversion stage biased by a voltage divider was u

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Wu, Jincheng, Jingrui Sun, and Mingcheng Liu. "Research and optimization design of voltage divider biasing circuit based on PSpice." Journal of Physics: Conference Series 1176 (March 2019): 062066. http://dx.doi.org/10.1088/1742-6596/1176/6/062066.

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Dadić, Martin, Petar Mostarac, Roman Malarić, and Jure Konjevod. "Digital Compensation of a Resistive Voltage Divider for Power Measurement." Electronics 10, no. 6 (2021): 696. http://dx.doi.org/10.3390/electronics10060696.

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The paper presents a method for digital compensation of the ratio and phase angle errors of a resistive voltage divider. The system consists of a separate electrical circuit of a resistive divider, and a digital compensation system based on National Instruments (NI) PCI eXtension for Instrumentation (PXI) PXI-5922 digital acquisition cards (DAQ). A novel approach to the real-time compensation is presented, using digital signal processing. The algorithm is based on Wiener filtering and finite-impulse-response (FIR) filters. The proposed digital compensation, using FIR digital filtration and NI

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Kulikov, V. A., and V. N. Syakterev. "Pulsed Signal Duration Shaper with Adaptive Response Thresholds." Intellekt. Sist. Proizv. 22, no. 3 (2024): 17–22. http://dx.doi.org/10.22213/2410-9304-2024-3-17-22.

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His paper represents a shaper designed to restore the width of rectangular pulses transmitted over an open-optic (wireless) communication channel and having shape distortions in the form of amplitude modulation, pedestal and tightening of the front and decay. The principle of pulse width recovery is based on the formation of voltage comparator thresholds adaptive to changes in high and low pulse signal levels. Due to the use of sample-and-hold circuit (UVH - S/H circuit) in the circuit, the values of the input signal levels are stored in the previous half-periods. The threshold voltage of the

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Wang, Shuxin, Jiabao Jiang, Zhehe Wang, Honghong Zhang, and Shan Ouyang. "Research of Tri-State Optical Signal Detectors for Ternary Optical Computers." Applied Sciences 13, no. 5 (2023): 2800. http://dx.doi.org/10.3390/app13052800.

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A tri-state optical signal detector (TOD) is designed in this article to improve the accuracy and stability of decoding results of the ternary optical computer (TOC). The TOD consists of three modules: a light-sensing module, a voltage divider module, and a data latching and conversion module. First, a voltage divider circuit with adjustable resistors is used to achieve parallel optical–electrical signal conversion for each LCD pixel on a photosensitive sensor plus a latch structure. Second, the problem of the parallel storage of data after photoelectric conversion is solved. Third, a transcod

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Motozawa, Atsushi, Yasuyuki Hiraku, Yoshitaka Hirai, Naoaki Hiyama, Yusuke Imanaka, and Fukashi Morishita. "Circuit Techniques for Immunity to Process, Voltage, and Temperature Variations in the Attachable Fractional Divider." Electronics 12, no. 23 (2023): 4885. http://dx.doi.org/10.3390/electronics12234885.

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In the automotive industry, system-on-chips are crucial for managing weak radio waves from space, known as satellite signals. Integer-N phase-locked loops have played a vital role in the operation of system-on-chips in recent history. Their clock frequencies are carefully designed to prevent electromagnetic interference. However, as global navigation satellite system becomes more prevalent, integer-N phase-locked loops face new challenges in generating clocks within the shrinking frequency bands due to large frequency steps determined using a reference clock. To address it, replacing integer-N

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Gu, Li, Xiang Li, Fangke Zong, Junlan Zhou, Qinlao Yang, and Baoping Guo. "Influence of voltage divider circuit on imaging stability of X-ray streak camera." Journal of Shenzhen University Science and Engineering 34, no. 5 (2017): 532. http://dx.doi.org/10.3724/sp.j.1249.2017.05532.

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Kamarudin, Mohd Khuzairi Bin Che. "CMOS Based SNR Measurement for Wireless Application." Journal of Applied Engineering & Technology (JAET) 2, no. 1 (2018): 9–13. http://dx.doi.org/10.55447/jaet.02.01.7.

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This paper presents the design of a CMOS based Signal to Noise Ratio (SNR) detection system. The design system is developed using divider, multiplier and an additional multiplier in a feedback loop. The divider in the designed system produce 1/V of the signal and multiplier produces the average squared SNR signal. The last stage in this design circuit is a low pass filter necessary to implement the desired “average” measure of the signal to noise ratio (SNR). From simulation, the output voltage of SNR is 9.167mVp-p and from practical, the output voltage is 13.2mVp-p.

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MIKHAL, Aleksander A., Dmitro V. MELESHCHUK, and Zygmunt Lech WARSZA. "APPLICATION OF THE HYBRID BALANCED RATIOMETRIC MEASUREMENT METHOD IN THE HIGH-PRECISION AC THERMOMETRY BRIDGES." Physics for Economy 3, no. 1 (2019): 29–40. http://dx.doi.org/10.7862/rf.2019.pfe.3.

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The paper article describes the circuit of an automatic AC bridge for high precision temperature measurements using a standard platinum SPRT sensor. An original method for measuring the impedance parameters of SPRT sensor which allows to carry out the measurement process without loss of accuracy, is described in detail. This measurement method is proposed to name as hybrid method. It is a combination of a balanced method for rough compensation of the circuit and a ratiometric method which accurately measures the ratio of two values of the imbalance signal, before and after its known change. Wi

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Yao, Xue Ling, Tian Yu Lin, and Jing Liang Chen. "Research for High-Voltage Nanosecond Rectangular Pulse Generator." Advanced Materials Research 718-720 (July 2013): 1691–95. http://dx.doi.org/10.4028/www.scientific.net/amr.718-720.1691.

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In order to calibrate the response characteristic of voltage dividers, the article presents a potable high-voltage nanosecond rectangular pulse generator based on the transmission-line theory. The generator consists of DC high-voltage source, pulse forming line (PFL), special high-voltage switch, pulse transmission line (PTL), resistive load and coaxial voltage divider. The compact charging and discharging circuit is developed coaxially and the interference proof performance is excellent. The voltage amplitude and the pulse width can vary from the output of the DC high-voltage source and the l

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Farshidi, Ebrahim. "An Analog Template-Based Classifier Using MOS Translinear Loops." Active and Passive Electronic Components 2011 (2011): 1–9. http://dx.doi.org/10.1155/2011/192818.

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An analog template matching pattern classifier circuit based on a new synthesis of Euclidean distance calculation is presented. It is composed of simple two-quadrant squarer/divider blocks. The circuit employs MOSFETs that operate in strong inverted saturation region performing electronically simulated translinear loop. The converter features very low supply voltage (0.9 V), immune from body effect, two-quadrant input current, large dynamic range, and low circuit complexity. The circuit was successfully applied to the recognition of some simple patterns. Simulation results by HSPICE show high

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