Dissertations / Theses on the topic 'Voltage follower'

The aim of this research programme was to design and develop novel voltagefollowerslbuffers, suitable for radio frequency (RF) applications. The emphases throughout has been on improving key characteristics, in particular distortion, operating bandwidth, input and output impedances, offset-voltage and power supply demands of the design. The majority of the results of this work have been reported by the author in the technical literature (I] to (6). Initially this research focuses on the investigation of the underlying operating principles of the voltage-follower to provide an in-depth understanding of its operation. This study concentrates on establishing reasons for the poor distortion, low input and high output impedances and increased offset-voltage and confirmed that these designs have inherently poor performance in these parameters. The analysis is carried out using both theoretical modelling and computer simulation, using the wellestablished software package ORCAD PSpice. Despite the availability of high performance computer simulation tools, it becomes apparent that 'hand' calculations in the design process, generally based on DC and small-signal transistor parameters, are essential. Therefore a detailed analysis of the transistor-models used throughout this research is carried out with PSpice data. Using the analytical results of the conventional voltage-follower as a benchmark, various novel circuit techniques investigated. Several new circuits are proposed with respect to improving the previously mentioned key characteristics. The first technique comprises local feedback and single-valued current biasing and 111 consists of emitter-followers exclusively throughout the signal path, keeping the distortion of the input signal to low levels [1 J, (2). The second technique is based on local feedback with double-valued current biasing, increasing somewhat the power dissipation but reducing, notably, the distortion of the configuration [3J, [4J, [5J, [6J. The final technique employs the emitter-followers throughout the signal path in combination with global feedback and double-valued current biasing, which presents significantly better results, on certain parameters, than conventional and existing configurations. It is anticipated that this work will be published in the near future.

This master’s thesis deals with the design of integrated voltage regulator. Topologies of linear voltage regulators and their stability are discussed. Part of the thesis deals with description and simulation of blocks of selected regulator topology. The thesis describes the difficulties of integrated circuit design in the automotive industry. The electrical scheme of the designed regulator is explained. The work also focuses on the stability of designed regulator. Then presents simulations. It discusses the layout of integrated circuits and the designed voltage regulator.

Dissertação para obtenção do Grau de Mestre em Engenharia Electrotécnica e de Computadores
Analog filters are extremely important blocks in several electronic systems such as RF transceivers or sigma delta modulators. They allow selecting between signals with different frequency and eliminating unwanted signals. In modern deep-submicron CMOS technologies the intrinsic gain of the transistors is low and has a large variability, making the design of moderate and high gain amplifiers extremely difficult. The objective of this thesis is to study switched-capacitor (SC) circuits based on the low-pass and band-pass Sallen-Key topologies, since they do not require high gain amplifiers. The strategy used to achieve this objective is to replace the operational amplifier (opamp) with a voltage buffer. Doing this simplifies the design of the amplifier although it also eliminates the virtual ground node from the circuit. Without this node parasitic insensitive SC networks cannot be used. Due to modern parasitic extraction software that can reliably predict the values of parasitic capacitances, the historical disadvantage of parasitic sensitive SC networks (parallel SC) is no longer critical, allowing its influence to be compensated during the design process. Different types of switches were simulated to determine the one with the least nonlinear effects. Two techniques (common mode voltage adjustment and source degeneration) were used to reduce the distortion introduced by the buffers. Low-pass (second and sixth order) and band-pass (second and fourth order) SC filters were simulated in differential configuration in standard 130 nm CMOS technology, having obtained for the low-pass filter a distortion of -62 dB for the biquad section and -54 dB for the sixth-order filter, for a cutoff frequency of 1MHz and when operating at 100 MHz of clock frequency. The total power consumption was 986 W and 5.838 mW, respectively.

This doctoral thesis deals with a voltage conveyor as a new active element for an analog signal processing. Various types of the voltage conveyors have been defined as a dual active elements to current conveyors based on a duality principle. Conception of a new active element that can supply all types of the voltage conveyors have been proposed. The active element has been named an universal voltage conveyor – UVC. A voltage follower is a basic building block of the UVC. The well-known circuit realization of the voltage follower comes from four transconductance amplifiers with key parameters (voltage transfer and output resistance) derived from relative accuracy of used transconductance amplifiers has been used by UVC fabrication. A new circuit realization of the voltage follower comes from three transconductance amplifiers with key parameters also derived from relative accuracy of used transconductance amplifiers has been designed. Further the doctoral thesis deals with a frequency filter with the voltage conveyors design using signal flow graphs. Various graphs of the voltage conveyors comes from the various circuit analysis methods with non-regular active elements have been created. A basic graph of the voltage conveyor has been designed with help of a known controlled sources graphs. This graph have been used to design of multifunctional frequency filters, filters with high input and low output impedance and controlled frequency filters. A design procedure have been created so that in specific step of the frequency filter design the basic graph of the voltage conveyor could be extended to graph of any type of the voltage conveyor. Thereby a practical usage of various types of the voltage conveyors has been finding out. Further a new method of frequency filter design based on expanding of the signal flow has beenproposed.

Master’s thesis in the theoretical part deals with literature review on the topic of measurement errors and measurement uncertainties. The practical part deals with the simulation of additional capacitive and resistive load on the amplitude and phase error during shunts based measurement. For this simulation is used mathematical apparatus of cascade matrix of two-ports and their connections. For the actual simulation is used script for MATLAB. Furthermore, the work deals with the design of voltage follower to eliminate simulated errors and its practical realization. The last part deals with the design of the coaxial multiplexer for switching current shunts developed in the Czech Metrological Institute in Brno.

This diploma thesis deals with design of reconection-less electronically reconfigurable filter structures which have single input and single output using unconventional active elements, which have ability to adjust one of their parameter e.g. gain or transconductance. The first part describes basic parameters of frequency filters, the division of filters by frequency transfer response and used circuit elements, their operational modes, the principle of reconnection-less electronically reconfiguration and the circuit design method MUNV. Second part describes all active elements used in the proposal of filters, their properties and the implementation using existing transistor-level models. The third part contains the design of three reconnection-less electronically reconfigurable filters and the simulations results obtained from simulation programs OrCAD Capture and PSpice. The obtained results were compared with theoretical behaviour. This part also contains results of these analyses: sensitivity, parasitic, Monte Carlo and temperature to determine the behaviour in varied cases.

Integrace a derivace jsou obvykle známy pro celočíselný řád (tj. první, druhý, atd.). Existuje ale zobecnění pro zlomkové (neceločíselné) řády, které lze implementovat pomocí elektronických obvodů zlomkového řádu (případně provést jejich aproximaci) a které poskytuje nový stupeň volnosti pro návrh elektronických obvodů. Obvody zlomkového řádu jsou obvykle aproximovány diskrétními součástkami pomocí RC struktur s velkými rozsahy odporů a kapacit, a tím se jeví nepraktické pro použití v integrovaných obvodech. Tato práce prezentuje implementaci obvodů zlomkového řádu v integerovaných obvodech a jejich praktické využití v této oblasti. Jsou použity prvky se soustředěnými parametry (např. RC žebřík) i prvky s rozprostřenými parametery (např. R-PMOScap, skládající se z nesalicidovaného proužku polykrystalického křemíku nad hradlovým oxidem); je použita pouze technologie typu analogvý CMOS bez dodatečných procesních kroků. Užití obvodů zlomkového řádu bylo demonstrováno realizací několika integrovaných napěťových regulátorů, v nichž obvody zlomkového řádu realizují řízení zlomkového řádu za účelem dosažení silné stejnosměrné regulace a dobré stability regulační smyčky - i bez použití kompenzační nuly nebo příliš vysoké externí kapacity (některé napěťové regulátory dovolují i zatěžovací kapacitou v rozsahu nula až nekonečno).

This document is focused on already existing single-ended frequency filters with modern active components working in current mode and their modification into fully-differential ended form. After the modification both versions were compared between each other. The first part informs about problems concerning analogue frequency filters. The second part deals with used active components - MO-CF (Multiple Output Current Follower), BOTA (Balanced transconductance amplifier), UCC (universal current conveyor), VDTA (Voltage differencing transconductance amplifier), CDTA (Current differencing transconductance amplifier) and VDCC (voltage differencing current conveyor). Four circuits have been chosen and transformed into their differential form. Two circuits have been chosen and realised into PCB and then practicaly measured in a laboratory. The last part is a summary of simulations and measured results and check of circuits behavior result.

This master’s thesis describes the design of the frequency filters by the help of the graph of the signal flows. There are defined by modern components like GVC (Generalized Voltage Conveyor), GCC (Generalized Current Conveyor), CF (Current Follower), DO-CF (Dual-Output Current Follower), OTA (Operational Transconductance Amplifier), BOTA (Ballanced Operational Transconductance Amplifier) and CFTA (Current Follower Transconductance Amplifier), the graphs of the signal flows, which describe their activity in the thesis. In the other part of the thesis is illustrated the procedure of the design of the frequency filters by the help of the graphs of the signal flows. For the concrete design was selected in the first case as the active component double output current follower and in the second case the CFTA. There are noted all designed circuits of the frequency filters also their characteristic equations in this thesis. The activity of the selected circuits was remitted to the analysis in the simulation program called PSpice. Because the active components, with which was engaged in the design of the filter which doesn’t exist in the real form, that is why the UCC, which is sufficing for attestation of the function of the circuit, was used for the simulation. The simulation was implemented in the frequency range 10 Hz to 10 MHz.

This master’s thesis goes into design of particular circuits for three phase inverter. Inverter’s control is ensured by digital signal controller MC56F8013 with his program. Principle of control is suggested for individual motors. Inverter design considerate universal use and capability for any three phase motor. Particular blocks are compatible each other.

The diplomma thesis is dealing with possibilities of Signal to noise ratio measurement by method, which is based on direct measurement. It is chosen the most suitable method – signal and noise separation to two different parallel signal branches, where is measured signal strength in one branch and root mean square value in the other. The thesis is consisted of a concept of detail block scheme of Signal to noise ratio meter, which was designed in terms of theoretical knowledge. Particular functional blocks were circuit-designed, the active and passive parts were chosen and their function were described. There were made simulation and displayed input and output time flows. There is designed the whole connection of engineered Signal to noise ratio meter in the last part of my thesis. The double-sided board of printed circuit is contained too. It was created simple programme for supervisor micro-processor. Thereby were constructed complete bases for realization.

The diploma thesis deals about design of the ARC multifunctional filters using modern functional blocks. These active blocks are for example voltage feedback operational amplifiers (OAs), operational transconductance amplifiers (OTAs), current conveyors (CCIIs) or current mode analog multipliers, current feedback amplifiers (CFAs), integrated circuits with switched capacitors building blocks (SCs) and digital potentiometers. The filters are studied with ideal circuit models and models of third level (3) based on voltage controlled voltage sources, voltage controlled current sources etc. (analog behavioral modelling). The professional macromodels are used for example LT 1364 (Linear Technology), EL 2045 (Intersil), LT 1228 (Linear Technology), LM 13700 (National Semiconductor), EL 2082 (Intersil), AD 844 (Analog Devices) and others. The circuits of the designed filters are simulated in PSpice (OrCAD), parasite effects and effects of the real parts are studied. Tuning and electronic adjusting parameters these filters are discussed and controlled by simulation in PSpice. Properties some simulated circuits are compare with experimental results. In conclusion individual filters are discussed and compared their properties. The constructional details of the some filters are presented at the end of this work.

碩士
國立交通大學
電信工程研究所
99
In recent years, the short channel effect has changed the way of designing analog circuits, which becomes a main issue as the technology marches to deep-submicron fields. The impact of the short channel effect on the design of the operational transconductance amplifier (OTA) becomes more serious and makes the circuit performance deviated from the ideal voltage-current equation, especially the performance of the linearity. This paper presents two fully balanced structures of CMOS Operational Transconductance Amplifier (OTA) with high linearity, and its applications to Gm-C filters. The transconductors are designed for highly linear applications using methods which reduce non-ideal small signal resistance. The proposed first circuit based on the source-degeneration structure and enhanced with modified Folded Flipped Voltage Follower and positive feedback for linearity improving was designed by the TSMC 0.18μm CMOS technology and dissipates 3.7mW power with 1.8V voltage supply. The result shows the HD3 of -70dB with 0.6Vpp 10MHz input signal. It occupies the area of 0.5mm * 0.395mm, including pads. The proposed second circuit based on the conventional pseudo-differential structure and enhanced with modified Folded Flipped Voltage Follower for linearity improving was designed by the TSMC 0.18μm CMOS technology and dissipates 0.7mW power with 1.8V voltage supply. The result shows the HD3 of -58dB with 0.6Vpp 10MHz input signal. The active area uses less than 0.01 mm2. Using this OTA as building blocks, a 5MHz Gm-C low-pass filter was designed with the HD3 of -48dB. It consumes 9.14mW and occupies the area of 0.502mm * 0.612mm, including pads.

碩士
國立臺灣科技大學
電機工程系
106
Abstract Many ac-powered systems above a certain power level require power factor correction (PFC) circuits, which is demanded by the utility or the government. An effective PFC can reduce the apparent power required as well as the total harmonic distortion of the input line current. On the other hand, digital control boasts advantages such as reduced sensitivity to noise and the capability to realize sophisticated control algorithms. With the rapid increase of the computational power and the reduction of cost, digital controllers gain its popularity in implementing power converters. In this thesis, the digital control for power factor correction circuit is studied. The power stage of the PFC is a boost converter. Using this prototyping circuit, a digital voltage follower PFC will be realized. The digital control algorithms is implemented using the Microchip dsPIC33F16GS502 digital signal controller (DSC). Finally, experimental results of this PFC circuits are provided to validate the correctness of the proposed digital control algorithm. Keywords: power factor corrector, voltage-follower control、Digital Fixed Frequency

碩士
中原大學
電機工程研究所
83
The current mode active device is playing an increasingly im- portant role in the development of many new high performance circuits. In this paper, We present universal biquadratic fi- lters using current conveyors and voltage followers or current feedback amplifiers which have a very wide bandwidth independent of closed loop gain. The proposed universal active filters by using the nullator- norator approach are: 1. A universal voltage-mode second-order filter with three in- puts and one output employing three current conveyors and one voltage follower, 2. A universal voltage-mode second-order filter with three in- puts and one output employing three current feedback amplifiers, 3. A universal voltage-mode second- order filter with three in- puts and one output employing one current conveyor and one volt- age follower, 4. A universal voltage-mode second-order filter with one input and three outputs employing three current conveyors and three voltage followers, and 5. A universal voltage-mode second-order filter with one input and three outputs employing four current feedback amplifiers. They offer the following advantageous features:1. realisation of lowpass, bandpass, highpass, notch and allpass signals from the same configurations, 2. low active and passive sensitivities , 3. cascadability（except the third circuit）. Some of the above circuits have the attractive advantages: no requirements for component matching conditions, and orthogonal control of w and Q. Finally, we use the AD844 to verify the theoretical predic- tions of the proposed circuits.

碩士
中原大學
電機工程研究所
86
It has been verified that the circuits constructed by active current-mode elements have the advantage of higher signal bandwidths, larger dynamic range, greater linearity, less power dissipation and simpler circuit structure. So, the circuits which are designed by employing the current conveyor and the current feedback amplifier have been received considerable attention recently. In addition, the differential voltage curre-nt conveyor was presented by H. O. Elwan and A. M. Soliman in 1997. This active element is a powerful building block, especially for applica-tion demanding differential or floating inputs like impedance converters and current-mode instrumentation amplifiers.We proposed two filters using the second-generation current conve-yor, which are one multifunction voltage-mode filter with one input and three outputs and one universal current-mode filter with three inputs and one output, respectively.Comparing with the published paper, the proposed circuits offer the following advantageous features: use fewer active and passive components, suit for integration and enjoy low active and passive sensitivities.Moreover, we design a serial voltage-mode or current-mode filters employing the differential voltage current conveyor. We also discuss their characteristics and feasibilities.The last, we proposed a current-mode filter with one input and three outputs using the voltage follower and current follower which are with low tracking errors.The results of experiments and simulations using the IC-AD844 or the Design Center 6.1 are obtained to confirm the theoretical predictions.

碩士
中原大學
電機工程研究所
91
Abstract Two new simpler versatile current/voltage-mode biquads are proposed in this thesis. First, a universal current-mode biquad with two inputs and three outputs or three inputs and one output using a single fully differential second-generation current conveyor (FDCCⅡ) and four grounded/virtually-grounded passive elements is proposed. Then, the other voltage-mode biquad with a single input and three outputs, and two differential-voltage outputs using one FDCCⅡ, one voltage-follower(VF), and four passive elements is proposed. Both proposed circuits have the following advantageous features: simultaneous realization of five generic filter signals from the same configuration without any component matching conditions, no requirements of any cancellation constraints, orthogonal adjustment of ωo/Q and ωo through two separate resistors, employment of two grounded capacitors ideal for integrated circuit implementation, very low active and passive sensitivities, cascadability and simpler circuit structures.

Τα τελευταία χρόνια η ανάγκη για αναλογικά ολοκληρωμένα κυκλώματα με χαμηλή τάση τροφοδοσίας και χαμηλή ισχύ γίνεται κάτι περισσότερο από επιτακτική. Ο βασικότερος λόγος για την ανάγκη αυτή είναι η ραγδαία ανάπτυξη από φορητές ηλεκτρονικές συσκευές για εφαρμογές πολυμέσων (laptops, netbooks, mobiles) έως ολοκληρωμένων συστημάτων βιοιατρικών εφαρμογών. Μάλιστα σε πολλές περιπτώσεις απαιτείται αυτές οι ηλεκτρονικές συσκευές να έχουν δυνατότητα διασύνδεσης σε ασύρματα δίκτυα (WLANs) και επομένως επιβάλλεται η ενσωμάτωση συστημάτων πομποδεκτών. Έτσι, οι απαιτήσεις για όσο το δυνατόν μικρότερη κατανάλωση και επομένως χαμηλότερη τροφοδοσία είναι επιβεβλημένες. Ένα από τα βασικότερα «δομικά» κυκλώματα σχεδίασης αναλογικών κυκλωμάτων είναι οι διαφορικοί ενισχυτές τάσης. Στην παρούσα διατριβή παρουσιάζονται πλήρεις λύσεις διαφορικών ενισχυτών χαμηλής τάσης τροφοδοσίας σε τυπική CMOS τεχνολογία των 0.35μm και 0.18μm. Οι προτεινόμενοι ενισχυτές σχεδιάστηκαν με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα (Bulk-driven technique). Αρχικά σχεδιάστηκαν διαφορικοί ενισχυτές τάσεις με τοπολογία αρνητικής αντίστασης στην βαθμίδα εισόδου. Με τον τρόπο αυτό έγινε αύξηση της μικρής διαγωγιμότητας εισόδου που παρουσιάζει η τεχνική οδήγησης τρανζίστορ από το υπόστρωμα. Έτσι, προέκυψαν πρωτότυπες δομές ενισχυτών με χαμηλή τροφοδοσία μέχρι και 0.8V. Οι επιδόσεις των ενισχυτών χαρακτηρίστηκαν από κατάλληλες προσομοιώσεις αλλά και από πειραματικές μετρήσεις καθώς κατασκευάστηκε ολοκληρωμένο κύκλωμα ενισχυτή. Η σύγκλιση των αποτελεσμάτων των προσομοιώσεων με των πειραματικών απέδειξε πως τόσο τα προτεινόμενα κυκλώματα όσο και η ίδια η τεχνική σχεδίασης αποτελούν σημαντική λύση όπου απαιτούνται διαφορικοί ενισχυτές τάσης χαμηλής τροφοδοσίας. Στη συνέχεια σχεδιάστηκε βαθμίδα διαφορικού ακόλουθου τάσης με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα και τροφοδοσία 1V. Η βαθμίδα αυτή χρησιμοποιήθηκε ως διαφορική βαθμίδα εισόδου διαφορικού ενισχυτή τάσης με τροφοδοσία 1V. Ο ενισχυτής αυτός λειτουργεί για μεταβολή του κοινού σήματος εισόδου μεταξύ των άκρων της τροφοδοσίας. Ο ακόλουθος τάσης τροποποιήθηκε κατάλληλα ώστε να λειτουργεί με τροφοδοσία 0.5V και χρησιμοποιήθηκε ως διαφορική βαθμίδα εισόδου σε διαφορικό ενισχυτή τάσης ίδιας τροφοδοσίας. Και οι δυο προτεινόμενες τοπολογίες ενισχυτών αποτελούν πλήρεις λύσεις για εφαρμογές ενισχυτών τάσης με χαμηλή και πολύ χαμηλή τροφοδοσία αντίστοιχα. Τέλος με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα σχεδιάστηκε ενισχυτής μεταβλητού κέρδους. Για το σκοπό αυτό αναπτύχθηκε τεχνική γραμμικής μεταβολής διαγωγιμότητας διαγωγών. Ο ενισχυτής μεταβλητού κέρδους που σχεδιάστηκε λειτουργεί με τροφοδοσία 0.8V ενώ το κέρδος έχει εύρος μεταβολής 17dB και μπορεί να ενσωματωθεί σε βρόχο αυτομάτου ελέγχου κέρδους χαμηλής τροφοδοσίας. Για το σκοπό αυτό σχεδιάστηκαν με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα και δυο κυκλώματα τετραγωνικής συνάρτησης με τροφοδοσία 0.8V και 0.5V αντίστοιχα.
In recent years the need for analog integrated circuits with low-voltage and low-power is more than urgent. The main reason for this need is the rapid growth of portable electronic devices for multimedia applications (laptops, netbooks, mobiles, etc.) and even more for biomedical devices applications. In many cases, these electronic devices provide connectivity to wireless networks (WLANs) and therefore they incorporate transceiver systems. Thus, requirements such as low-voltage and low-power are a necessity. One of the basic analog “building blocks” for circuit design is differential voltage amplifiers. This thesis presents complete solutions for low-voltage differential amplifiers in standard CMOS technology of 0.35μm and 0.18μm. The proposed amplifiers were designed with bulk-driven technique. In the first place are designed differential voltage amplifiers that include input stage with negative resistance circuitry. This way the proposed amplifiers improve the small input transconductance due to bulk-driven transistors. Thus, novel amplifier structures are obtained with a voltage supply equal even to 0.8V. The amplifiers performance is characterized both through simulation and experimental results. The convergence of simulation and experimental results demonstrate that the proposed amplifiers circuits designed with bulk-driven technique are significant solution in the design of low-voltage amplifiers. In the next step a differential bulk-driven voltage follower is designed with 1V voltage supply. The proposed follower is used as a differential input stage for a differential voltage amplifier with the same voltage supply. The proposed amplifier is capable to operate rail-to-rail for common mode input signals. Also, the proposed voltage follower is modified in order to operate in extreme voltage supply of 0.5V. The modified voltage follower is used, again, as a differential input stage for a differential voltage amplifier while the whole amplifier used a voltage supply equal to 0.5V. Both proposed amplifiers topologies that use bulk-driven differential voltage followers as input stages are complete solutions for low-voltage and ultra low-voltage amplifiers applications. Finally, a new technique for linear transconductance variation, applicable in any kind of transconductor, is introduced. The proposed technique is used to build a bulk-driven variable gain amplifier (VGA). The proposed VGA operate with 0.8V voltage supply while produce a gain range variation equal to 17dB. The amplifier could incorporate in an automatic gain control loop (AGC) for low-voltage applications. For this purpose, two bulk-driven voltage squarers circuits with voltage supply 0.8V and 0.5V was also proposed.