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Relevant bibliographies by topics / Voltage multiplier

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Academic literature on the topic 'Voltage multiplier'

Author: Grafiati

Published: 4 June 2021

Last updated: 1 February 2022

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Journal articles on the topic "Voltage multiplier"

1

de la Cruz-Alejo, Jesús, and L. Noe Oliva-Moreno. "Low Voltage FGMOS Four Quadrants Analog Multiplier." Advanced Materials Research 918 (April 2014): 313–18. http://dx.doi.org/10.4028/www.scientific.net/amr.918.313.

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In this paper a low voltage FGMOS analog multiplier is proposed that uses a follower voltage flipped (FVF), which dominates its operation. In order to reduce the power supply of the multiplier, floating gate CMOS transistors (FGMOS) are used. Theoretical steps of the FVF design are presented together with its simulation. The output of the FVF is insensitive to the device parameters and is loaded with a resistive load. The multiplier design consists of two FVF cells, two current sensors FVF and one Gilbert cell multiplier. The results show that the proposed multiplied in a 0.13μm CMOS process exhibits significant benefits in terms of linearity, insensibility to device parameters, bandwidth and output impedance. The power supply is 0.8V and a power consumption of 181μW.

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Suvarna, S., K. Rajesh, and T. Radhu. "A Modified Architecture for Radix-4 Booth Multiplier with Adaptive Hold Logic." International Journal of Students' Research in Technology & Management 4, no. 1 (March 10, 2016): 01–05. http://dx.doi.org/10.18510/ijsrtm.2016.411.

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High speed digital multipliers are most efficiently used in many applications such as Fourier transform, discrete cosine transforms, and digital filtering. The throughput of the multipliers is based on speed of the multiplier, and then the entire performance of the circuit depends on it. The pMOS transistor in negative bias cause negative bias temperature instability (NBTI), which increases the threshold voltage of the transistor and reduces the multiplier speed. Similarly, the nMOS transistor in positive bias cause positive bias temperature instability (PBTI).These effects reduce the transistor speed and the system may fail due to timing violations. So here a new multiplier was designed with novel adaptive hold logic (AHL) using Radix-4 Modified Booth Multiplier. By using Radix-4 Modified Booth Encoding (MBE), we can reduce the number of partial products by half. Modified booth multiplier helps to provide higher throughput with low power consumption. This can adjust the AHL circuit to reduce the performance degradation. The expected result will be reduce threshold voltage, increase throughput and speed and also reduce power. This modified multiplier design is coded by Verilog and simulated using Xilinx ISE 12.1 and implemented in Spartan 3E FPGA kit.

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Moghaddam, Majid, Mohammad Hossein Moaiyeri, Mohammad Eshghi, and Ali Jalali. "A Low-Power Multiplier Using an Efficient Single-Supply Voltage Level Converter." Journal of Circuits, Systems and Computers 24, no. 08 (August 12, 2015): 1550124. http://dx.doi.org/10.1142/s0218126615501248.

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This paper presents a new high-performance and low-power single-supply voltage level converter (SSLC) and a new carry save array multiplier based on clustered-voltage scaling (CVS) technique for ultra-low-power applications. The multiplier operates with low and high supply voltage (V DDL , V DDH ) and at its end stage, the proposed low-power SSLC is utilized to prevent static power dissipation at the next stage working with V DDH and to enhance the output driving capability. In the proposed SSLC, dynamically-controlled source-body voltage, reduced drain induced barrier lowering (DIBL) effect and diode-connected transistor with body-biasing have been utilized properly in order to reduce the power consumption significantly without considerable speed degradation. The results of the simulations conducted using Cadence with standard 90-nm CMOS technology demonstrate the superiority of the proposed multiplier utilizing the proposed LC in terms of static and total power consumptions as well as power-delay product (PDP) as compared to the multipliers utilizing the previous level converters (LCs) and the single supply multiplier. It is worth mentioning that the static power, total power and PDP of the proposed low-power multiplier are on average 75%, 73% and 16%, respectively lower than the single-supply multiplier.

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Soto, Leopoldo, and Luis Altamirano. "A pulse voltage multiplier." Review of Scientific Instruments 70, no. 3 (March 1999): 1891–92. http://dx.doi.org/10.1063/1.1149686.

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5

Arnold, B. "Current/voltage hybrid multiplier." Electronics Letters 24, no. 14 (1988): 860. http://dx.doi.org/10.1049/el:19880586.

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Gupta, S. S., D. R. Bhaskar, and R. Senani. "Synthesis of New Single CFOA-Based VCOs Incorporating the Voltage Summing Property of Analog Multipliers." ISRN Electronics 2012 (September 18, 2012): 1–8. http://dx.doi.org/10.5402/2012/463680.

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Recently, current feedback operational amplifier (CFOA) and analog multiplier-(AM-) based-voltage controlled oscillators (VCOs) have been published in the literature which require 2 CFOAs and 2 AMs for linear tuning law between control voltage and frequency of oscillation. In this paper, a family of eight new voltage-controlled oscillators (VCOs), with linear tuning laws, employing only a single CFOA in conjunction with two analog multipliers (AMs), has been derived through a systematic state-variable methodology. This has been made possible by exploiting the voltage summing property of the multiplier chosen which has never been done in the literature earlier. The workability of the presented VCOs has been verified by experimental results based on AD844 type CFOAs and AD534 type AMs, and the advantages of new circuits over the previously known CFOA-AM-based VCOs have been highlighted.

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Eguchi, Kei, Sawai Pongswatd, Shinya Terada, and Ichirou Oota. "Parallel-Connected High Voltage Multiplier with Symmetrical Structure." Applied Mechanics and Materials 619 (August 2014): 173–77. http://dx.doi.org/10.4028/www.scientific.net/amm.619.173.

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A high voltage multiplier is proposed for non-thermal food processing systems utilizing an underwater shockwave. Unlike conventional Cockcroft-Walton Voltage Multiplier (CWVM) providing a DC output from an AC input, the proposed multiplier consists of two switched-capacitor-based DC-DC converters with different polarities. Owing to the symmetrical bipolar structure without magnetic component, the proposed multiplier can achieve faster response speed and lower voltage drop than the conventional CWVM. The theoretical analysis and simulation program with integrated circuit emphasis (SPICE) simulations show the effectiveness of the proposed voltage multiplier.

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Iqbal, Shahid. "A Hybrid Symmetrical Voltage Multiplier." IEEE Transactions on Power Electronics 29, no. 1 (January 2014): 6–12. http://dx.doi.org/10.1109/tpel.2013.2251474.

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Luo, Ye-Sing, and Shen-Iuan Liu. "A Voltage Multiplier With Adaptive Threshold Voltage Compensation." IEEE Journal of Solid-State Circuits 52, no. 8 (August 2017): 2208–14. http://dx.doi.org/10.1109/jssc.2017.2693228.

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Amudhavalli, Dhanaraj, Nalin Kant Mohanty, and Ashwin Kumar Sahoo. "Interleaved quadratic boost converter integrated with Dickson voltage multiplier with energy storage for high power photo voltaic applications." International Journal of Power Electronics and Drive Systems (IJPEDS) 12, no. 2 (June 1, 2021): 957. http://dx.doi.org/10.11591/ijpeds.v12.i2.pp957-967.

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In this paper interleaved quadratic boost converter with Dickson voltage multiplier is proposed. Photovoltaic system is connected to high power load through the proposed converter. Structure of this high gain interleaved converter comprised of two stages: interleaved quadratic boost converter stage and Dickson voltage multiplier stage. Interleaved quadratic boost converter is a parallel combination of two quadratic boost converter. The interleaving increases frequency of converter that could be filtered using small capacitors, making input current smoother than the current of conventional quadratic boost converter. Thus, interleaved circuit minimizes current ripple present in input current, cascading of voltage multiplier cell increases the gain voltage ratio of converter making it suitable for high power, high voltage gain photo voltaic applications. Stress voltage of the switches and reverse recovery problems gets reduced, thereby reducing EMI problems. 300W prototype capable of increasing 24V input voltage to 400V output voltage is designed and results tested using MATLAB/Simulink software. Hardware prototype is also implemented to verify simulation results. Also, application of this converter in integrated energy storage is demonstrated.

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Dissertations / Theses on the topic "Voltage multiplier"

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Gasper, Michael Rober. "Nonlinear Microwave Interactions with Voltage-Gated Graphene Devices." University of Akron / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=akron1596648207273845.

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Chaour, Issam. "Efficiency Improvement of RF Energy Transfer by a Modified Voltage Multiplier RF DC Converter." Universitätsverlag Chemnitz, 2018. https://monarch.qucosa.de/id/qucosa%3A33143.

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Radio Frequency (RF) energy transfer is getting increasingly importance in new generations of wireless sensor networks and this trend is tremendously supported by the modern trends to Internet of things (IoT). This promising technology enables proactive energy replenishment for wireless devices. With RF energy, transmission long distances between the energy source and the receiver can be overbridged. The main challenge thereby is the power conversion efficiency from a low level RF input power to a Direct Current (DC) voltage which is able to supply the mobile system. For this purpose, a novel approach for RF DC conversion is proposed. It consists of a modified voltage multiplier RF DC converter circuit by incorporating an inductor at the input of the circuit, which generates an induced voltage able to boost the output circuit and improve the conversion efficiency. Analytical analysis of the novel approach has been carried out to determine the optimal value of the inductor to maximize the output power. The experimental investigations show that the proposed solution is able to improve significantly both the output voltage and the power conversion efficiency, compared to the state of the art, and this especially at low input power ranges, which are often the case. At -10 dBm input power, the modified voltage multiplier RF DC converter circuit can reach 1.71 V output voltage and 49.21 % power conversion efficiency for, respectively, 500 kΩ and 10 kΩ resistive loads. In order to validate the new proposal for the RF transfer system experimentally, microstrip meander line antennas and microstrip patch antenna arrays are designed for different ISM bands, where relevant requirements for RF energy transfer are respected. For each antenna a modified voltage multiplier RF DC converter circuit has been applied and the system is tuned to the corresponding resonant frequency to avoid mismatching. In this investigation several scenarios have been addressed, such as RF transmission energy, RF energy harvesting in Global System for Mobile (GSM) bands and Wireless Local Area Networks (WLAN) band are developed. Field test results show high performances of experimental results in comparison to the state of the art.:1 Introduction 2 Theoretical Background 3 State of the Art of RF Energy Transfer 4 Novel Approach for a RF DC Converter Circuit 5 Antennas Design 6 Experimental Verification at Specific Scenarios 7 Conclusion
Die RF-Energieübertragung (RF) gewinnt in neuen Generationen von drahtlosen Sensornetzen zunehmend an Bedeutung. Dieser Trend wird durch das Internet der Dinge (IoT) weiter unterstützt. Diese vielversprechende Technologie ermöglicht eine proaktive Energieversorgung für drahtlose Geräte. Mit RF-Energie können große Entfernungen zwischen der Energiequelle und dem Empfänger überbrückt werden. Die größte Herausforderung dabei ist der Wirkungsgrad, mit dem von einer niedrigen HF-Eingangsleistung in eine Gleichspannung (DC), mit welcher das mobile System versorgt wird, gewandelt wird. Zu diesem Zweck wird ein neuer Ansatz für einen RF-DC-Wandler vorgeschlagen. Er besteht aus einer modifizierten Spannungsvervielfacher-RF-DC-Wandlerschaltung, die eine Spule am Eingang der Schaltung integriert. Diese erzeugt eine induzierte Spannung, die in der Lage ist die Ausgangsschaltung zu verstärken und den Umwandlungswirkungsgrad zu verbessern. Analytische Untersuchungen zu diesem neuartigen Ansatz wurden durchgeführt, um den optimalen Wert der Spule zu bestimmen und die Ausgangsleistung zu maximieren. Die experimentellen Untersuchungen zeigen, dass die vorgeschlagene Lösung in der Lage ist, sowohl die Ausgangsspannung als auch den Wirkungsgrad der Leistungsumwandlung im Vergleich zum Stand der Technik deutlich zu verbessern. Dies gilt besonders für niedrige Eingangsleistungsbereiche, welche häufig vorkommen. Bei -10 dBm Eingangsleistung kann die modifizierte Spannungsvervielfacher-RF-DC-Wandlerschaltung 1.71 V Ausgangsspannung und 49.21 % Leistungswandlungswirkungsgrad für jeweils 500 kΩ und 10 kΩ ohmsche Last erreichen. Um das neue RF-Übertragungssystem experimentell zu validieren, werden Mikrostreifenmäanderlinienantennen und Mikrostreifen-Patch-Antennenarrays für verschiedene ISM-Bänder ausgelegt, wobei die relevanten Anforderungen an die RF-Energieübertragung eingehalten werden. Für jede Antenne wurde eine modifizierte Spannungsvervielfacher-HF-DC-Wandlerschaltung verwendet und das System auf die entsprechende Resonanzfrequenz abgestimmt, um Fehlanpassungen zu vermeiden. Dabei wurden mehrere Szenarien untersucht, wie z.B. RF-Energieübertragung, RF-Energiegewinnung aus GSM-Bändern und WLAN-Netzwerken. Die Feldtests zeigen eine hohe Leistungsfähigkeit der experimentellen Ergebnisse im Vergleich zum Stand der Technik.:1 Introduction 2 Theoretical Background 3 State of the Art of RF Energy Transfer 4 Novel Approach for a RF DC Converter Circuit 5 Antennas Design 6 Experimental Verification at Specific Scenarios 7 Conclusion

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3

Kopeček, Pavel. "Analýza, vlastnosti a aplikace komerčně dostupných napěťových násobiček." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2011. http://www.nusl.cz/ntk/nusl-219161.

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This work deals with the analog multipliers, mainly of the voltage multipliers. Also the modifications of current output will appear here. The first part is devoted to a choice several multipliers and a description of their functions, the possible involvement and introduction of the most important catalog values. The next section deals with the simple application that contains at least one of the multipliers. Next was the implementation of selected applications and measure their actual performance parameters. Results are then compared with computer simulations. As final step is done of tolerance and sensitivity analysis of simulated configurations of circuits.

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4

Chaour, Issam [Verfasser], Olfa [Akademischer Betreuer] Kanoun, Olfa [Gutachter] Kanoun, Madhukar [Gutachter] Chandra, and Ahmed [Gutachter] Fakhfakh. "Efficiency Improvement of RF Energy Transfer by a Modified Voltage Multiplier RF DC Converter / Issam Chaour ; Gutachter: Olfa Kanoun, Madhukar Chandra, Ahmed Fakhfakh ; Betreuer: Olfa Kanoun." Chemnitz : Universitätsverlag Chemnitz, 2021. http://d-nb.info/1230059156/34.

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5

Ozalevli, Erhan. "Exploiting Floating-Gate Transistor Properties in Analog and Mixed-Signal Circuit Design." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/14048.

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With the downscaling trend in CMOS technology, it has been possible to utilize the advantages of high element densities in VLSI circuits and systems. This trend has readily allowed digital circuits to predominate VLSI implementations due to their ease of scaling. However, high element density in integrated circuit technology has also entailed a decrease in the power consumption per functional circuit cell for the use of low-power and reconfigurable systems in portable equipment. Analog circuits have the advantage over digital circuits in designing low-power and compact VLSI circuits for signal processing systems. Also, analog circuits have been employed to utilize the wide dynamic range of the analog domain to meet the stringent signal-to-noise-and-distortion requirements of some signal processing applications. However, the imperfections and mismatches of CMOS devices can easily deteriorate the performance of analog circuits when they are used to realize precision and highly linear elements in the analog domain. This is mainly due to the lack of tunability of the analog circuits that necessitates the use of special trimming or layout techniques. These problems can be alleviated by making use of the analog storage and capacitive coupling capabilities of floating-gate transistors. In this research, tunable resistive elements and analog storages are built using floating-gate transistors to be incorporated into signal processing applications. Tunable linearized resistors are designed and implemented in CMOS technology, and are employed in building a highly linear amplifier, a transconductance multiplier, and a binary-weighted resistor digital-to-analog converter. Moreover, a tunable voltage reference is designed by utilizing the analog storage feature of the floating-gate transistor. This voltage reference is used to build low-power, compact, and tunable/reconfigurable voltage-output digital-to-analog converter and distributed arithmetic architecture.

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6

Baev, Dmitriy. "Diagnostika vysokonapěťových kondenzátorů pro kaskádní napěťový násobič." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2017. http://www.nusl.cz/ntk/nusl-318998.

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The main subject of the final thesis is to find a suitable method for measuring the partial discharge (PD) in the dielectric of high-voltage capacitor. In the theoretical part of my thesis contains from the mechanisms of origin and the harmful effects of partial discharge at high voltage insulation of capacitor. It describes the global galvanic method of partial discharge measurement, the principle of cascade voltage multiplier, its main components are high-voltage capacitor and diode, facilities quality measurement of capacitors for voltage multipliers, advantages and disadvantages and principles of HIPOTRONICS DDX-8003 with the pulse discrimination system. In the experimental part of the diploma thesis is familiar with the diagnostics of high – voltage capacitors by means of laboratory measurements on the electronic bridge and with the help of partial discharge measurement system. Design of suitable electrode arrangement is described which eliminates the influence of corona which makes it impossible to measure partial discharges and the dissipation factor (tg ). Analysis data from measurement and determination of quality level, eventual degradation of measured capacitors. The result of this project should be designed the methodology for finding of poor – quality capacitors in order to increase the reliability of the voltage multiplier.

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Alcazar, Yblin Janeth Acosta. "Estudo do Conversor Bosst CC-CC de Alto Ganho de TensÃo Baseado na CÃlula de ComutaÃÃo de TrÃs Estados e nas CÃlulas Multiplicadoras de TensÃo (mc)." Universidade Federal do CearÃ, 2010. http://www.teses.ufc.br/tde_busca/arquivo.php?codArquivo=10585.

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nÃo hÃ
O presente trabalho propÃe o estudo do conversor boost CC-CC de alto ganho de tensÃo baseado na cÃlula de comutaÃÃo de trÃs estados e nas cÃlulas multiplicadoras de tensÃo (mc). Este trabalho investiga um modelo matemÃtico para o citado conversor. A anÃlise proposta Ã baseada na ferramenta âmodelagem do interruptor PWM para conversores CC-CCâ. O modelo deve ser encontrado por uma simples inspeÃÃo do circuito do conversor. Deve ser possÃvel aplicÃ-lo para realizar diversas anÃlises, como em regime permanente, regime transitÃria e anÃlise de pequenos sinais por meio de um uma abordagem unificada. Considerando um dado nÃmero de cÃlulas multiplicadoras de tensÃo, duas situaÃÃes sÃo analisadas com esta ferramenta: operaÃÃo com uma Ãnica cÃlula multiplicadora de tensÃo (mc=1) e vÃrias cÃlulas multiplicadoras de tensÃo (mc> 1). O mÃtodo proposto Ã validado por simulaÃÃes e Ã verificada sua efetividade. AlÃm disso, Ã analisado neste trabalho o controle modo corrente mÃdia convencional, o qual Ã aplicado em uma das configuraÃÃes em estudo. O rendimento do conversor e a efetividade do controlador proposto sÃo demonstrados por resultados experimentais para um protÃtipo do laboratÃrio de 1 kW.
The present work proposes the study of the boost converter based on three-state switching cell and voltage multipliers cells (mc). A mathematical model of the aforementioned converter is investigated here. The proposed analysis is based on the tool named âPWM-Switch Modeling of DC-DC Convertersâ. The model must be found by a simple inspection of the converterâs circuit. It is possible to apply such model in order to realize various analyses such as steady-state, transient, and small-signal analysis in a single and same model. Considering the number of voltage multipliers cells (mc), two situations are analyzed: operation with a single multiplier cell (mc=1) and operation with multiple voltage multiplier cells (mc>1).The proposed method was validated through simulations and its effectiveness was verified. In addition to this, conventional average current mode control is also applied to one of the studied configurations. The performance of the converter and the effectiveness of the proposed controller are demonstrated by experimental results obtained from a 1-kW laboratory prototype.

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Chvátlina, Pavel. "Laboratorní přípravek pro testování tranzistorů IGBT." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-217920.

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This master’s thesis describes the function and realization of the laboratory test equipment designed for measuring and analysing of collector current iC and voltage uCE courses during the opening and closing process of a power IGBT transistor. The opening and closing times toff and ton of the new power transistor IGBT are changing in the range from tenths to the ones s, so the reading of current iC and voltage uCE proceeds in a very short time. The measuring circuit of this test equipment is based on a short-time discharging of a condenser battery to the inductive load over the measured transistor. Consequently it is possible to replace the power supply whose maximum output power would otherwise have to be in the range of ones MW. In the final part of this thesis there are described properties and design of a high-frequency sensor with the Rogowski coil, which can be used for reading collector current course during opening and closing time of the measured transistor IGBT. Collector current iC and voltage uCE courses can be analysed with a storage oscilloscope.

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SINGH, VINIT. "HIGH TEMPERATURE CAPACITORS FOR VOLTAGE MULTIPLIERS." University of Cincinnati / OhioLINK, 2004. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1085685724.

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Najafi, Syed Ahmed Ali. "Energy Harvesting From Overhead Transmission Line Magnetic Fields." University of Akron / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=akron1548448189459464.

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Books on the topic "Voltage multiplier"

1

Kursun, Volkan. Multiple-voltage CMOS circuit design. Chichester, UK: John Wiley, 2006.

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Somkuwar, S. P. Digital high voltage controller for photomultiplier tubes. Mumbai: Bhabha Atomic Research Centre, 2004.

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Kursun, Volkan. Multiple supply and threshold voltage CMOS circuits. Chichester, England: John Wiley, 2006.

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1945-, Brodersen Robert W., ed. Low-power CMOS wireless communications: A wideband CDMA system design. Boston: Kluwer Academic Publishers, 1998.

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Wright, A. G. Voltage dividers. Oxford University Press, 2017. http://dx.doi.org/10.1093/oso/9780199565092.003.0013.

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Voltage dividers provide accelerating voltages to generate multiplier gain. Dynode voltages must remain constant and independent of the light input to maintain stable gain. The standard resistive divider never quite satisfies this requirement, although acceptable performance can be achieved by careful design. The inclusion of zener diodes improves performance but field-effect transistor (FET) circuits can provide gain stability at high mean anode currents, regardless of whether the application is pulsed or analogue. Design procedures for active and semi-active voltage dividers are presented. Dividers based on the Cockcroft–Walton (CW) principle are particularly suited to portable instrumentation because of their low standing current. Consideration is given to pulsed operation, decoupling, switch-on transients, ripple, dynode signals, single cable dividers, and equivalent circuits at high frequencies. Gating is used to protect a photomultiplier, in the presence of high light levels, by reducing the gain electronically. Various methods for gating a voltage divider are presented.

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Wright, A. G. The Photomultiplier Handbook. Oxford University Press, 2017. http://dx.doi.org/10.1093/oso/9780199565092.001.0001.

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This handbook is aimed at helping users of PMTs who are faced with the challenge of designing sensitive light detectors for scientific and industrial purposes. The raison d’être for photomultipliers (PMTs) stems from four intrinsic attributes: large detection area, high, and noiseless gain, and wide bandwidth. Detection involves a conversion process from photons to photoelectrons at the photocathode. Photoelectrons are subsequently collected and increased in number by the action of an incorporated electron multiplier. Photon detection, charge multiplication, and many PMT applications are statistical in nature. For this reason appropriate statistical treatments are provided and derived from first principles. PMTs are characterized by a range of photocathodes offering detection over UV to infra-red wavelengths, the sensitivities of which can be calibrated by National Laboratories. The optical interface between light sources and PMTs, particularly for diffuse or uncollimated light, is sparsely covered in the scientific literature. The theory of light guides, Winston cones, and other light concentrators points to means for optimizing light collection subject to the constraints of Liouville’s theorem (étandue). Certain PMTs can detect single photons but are restricted by the limitations of unwanted background ranging in magnitude from a fraction of a photoelectron equivalent to hundreds of photoelectrons. These sources, together with their correlated nature, are examined in detail. Photomultiplier biasing requires a voltage divider comprising a series of resistors or active components, such as FETs. Correct biasing provides the key to linear operation and so considerable attention is given to the treatment of this topic. Electronic circuits and modules that perform the functions of charge to voltage conversion, pulse shaping, and impedance matching are analysed in detail.

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Slimp, Jefferson C. Neurophysiology of Multiple Sclerosis. Oxford University Press, 2016. http://dx.doi.org/10.1093/med/9780199341016.003.0003.

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Any discussion of the pathomechanisms and treatments of MS benefits from an understanding of the physiology of the neuronal membrane and the action potential. Neurons and glia, are important for signal propagation, synaptic function, and neural development. The neuronal cell membrane, maintains different ionic environments inside and outside the cell, separating charge across the membrane and facilitating electrical excitability. Ion channels allow flow of sodium, potassium, and calcium ions across the membrane at selected times. At rest, potassium ion efflux across the membrane establishes the nerve membrane resting potential. When activated by a voltage change to threshold, sodium influx generates an action potential, or a sudden alteration in membrane potentials, that can be conducted along an axon. The myelin sheaths around an axon, increase the speed of conduction and conserve energy. The pathology of MS disrupts the myelin structures, disturbs conduction, and leads to neurodegeneration. Ion channels have been the target of investigation for both restoration of conduction and neuroprotection.

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Akashe, Shyam, and Khusbou Mishra. Low Power High Speed CMOS Multiplexer Design. Nova Science Publishers, Incorporated, 2015.

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Mason, Peggy. The Neuron at Rest. Oxford University Press, 2017. http://dx.doi.org/10.1093/med/9780190237493.003.0009.

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Neuronal membrane potential depends on the distribution of ions across the plasma membrane and the permeability of the membrane to those ions afforded by transmembrane proteins. Ions cannot pass through a lipid bilayer but enter or exit neurons through ion channels. When activated by voltage or a ligand, ion channels open to form a pore through which selective ions can pass. The ion channels that support a resting membrane potential are critical to setting a cell’s excitability. From the distribution of an ionic species, the Nernst potential can be used to predict the steady-state potential for that one ion. Neurons are permeable to potassium, sodium, and chloride ions at rest. The Goldman-Hodgkin-Katz equation takes into consideration the influence of multiple ionic species and can be used to predict neuronal membrane potential. Finally, how synaptic inputs affect neurons through synaptic currents and changes in membrane resistance is described.

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Arnold, Monica M., Lauren M. Burgeno, and Paul E. M. Phillips. Fast-Scan Cyclic Voltammetry in Behaving Animals. Oxford University Press, 2015. http://dx.doi.org/10.1093/med/9780199939800.003.0005.

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Gaining insight into the mechanisms by which neural transmission governs behavior remains a central goal of behavioral neuroscience. Multiple applications exist for monitoring neurotransmission during behavior, including fast-scan cyclic voltammetry (FSCV). This technique is an electrochemical detection method that can be used to monitor subsecond changes in concentrations of electroactive molecules such as neurotransmitters. In this technique, a triangular waveform voltage is applied to a carbon fiber electrode implanted into a selected brain region. During each waveform application, specific molecules in the vicinity of the electrode will undergo electrolysis and produce a current, which can be detected by the electrode. In order to monitor subsecond changes in neurotransmitter release, waveform application is repeated every 100 ms, yielding a 10 Hz sampling rate. This chapter describes the fundamental principles behind FSCV and the basic instrumentation required, using as an example system the detection of in vivo phasic dopamine changes in freely-moving animals over the course of long-term experiments. We explain step-by-step, how to construct and surgically implant a carbon fiber electrode that can readily detect phasic neurotransmitter fluctuations and that remains sensitive over multiple recordings across months. Also included are the basic steps for recording FSCV during behavioral experiments and how to process voltammetric data in which signaling is time-locked to behavioral events of interest. Together, information in this chapter provides a foundation of FSCV theory and practice that can be applied to the assembly of an FSCV system and execution of in vivo experiments.

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Book chapters on the topic "Voltage multiplier"

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Popa, Cosmin Radu. "Voltage and Current Multiplier Circuits." In Synthesis of Computational Structures for Analog Signal Processing, 89–184. New York, NY: Springer New York, 2011. http://dx.doi.org/10.1007/978-1-4614-0403-3_2.

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Rajawat, Asmita, and P. K. Singhal. "Design of Energy Efficient Voltage Multiplier Circuit for RF Energy Harvesting." In Lecture Notes in Electrical Engineering, 583–92. Singapore: Springer Singapore, 2017. http://dx.doi.org/10.1007/978-981-10-4286-7_58.

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Tijare, Ankita, and Pravin Dakhole. "VLSI Design of Four Quadrant Analog Voltage-Mode Multiplier and Its Application." In Information and Communication Technologies, 50–54. Berlin, Heidelberg: Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-15766-0_8.

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Ansari, Asim Rahman, Mohd Khursheed, Ahmed Riyaz, and Mintu Kumar. "Generation of HVDC from Voltage Multiplier Using Opto-Isolator and Marx Generator." In Lecture Notes in Electrical Engineering, 501–7. Singapore: Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-33-4080-0_48.

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Do, Hyun-Lark. "Non-isolated High Step-Up ZVS DC-DC Converter with Voltage Multiplier Cells." In Lecture Notes in Electrical Engineering, 551–54. Berlin, Heidelberg: Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-27287-5_88.

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Rajawat, Asmita, Karush Suri, and Mohit Mohta. "Design of an Efficient Rectifier Circuit Based on Karthaus-Fischer Voltage Multiplier for Energy Harvesting." In Advances in Intelligent Systems and Computing, 913–22. Singapore: Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-5903-2_96.

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Chang, Jui-Ming, and Massoud Pedram. "Multiple Supply Voltage Scheduling." In Power Optimization and Synthesis at Behavioral and System Levels Using Formal Methods, 79–118. Boston, MA: Springer US, 1999. http://dx.doi.org/10.1007/978-1-4615-5199-7_4.

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Pangrle, Barry, and Srikanth Jadcherla. "Verification For Multiple Supply Voltage Designs." In Closing the Power Gap Between ASIC & Custom, 281–98. Boston, MA: Springer US, 2007. http://dx.doi.org/10.1007/978-0-387-68953-1_11.

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Anuraj, S., M. R. Rashmi, and A. Suresh. "A Control Strategy for Harmonic Reduction in a Single Phase High Step up AC–DC Converter Based on Matrix Converter and Cockcroft-Walton Voltage Multiplier with PFC for Low Power Applications." In Lecture Notes in Electrical Engineering, 1525–35. New Delhi: Springer India, 2014. http://dx.doi.org/10.1007/978-81-322-2119-7_149.

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Pfotenhauer, J. M., and J. Yuan. "Multiple Cold Finger Cryocooler with Voltage Isolation." In A Cryogenic Engineering Conference Publication, 1443–47. Boston, MA: Springer US, 1996. http://dx.doi.org/10.1007/978-1-4613-0373-2_181.

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Conference papers on the topic "Voltage multiplier"

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Zhu, Binxin, Yao Chen, Han Wang, and Mahinda Vilathgamuwa. "Multiple Input-Terminal Voltage Multiplier Circuit." In 2019 4th International Conference on Intelligent Green Building and Smart Grid (IGBSG). IEEE, 2019. http://dx.doi.org/10.1109/igbsg.2019.8886172.

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Singh, Saurabh, and K. Radhakrishna Rao. "Low Voltage Analogue Multiplier." In APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems. IEEE, 2006. http://dx.doi.org/10.1109/apccas.2006.342161.

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Katzir, Liran, and Doron Shmilovitz. "A high voltage split source voltage multiplier with increased output voltage." In 2015 IEEE Applied Power Electronics Conference and Exposition (APEC). IEEE, 2015. http://dx.doi.org/10.1109/apec.2015.7104821.

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Bonteanu, Gabriel, Arcadie Cracan, and Liviu Goras. "Gm Based Voltage Mode Capacitance Multiplier." In 2019 International Semiconductor Conference (CAS). IEEE, 2019. http://dx.doi.org/10.1109/smicnd.2019.8923788.

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Jia, Jingbin, Marco Ho, and Ka Nang Leung. "A reconfigurable UHF CMOS voltage multiplier." In 2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC). IEEE, 2016. http://dx.doi.org/10.1109/edssc.2016.7785228.

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Ju-Won Baek, Myung-Hyo Ryoo, Tae-Jin Kim, Dong-Wook Yoo, and Jong-Soo Kim. "High boost converter using voltage multiplier." In 31st Annual Conference of IEEE Industrial Electronics Society, 2005. IECON 2005. IEEE, 2005. http://dx.doi.org/10.1109/iecon.2005.1568967.

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Mayo-Maldonado, Jonathan C., Jesus E. Valdez-Resendiz, Julio C. Rosas-Caro, and Antonio Valderrabano-Gonzalez. "Interleaved resonant switched capacitor voltage multiplier." In 2018 International Conference on Electronics, Communications and Computers (CONIELECOMP). IEEE, 2018. http://dx.doi.org/10.1109/conielecomp.2018.8327196.

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Rezanejad, Mohammad, Jafar Adabi, A. Sheikholeslami, and Alireza Nami. "High-voltage pulse generators based on capacitor-diode voltage multiplier." In 2012 EPE-ECCE Europe Congress. IEEE, 2012. http://dx.doi.org/10.1109/epepemc.2012.6397436.

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Raizada, Shirish, and Vishal Verma. "Coupled Inductor based Isolated Voltage Multiplier Converter." In 2018 IEEE 4th Southern Power Electronics Conference (SPEC). IEEE, 2018. http://dx.doi.org/10.1109/spec.2018.8635881.

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Vlassis, Spyridon, George Souliotis, and Fotis Plessas. "Ultra Low-Voltage Current Squaring and Multiplier." In 2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST). IEEE, 2019. http://dx.doi.org/10.1109/mocast.2019.8741800.

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Reports on the topic "Voltage multiplier"

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Hughes, Thomas. Transient voltage-reversal in transformers with multiple secondary coils. Office of Scientific and Technical Information (OSTI), August 2020. http://dx.doi.org/10.2172/1647905.

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Ayantunde, A. A., M. Karambiri, V. Yameogo, and O. O. Cofie. Multiple uses of small reservoirs in crop-livestock agro-ecosystems of the Volta River Basin with an emphasis on livestock management. International Water Management Institute (IWMI), 2016. http://dx.doi.org/10.5337/2016.215.

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