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Journal articles on the topic 'Voltage multiplier'

Author: Grafiati

Published: 4 June 2021

Last updated: 26 July 2025

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1

Udechukwu, Felix Chimezie, Mamilus Ahaneku, Vincent Chukwudi Chijindu, Dumtoochukwu Oyeka, Douglas Amobi Amoke, and Chiagozie Mbah. "Comparative Analysis of an 8 – Stage Cockcroft Walton Voltage Multiplier and A Dickson Voltage Multiplier in The Context of Radio Frequency Energy Harvesting." Revista de Gestão Social e Ambiental 18, no. 10 (2024): e08786. http://dx.doi.org/10.24857/rgsa.v18n10-241.

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Purpose: This study seeks to enhance voltage multipliers for Radio Frequency (RF) energy harvesting, with an emphasis on increasing the efficiency of harvested energy. This improvement is vital for sustainable energy applications and reducing environmental pollution caused by fossil fuels. Theoretical reference: RF energy harvesting technology is gaining recognition as a viable sustainable method for capturing ambient energy, with earlier research primarily focused on antenna and circuit design. Nonetheless, the effectiveness of energy harvesting is still constrained by inadequate power output

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2

Udechukwu, Felix Chimezie, Mamilus Ahaneku, Vincent Chukwudi Chijindu, Dumtoochukwu Oyeka, Chineke-Ogbuka Ifeanyi Maryrose, and Douglas Amobi Amoke. "Hybridization of Cockcroft-Walton and Dickson Voltage Multipliers for Maximum Output Through Effective Frequency Dedication in Harvesting Radio Frequency Energy." Revista de Gestão Social e Ambiental 18, no. 11 (2024): e09750. http://dx.doi.org/10.24857/rgsa.v18n11-102.

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Objective: This study investigates solutions to the challenges of limited RF energy harvesting by designing a hybridized voltage multiplier system aimed at optimizing output across a wide frequency range. Theoretical Framework: The research centers on the principles and comparative efficiencies of the Cockcroft-Walton and Dickson voltage multipliers, known for their applications in RF energy harvesting. These multipliers’ performance was analyzed theoretically to guide a hybrid design that could adaptively respond to input frequency variations. Method: Voltage multipliers were designed and sim

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3

SARI, Filiz, and Yunus UZUN. "A COMPARATIVE STUDY: VOLTAGE MULTIPLIERS FOR RF ENERGY HARVESTING SYSTEM." Communications Faculty of Sciences University of Ankara Series A2-A3 Physical Sciences and Engineering 61, no. 1 (2019): 12–23. http://dx.doi.org/10.33769/aupse.469183.

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Voltage multipliers are widely used for energy harvesting processes to convert the received AC signal to DC signal, also enhanced the low level received signal. In this study, Villard, Dickson and Greinacher type voltage multipliers are analyzed without impedance matching and substrate materials to decide the effective voltage multiplier type depend on the inputs of the harvester. So, load resistance, input power and input frequencies’ effects are analyzed and compared with each other. Agilent Advanced Design System (ADS) is used for simulations. HSMS 2852 Schottky diode and capacitors are use

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Sravanthi, B., B. Nagi Reddy, B. Renuka, G. Vamshi Krishna, H. Pal Thethi, and Muthuswamy Jayanthi. "A Comprehensive Review on Voltage Multiplier Cells for DC-DC Converters." E3S Web of Conferences 619 (2025): 02010. https://doi.org/10.1051/e3sconf/202561902010.

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This paper provides a comprehensive overview of voltage multiplier cells by Considering High step-up DC/DC converters without isolation for solar and wind power systems. A significant number of topologies have been investigated. This work reviews voltage multiplier and classifies voltage multiplier cells for High step-up DC/DC converters without isolation into many categories based on suggestable and generalized designs. This article compares and discusses the essential features, topological variations, and advantages and disadvantages of various Boosting techniques of Voltage Multipliers. Thi

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de la Cruz-Alejo, Jesús, and L. Noe Oliva-Moreno. "Low Voltage FGMOS Four Quadrants Analog Multiplier." Advanced Materials Research 918 (April 2014): 313–18. http://dx.doi.org/10.4028/www.scientific.net/amr.918.313.

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In this paper a low voltage FGMOS analog multiplier is proposed that uses a follower voltage flipped (FVF), which dominates its operation. In order to reduce the power supply of the multiplier, floating gate CMOS transistors (FGMOS) are used. Theoretical steps of the FVF design are presented together with its simulation. The output of the FVF is insensitive to the device parameters and is loaded with a resistive load. The multiplier design consists of two FVF cells, two current sensors FVF and one Gilbert cell multiplier. The results show that the proposed multiplied in a 0.13μm CMOS process e

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MISS.BHOSALE, SHUBHANGI ASHOK, and MANTRI D. B. PROF. "32 BIT×32 BIT MULTI PRECISION RAZOR-BASED DYNAMIC VOLTAGE SCALING MULTIPLIER WITH OPERANDS SCHEDULER." JournalNX - A Multidisciplinary Peer Reviewed Journal 3, no. 4 (2017): 38–41. https://doi.org/10.5281/zenodo.1452239.

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In this paper, a 32Ã—32-bit multi-precision multiplier is described. The multiprecision (MP) multiplier that incorporates the variable precision, parallel processing (PP), razor-based dynamic voltage scaling (DVS), and MP operands scheduling are used to provide a variety of operating conditions. The proposed multi-precision multiplier enables voltage and frequency scaling for low power operation. The highly dynamic voltage and frequency scaling circuits can autonomously configure the multiplier to operate with the lowest possible voltage and frequency to achieve the lowest power c

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7

Mr., A. Raghavendra Prasad Mr.K.Rajasekhara Reddy &. Mr.M.Siva sankar. "HIGH VOLTAGE DC UP TO 2 KV FROM AC BY USING CAPACITORS AND DIODES IN LADDER NETWORK." INTERNATIONAL JOURNAL OF RESEARCH SCIENCE & MANAGEMENT 5, no. 6 (2018): 73–85. https://doi.org/10.5281/zenodo.1291902.

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The aim of this project is designed to develop a high voltage DC around 2KV from a supply source of 230V AC using the capacitors and diodes in a ladder network based on voltage multiplier concept. The method for stepping up the voltage is commonly done by a step-up transformer. The output of the secondary of the step up transformer increases the voltage and decreases the current. The other method for stepping up the voltage is a voltage multiplier but from AC to DC. Voltage multipliers are primarily used to develop high voltages where low current is required. This project describes the concept

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8

Palati, Madhu, and Prashanth Narayanappa Ananda. "Characterization of a compact low cost 6.5kV Cockcroft voltage multiplier." Bulletin of Electrical Engineering and Informatics 11, no. 4 (2022): 1789–97. http://dx.doi.org/10.11591/eei.v11i4.3809.

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Generation of high voltages is often necessary in Industrial, Medical, civilian and defense applications. One of the popular methods of generation of high voltage DC is using a Cockcroft voltage multiplier generator. Knowledge on characterization of the voltage multiplier circuit helps the designer to study the effect of various input parameters on output, saves lot of time and money. In this paper various methods of generation of high voltages, advantages and disadvantages of each method are discussed. Design of five stage voltage multiplier circuit, fabrication and characterization of the 6.

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Madhu, Palati, and Narayanappa Ananda Prashanth. "Characterization of a compact low cost 6.5kV Cockcroft voltage multiplier." Bulletin of Electrical Engineering and Informatics 11, no. 4 (2022): 1789~1797. https://doi.org/10.11591/eei.v11i4.3809.

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Generation of high voltages is often necessary in industrial, medical, civilian and defense applications. One of the popular methods of generation of high voltage DC is using a Cockcroft voltage multiplier generator. Knowledge on characterization of the voltage multiplier circuit helps the designer to study the effect of various input parameters on output, saves lot of time and money. In this paper various methods of generation of high voltages, advantages and disadvantages of each method are discussed. Design of five stage voltage multiplier circuit, fabrication and characterization of the 6.

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10

Sinyukin, A. S., B. G. Konoplev, and A. V. Kovalev. "Design of integrated voltage multipliers using standard CMOS technologies." Микроэлектроника 52, no. 6 (2023): 508–17. http://dx.doi.org/10.31857/s0544126923600203.

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Results of the design of the integrated multistage voltage multipliers as components of supply modules for wireless passive microdevices are presented. Parameters of MOS transistors significant for the multipliers design and presented in three standard CMOS technologies, CM018G 180 nm, HCMOS8D 180 nm and C250G 250 nm, are considered. CAD Cadence simulation results have demonstrated that in the case of eight-stage multiplier implementation using CM018G technology minimum output voltage level requisite for microchip operation is achieved at input amplitude 250 mV and in the case of the similar d

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Suvarna, S., K. Rajesh, and T. Radhu. "A Modified Architecture for Radix-4 Booth Multiplier with Adaptive Hold Logic." International Journal of Students' Research in Technology & Management 4, no. 1 (2016): 01–05. http://dx.doi.org/10.18510/ijsrtm.2016.411.

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High speed digital multipliers are most efficiently used in many applications such as Fourier transform, discrete cosine transforms, and digital filtering. The throughput of the multipliers is based on speed of the multiplier, and then the entire performance of the circuit depends on it. The pMOS transistor in negative bias cause negative bias temperature instability (NBTI), which increases the threshold voltage of the transistor and reduces the multiplier speed. Similarly, the nMOS transistor in positive bias cause positive bias temperature instability (PBTI).These effects reduce the transist

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12

Moghaddam, Majid, Mohammad Hossein Moaiyeri, Mohammad Eshghi, and Ali Jalali. "A Low-Power Multiplier Using an Efficient Single-Supply Voltage Level Converter." Journal of Circuits, Systems and Computers 24, no. 08 (2015): 1550124. http://dx.doi.org/10.1142/s0218126615501248.

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This paper presents a new high-performance and low-power single-supply voltage level converter (SSLC) and a new carry save array multiplier based on clustered-voltage scaling (CVS) technique for ultra-low-power applications. The multiplier operates with low and high supply voltage (V DDL , V DDH ) and at its end stage, the proposed low-power SSLC is utilized to prevent static power dissipation at the next stage working with V DDH and to enhance the output driving capability. In the proposed SSLC, dynamically-controlled source-body voltage, reduced drain induced barrier lowering (DIBL) effect a

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13

Yaskiv, V. I., and A. V. Yaskiv. "Adjustable voltage multiplier based on high-frequency magnetic amplifiers." Optoelectronic Information-Power Technologies 45, no. 1 (2023): 121–27. http://dx.doi.org/10.31649/1681-7893-2023-45-1-121-127.

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The proposed method of designing of voltage multipliers, which is based on the use of voltage regulators based on high-frequency magnetic amplifiers is describes in the article . The principle of operation of the regulator is described. The topology of the stabilized voltage multiplier is given.

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14

Senthil Kumar, K. K., R. Vignesh, V. R. Vivek, Jagdish Prasad Ahirwar, Khamdamova Makhzuna, and R. Ram kumar. "Approximate Multiplier based on Low power and reduced latency with Modified LSB design." E3S Web of Conferences 399 (2023): 01009. http://dx.doi.org/10.1051/e3sconf/202339901009.

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The devised approximation multiplier can adapt the precision and processing power needed formul triplication sat run-time based on the needs of the user. To decrease error distance, we also suggest a straight forward error compensation circuit. There are two types of approximate multi pliers. Dynamic voltages caling can be used for the first kind, which controls the timing route of the multiplier. If the voltage is lower, the critical path will take longer to complete. As a result, when the time path is violated, errors occurs and approximated results are produced. These cond types involves re

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15

Arnold, B. "Current/voltage hybrid multiplier." Electronics Letters 24, no. 14 (1988): 860. http://dx.doi.org/10.1049/el:19880586.

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16

Soto, Leopoldo, and Luis Altamirano. "A pulse voltage multiplier." Review of Scientific Instruments 70, no. 3 (1999): 1891–92. http://dx.doi.org/10.1063/1.1149686.

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17

Gupta, S. S., D. R. Bhaskar, and R. Senani. "Synthesis of New Single CFOA-Based VCOs Incorporating the Voltage Summing Property of Analog Multipliers." ISRN Electronics 2012 (September 18, 2012): 1–8. http://dx.doi.org/10.5402/2012/463680.

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Recently, current feedback operational amplifier (CFOA) and analog multiplier-(AM-) based-voltage controlled oscillators (VCOs) have been published in the literature which require 2 CFOAs and 2 AMs for linear tuning law between control voltage and frequency of oscillation. In this paper, a family of eight new voltage-controlled oscillators (VCOs), with linear tuning laws, employing only a single CFOA in conjunction with two analog multipliers (AMs), has been derived through a systematic state-variable methodology. This has been made possible by exploiting the voltage summing property of the mu

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18

Eguchi, Kei, Sawai Pongswatd, Shinya Terada, and Ichirou Oota. "Parallel-Connected High Voltage Multiplier with Symmetrical Structure." Applied Mechanics and Materials 619 (August 2014): 173–77. http://dx.doi.org/10.4028/www.scientific.net/amm.619.173.

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A high voltage multiplier is proposed for non-thermal food processing systems utilizing an underwater shockwave. Unlike conventional Cockcroft-Walton Voltage Multiplier (CWVM) providing a DC output from an AC input, the proposed multiplier consists of two switched-capacitor-based DC-DC converters with different polarities. Owing to the symmetrical bipolar structure without magnetic component, the proposed multiplier can achieve faster response speed and lower voltage drop than the conventional CWVM. The theoretical analysis and simulation program with integrated circuit emphasis (SPICE) simula

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19

Ushanandhini and S. Shivkumar Dr. "Designing of IIR Filter using Radix 4 Multiplier by Precharging Technique." International Journal of Trend in Scientific Research and Development 2, no. 4 (2019): 1100–1107. https://doi.org/10.31142/ijtsrd14208.

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Infinite impulse response IIR filter designs mainly aims on either low area cost or high speed or reduced power consumption. Infinite Impulse Response filters are the most important element in signal processing and communication. IIR filters can achieve a given filtering characteristic using less memory and calculations than a similar FIR filter. Multipliers are the basic building block in DSP, microprocessors and other applications. The system's performance is entirely dependent upon the multipliers because they have large area, long latency and consume considerable power hence there is a

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20

V Anitha Sampath, Nishanthi. "High Voltage DC-DC Converter Using Voltage Multiplier Cells (VMC)." International Journal of Scientific Engineering and Research 2, no. 3 (2014): 124–31. https://doi.org/10.70729/j2013198.

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21

Amudhavalli, Dhanaraj, Nalin Kant Mohanty, and Ashwin Kumar Sahoo. "Interleaved quadratic boost converter integrated with Dickson voltage multiplier with energy storage for high power photo voltaic applications." International Journal of Power Electronics and Drive Systems (IJPEDS) 12, no. 2 (2021): 957. http://dx.doi.org/10.11591/ijpeds.v12.i2.pp957-967.

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In this paper interleaved quadratic boost converter with Dickson voltage multiplier is proposed. Photovoltaic system is connected to high power load through the proposed converter. Structure of this high gain interleaved converter comprised of two stages: interleaved quadratic boost converter stage and Dickson voltage multiplier stage. Interleaved quadratic boost converter is a parallel combination of two quadratic boost converter. The interleaving increases frequency of converter that could be filtered using small capacitors, making input current smoother than the current of conventional quad

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22

D., Amudhavalli, Kant Mohanty Nalin, and Kumar Sahoo Ashwin. "Interleaved quadratic boost converter integrated with Dickson voltage multiplier with energy storage for high power photo voltaic applications." International Journal of Power Electronics and Drive System (IJPEDS) 12, no. 2 (2021): 957–67. https://doi.org/10.11591/ijpeds.v12.i2.pp957-967.

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In this paper interleaved quadratic boost converter with Dickson voltage multiplier is proposed. Photovoltaic system is connected to high power load through the proposed converter. Structure of this high gain interleaved converter comprised of two stages: interleaved quadratic boost converter stage and Dickson voltage multiplier stage. Interleaved quadratic boost converter is a parallel combination of two quadratic boost converter. The interleaving increases frequency of converter that could be filtered using small capacitors, making input current smoother than the current of conventional quad

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23

Thulasidas, Jeya Shree, Srinivasan Purushothaman, Srivatsen Ravishanker, Thejaswaroopan Mourougaiyan, and Arruthra Anilkumar. "Low cost pulsed electric field generator using DC-DC boost converter and capacitor diode voltage multiplier." International Journal of Applied Power Engineering (IJAPE) 13, no. 4 (2024): 874. http://dx.doi.org/10.11591/ijape.v13.i4.pp874-885.

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Traditional high-voltage pulse generators, like Marx generators often face challenges related to efficiency and complexity. In this paper, a solid-state multi-module high-voltage pulse generator that integrates capacitor-diode voltage multipliers (CDVM) with DC-DC boost converters and closed-loop voltage control is proposed to overcome these challenges. The system achieves high output voltage by coupling the pulsed output voltages of individual low-voltage DC sources in series across each module. The proposed design was modeled using MATLAB, and experimental testing was conducted on a single s

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Thulasidas, Jeya Shree, Srinivasan Purushothaman, Srivatsen Ravishanker, Thejaswaroopan Mourougaiyan, and Arruthra Anilkumar. "Low cost pulsed electric field generator using DC-DC boost converter and capacitor diode voltage multiplier." International Journal of Applied Power Engineering 13, no. 4 (2025): 874–85. https://doi.org/10.11591/ijape.v13.i4.pp874-885.

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Traditional high-voltage pulse generators, like Marx generators often face challenges related to efficiency and complexity. In this paper, a solid-state multi-module high-voltage pulse generator that integrates capacitor-diode voltage multipliers (CDVM) with DC-DC boost converters and closed-loop voltage control is proposed to overcome these challenges. The system achieves high output voltage by coupling the pulsed output voltages of individual low-voltage DC sources in series across each module. The proposed design was modeled using MATLAB, and experimental testing was conducted on a single s

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25

Chen, Wei Ping, Tian Yang Wang, Hong Lei Xu, and Xiao Wei Liu. "A Four-Quadrant Analog Multiplier Based on CMOS Source Coupled Pair." Key Engineering Materials 483 (June 2011): 487–91. http://dx.doi.org/10.4028/www.scientific.net/kem.483.487.

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A novel structure for CMOS four-quadrant analog multiplier is presented. The multiplier is based on the square law of MOSFET. To enlarge the input impedance and improve the linearity, CMOS source coupled pair was employed. Also active attenuator was used to enhance the input range. Compared with the traditional multipliers based on Gilbert cell, the proposed circuit features high linearity, high input range. Circuit simulation using HSPICE with 0.5μm CMOS technology shows that under ±2.5V supply the proposed multiplier provides linear range of more than 50% of the voltage supply, THD is 0.3% a

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Hong, Sangjin, Suhwan Kim, and Wayne E. Stark. "Low-power Application-specific Parallel Array Multiplier Design for DSP Applications." VLSI Design 14, no. 3 (2002): 287–98. http://dx.doi.org/10.1080/10655140290011087.

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Digital Signal Processing (DSP) often involves multiplications with a fixed set of coefficients. This paper presents a novel multiplier design methodology for performing these coefficient multiplications with very low power dissipation. Given bounds on the throughput and the quantization error of the computation, our approach scales the original coefficients to enable the partitioning of each multiplication into a collection of smaller multiplications with shorter critical paths. Significant energy savings are achieved by performing these multiplications in parallel with a scaled supply voltag

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27

Wijono, Wijono, Zainul Abidin, Waru Djuriatno, Eka Maulana, and Nola Ribath. "Design of 4-stage Marx generator using gas discharge tube." Bulletin of Electrical Engineering and Informatics 10, no. 1 (2021): 55–61. http://dx.doi.org/10.11591/eei.v10i1.1949.

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In this paper, a Marx generator voltage multiplier as an impulse generator made of multi-stage resistors and capacitors to generate a high voltage is proposed. In order to generate a high voltage pulse, a number of capacitors are connected in parallel to charge up during on time and then in series to generate higher voltage during off period. In this research, a 6kV Marx generator voltage multiplier is designed using gas discharge tube (GDT) as an electronic switch to breakdown voltage. The Marx generator circuit is designed to charge the storage capacitor for high impulse voltage and current

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Wijono, Abidin Zainul, Djuriatno Waru, Maulana Eka, and Ribath Nola. "Design of 4-stage Marx generator using gas discharge tube." Bulletin of Electrical Engineering and Informatics 10, no. 1 (2021): 55–61. https://doi.org/10.11591/eei.v10i1.1949.

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In this paper, a Marx generator voltage multiplier as an impulse generator made of multi-stage resistors and capacitors to generate a high voltage is proposed. In order to generate a high voltage pulse, a number of capacitors are connected in parallel to charge up during on time and then in series to generate higher voltage during off period. In this research, a 6kV Marx generator voltage multiplier is designed using gas discharge tube (GDT) as an electronic switch to breakdown voltage. The Marx generator circuit is designed to charge the storage capacitor for high impulse voltage and current

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29

Iqbal, Shahid. "A Hybrid Symmetrical Voltage Multiplier." IEEE Transactions on Power Electronics 29, no. 1 (2014): 6–12. http://dx.doi.org/10.1109/tpel.2013.2251474.

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Uno, Masatoshi, Teruhisa Ueno, and Koji Yoshino. "Cell Voltage Equalizer Using a Selective Voltage Multiplier with a Reduced Selection Switch Count for Series-Connected Energy Storage Cells." Electronics 8, no. 11 (2019): 1303. http://dx.doi.org/10.3390/electronics8111303.

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Cell voltage equalization is mandatory to eliminate voltage imbalance of series-connected energy storage cells, such as lithium-ion batteries (LIBs) and electric double-layer capacitors (EDLCs), to ensure years of safe operations. Although a variety of cell equalizers using selection switches have been proposed, conventional techniques require numerous switches in proportion to the cell count and are prone to complexity. This paper proposes a novel cell voltage equalizer using a selective voltage multiplier. By embedding selection switches into the voltage multiplier-based cell voltage equaliz

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31

Eguchi, Kei, Daigo Nakashima, Takaaki Ishibashi, and Farzin Asadi. "A High Voltage Multiplier Using Stacked Hybrid Cockcroft– Walton/Dickson Multipliers." Journal of Physics: Conference Series 2022, no. 1 (2021): 012019. http://dx.doi.org/10.1088/1742-6596/2022/1/012019.

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Azmi, Nor A., Sohiful A. Z. Murad, Azizi Harun, and Rizalafande C. Ismail. "5V to 6kV DC-DC Converter Using Switching Regulator with Cockcroft-Walton Voltage Multiplier for High Voltage Power Supply Module." Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering) 12, no. 2 (2019): 162–71. http://dx.doi.org/10.2174/2352096511666180605094827.

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Background: This paper describes the design of 5 V to 6 kV DC-DC converter by using a switching regulator with Cockroft-Walton (C-W) voltage multiplier for a high voltage power supply module. Methods: The proposed design consists of Pulse Width Modulation (PWM) controller circuit, voltage multiplier, and feedback signal. A single unit of 5 V input triggers LT1618 controller circuit to generate 20 V which then produces 300 V from LT8331 output that is connected to diode-capacitor multiplier circuit to achieve final 6 kV. A negative feedback signal is required to stabilize an output voltage. Wit

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Luo, Ye-Sing, and Shen-Iuan Liu. "A Voltage Multiplier With Adaptive Threshold Voltage Compensation." IEEE Journal of Solid-State Circuits 52, no. 8 (2017): 2208–14. http://dx.doi.org/10.1109/jssc.2017.2693228.

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Sadeghi, Mohsen, Mahya Zahedi, and Maaruf Ali. "The Cascade Carry Array Multiplier – A Novel Structure of Digital Unsigned Multipliers for Low-Power Consumption and Ultra-Fast Applications." Annals of Emerging Technologies in Computing 3, no. 3 (2019): 19–27. http://dx.doi.org/10.33166/aetic.2019.03.003.

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This article presents a low power consumption, high speed multiplier, based on a lowest transistor count novel structure when compared with other traditional multipliers. The proposed structure utilizes 4×4-bit adder units, since it is the base structure of digital multipliers. The main merits of this multiplier design are that: it has the least adder unit count; ultra-low power consumption and the fastest propagation delay in comparison with other gate implementations. The figures demonstrate that the proposed structure consumes 32% less power than using the bypassing Ripple Carry Array (RCA)

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Razavi, Seyyed Masoud, and Seyyed Reza Talebiyan. "Novel design of array multiplier." Ciência e Natura 37 (December 19, 2015): 312. http://dx.doi.org/10.5902/2179460x20788.

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In this paper a new array multiplier has been proposed, which has lower power consumption than the regular array multipliers. This technique has been applied on two conventional and leapfrog array multipliers. In the formation of 8×8 multiplier all designs proposed in this paper have been implemented using the HSPICE by the use of 180 nm TSMC technology at a supply voltage 1v. To verify the performance of the proposed structures, structures have been simulated in 130 nm & 65 nm PTM technologies. The simulation results show that applying the return technique in the array structures causes p

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Ali, Esraa Mousa, Nor Zaihar Yahaya, Omar Aqeel Saraereh, et al. "Power Conversion Using Analytical Model of Cockcroft–Walton Voltage Multiplier Rectenna." Electronics 10, no. 8 (2021): 881. http://dx.doi.org/10.3390/electronics10080881.

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A voltage multiplier rectenna is a combination of a voltage multiplier rectifier and an antenna used for the conversion of AC to DC. It is an essential part of the system of RF energy harvesting. Conventional rectennas are characterized by low conversion efficiency. This study presents an analytical novel mode designed for RF energy harvesting systems to study the voltage and current output of rectifier stages for efficiency optimization. The design contains a voltage multiplier rectification circuit with seven stages. The Schottky diode HSMS 285-C was selected for the circuit modeling voltage

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P., Anjali, and Navya Jyothi G. "Design and Performance Analysis of FIR Filter for VLSI Applications." International Journal of Engineering and Advanced Technology (IJEAT) 9, no. 3 (2020): 530–33. https://doi.org/10.35940/ijeat.B4661.029320.

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The Primary essential basis for planning and realization of Digital signal processor is space improvement and decrease in power utilization. The basic part for arranging and acknowledgment of processor is the FIR Filter. This Filter contains three basic blocks that area unit Adder blocks, memory block and number blocks. The execution of this Filter is basically subjective by the wide assortment that is the moderate block out of all. In this paper, the Filter has been planned using two completely different multipliers particularly Array multiplier and Booth multiplier. An upgrade has been finis

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Ismagilov, Flyur, Ilgiz Yangirov, Ruzil Safiullin, Aygul Ayupova, and Gulnara Safina. "HIGH-VOLTAGE PULSE GENERATOR BASED ON DUAL-SPIRAL MAGNETIC ACCUMULATION GENERATOR WITH IMPROVED CHARACTERISTICS." Electrical and data processing facilities and systems 18, no. 3-4 (2022): 23–34. http://dx.doi.org/10.17122/1999-5458-2022-18-3-4-23-34.

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Relevance The paper proposes an original design of a high-voltage electromechanical two-spiral voltage source based on a magnetic accumulation generator (MAG) and a voltage multiplier with improved characteristics. In the multiplier, with the help of special switches, the addition of all voltages arising from the electrical explosion of conductors in separate inductive energy storage devices connected in parallel to the magnetic accumulation generator is carried out. A mathematical model and the results of mathematical modeling of the operation of the voltage source are presented, the calculat

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K., Prasath, Karthigeyan M., Suresh Moorthy P., and Prasanth S. "Generation of High Voltage with Voltage Multiplier for Insulation Testing." Journal of Signal Processing 6, no. 2 (2020): 1–5. https://doi.org/10.5281/zenodo.3778251.

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DC high voltage is used in testing a variety of insulating material. To obtain higher D.C voltage with the low input source in small scale circuit a high step up D.C to D.C converter with voltage multiplier module is designed. Simulation of high step up D.C to D.C converter with 24 stage cascaded voltage multiplier module is designed and the multi-module circuit is developed by connecting the output voltage of each module in series is done using software MATLAB Simulink. The maximum D.C. yield voltage of 50.93 k V is produced utilizing this smaller converter in reenactment. Then the voltage di

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Fu, Chengjie, Xiaolei Zhu, Kejie Huang, and Zheng Gu. "An 8-bit Radix-4 Non-Volatile Parallel Multiplier." Electronics 10, no. 19 (2021): 2358. http://dx.doi.org/10.3390/electronics10192358.

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The data movement between the processing and storage units has been one of the most critical issues in modern computer systems. The emerging Resistive Random Access Memory (RRAM) technology has drawn tremendous attention due to its non-volatile ability and the potential in computation application. These properties make them a perfect choice for application in modern computing systems. In this paper, an 8-bit radix-4 non-volatile parallel multiplier is proposed, with improved computational capabilities. The corresponding booth encoding scheme, read-out circuit, simplified Wallace tree, and Manc

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Alzahrani, Ahmad, Pourya Shamsi, and Mehdi Ferdowsi. "Interleaved Multistage Step-Up Topologies with Voltage Multiplier Cells." Energies 13, no. 22 (2020): 5990. http://dx.doi.org/10.3390/en13225990.

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This paper proposes a family of high-voltage-gain step-up dc-dc converters for photovoltaic integration application. The proposed converters are capable of converting the low voltage from input sources to a dc bus. The proposed family is constructed of interleaved single-switch multistage boost converters and voltage multiplier cells (VMC). The proposed converters feature low voltage stress across the components, equal current sharing among all phases, and a smooth input current. Moreover, the proposed family of converters has a modular structure in both the VMC and the boost stage. That is, t

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Ramamurthi, Subbulakshmy, and Palanisamy Ramasamy. "High step-up DC-DC converter with switched capacitor-coupled inductor and voltage multiplier module." International Journal of Power Electronics and Drive Systems (IJPEDS) 13, no. 3 (2022): 1599. http://dx.doi.org/10.11591/ijpeds.v13.i3.pp1599-1604.

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A high step-up dc-dc converter based on a switched capacitor-coupled inductor (SC-CL) with voltage multiplier cells is proposed. It is composed of a SC-CL and a voltage multiplier module stacked on the load side. SC-CL produces the maximum output voltage with maximum voltage gain. These features make the projected converter suitable for renewable energy applications such as solar photovoltaic (PV). A low turn ratio of the coupled inductor is used for realizing the higher gain. It consists of a voltage boost unit SC-CL and a voltage multiplier module. In a DC micro-grid, PV energy is one of the

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MISS.BHOSALE, SHUBHANGI ASHOK. "MODIFIED FREQUENCY SCALING METHOD USED TO 32 BIT X 32 BIT MULTIPRECISION MULTIPLIER." IJIERT - International Journal of Innovations in Engineering Research and Technology 4, no. 3 (2017): 37–41. https://doi.org/10.5281/zenodo.1461233.

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<strong>In this paper,we present amultiprecision (MP) reconfigurable multiplier that incorporates variable precision,parallel processing (PP),razor - based dynamic volt age scaling (DVS),and MP operands scheduling are used to provide a variety of operating conditions. In Previous paper the PLL used for the frequency division. If use the PLL for frequency division it s hardware complexity increases . To decrease the hardware complexity and also speed is increases are done by software using some frequency division methods. The reconfigurable multiplier can either work as independent smaller - pr

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Ali Azam Khan, Md, and Mohammad Ali Choudhury. "Efficient Voltage Regulation with Modified Hybrid SEPIC DC-DC-Converter." MATEC Web of Conferences 160 (2018): 02004. http://dx.doi.org/10.1051/matecconf/201816002004.

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Switch mode dc-dc converters are attractive for their small size, ease of control and efficient power conversion. Output voltage is regulated by duty cycle control of semiconductor switch of switch mode dc-dc converters. The voltage gain and efficiency of practical switching regulators deviate from ideal values at extreme duty cycles. Also, desired gain /attenuation is not achievable at high/low duty cycles. In applications where high gain or high attenuation of voltage is desired with acceptable energy conversion efficiency, hybrid dc-dc switching converters are used. Hybrid dc-dc converters

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Mandegaran, Sam, and Ali Hajimiri. "A Breakdown Voltage Multiplier for High Voltage Swing Drivers." IEEE Journal of Solid-State Circuits 42, no. 2 (2007): 302–12. http://dx.doi.org/10.1109/jssc.2006.889390.

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Zhang, Neng, Danny Sutanto, Kashem M. Muttaqi, Bo Zhang, and Dongyuan Qiu. "High‐voltage‐gain quadratic boost converter with voltage multiplier." IET Power Electronics 8, no. 12 (2015): 2511–19. http://dx.doi.org/10.1049/iet-pel.2014.0767.

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Reaungepattanawiwat, Chalermpol, and Yutthana Kanthaphayao. "Voltage Multiplier Circuits with Coupled-Inductor Applied to a High Step-Up DC-DC Converter." Applied Mechanics and Materials 781 (August 2015): 418–21. http://dx.doi.org/10.4028/www.scientific.net/amm.781.418.

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This paper presents a high voltage gain of a DC-DC converter. The proposed system consists of voltage multiplier circuits and a coupled inductor of a boost DC-DC converter. The input voltage of the voltage multiplier circuit is the induced voltage of inductor at a boost DC-DC converter. The field programmable gate array (FGPA) is used for generating the control signal of the proposed system. To verify the proposed circuit, an experiment was conducted from the prototype circuit. The proposed circuit can step-up the voltage with high voltage gain. Moreover, the voltage across the switch is very

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Wijono, Maulana Eka, Darmawan Putra Dony, and Djuriatno Waru. "Plasma generator: design of six stage cockcroft-walton voltage multiplier 12 kV for impulse voltage generation." TELKOMNIKA Telecommunication, Computing, Electronics and Control 17, no. 4 (2019): 1890–97. https://doi.org/10.12928/TELKOMNIKA.v17i4.11828.

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Cockcroft-Walton (CW) voltage multiplier is a voltage booster circuit with an array of series-connected only diodes and capacitors. In this research, voltage multiplier is designed to generate voltage up to 12 kV that the modified 6-stage constructed generator. It is designed as circuit charger of storage capacitor (CS) to generate combination wave impulse application which following standard those set in IEC (International Electrotecnical Commission) 61000-4-5 class 4. CS should be charged up to 4 kV according this standard. High impulse voltage and current works repeatedly in a short time, s

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Zhu, Wu, and Shui Xiu Guan. "Zero Error Analysis and Compensation of No-Beat Time Division Multiplier." Applied Mechanics and Materials 130-134 (October 2011): 3293–97. http://dx.doi.org/10.4028/www.scientific.net/amm.130-134.3293.

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Time division multiplier was widely used in high-precision industrial frequency AC power measurements.The poor stability of zero point was caused by the switch leakage and amplifier offset voltage. Based on the experimental study of the time division multiplier circuit designed in the article, the mathematical model of zero point compensation was established, and then the appropriate calibration method was proposed. Considered the amplifier offset voltage, the error model of the time division multiplier was analyzed and the error expression was obtained. These can provide theoretical guidance

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Korolkov, Oleg, Raul Land, Jana Toompuu, Natalja Sleptsuk, and Toomas Rang. "SiC JBS Diode Symmetrical Voltage Doubler Represented as the Diffusion-Welded Stack." Materials Science Forum 924 (June 2018): 862–65. http://dx.doi.org/10.4028/www.scientific.net/msf.924.862.

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In the present work, the prototype of a voltage multiplier represented as the diffusion-welded stack is presented. Two options of multiplier prototypes are considered: the scheme with external capacitors and the multiplier of the vertical composition using the diode's own capacitance. Oscillograms of input and output signals for both multiplier composition are presented.

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