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Colombo, Dalton Martini. "Bandgap voltage references in submicrometer CMOS technology." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2009. http://hdl.handle.net/10183/16136.
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Referências de tensão são blocos fundamentais em uma série de aplicações de sinais mistos e de rádio frequência, como por exemplo, conversores de dados, PLL's e conversores de potência. A implementação CMOS mais usada para referências de tensão é o circuito Bandgap devido sua alta previbilidade, e baixa dependência em relação à temperatura e tensão de alimentação. Este trabalho estuda aplicação de Referência de Tensão Bandgap. O princípio, as topologias tradicionalmente usadas para implementar este método e as limitações que essas arquiteturas sofrem são investigadas. Será também apresentada uma pesquisa das questões recentes envolvendo alta precisão, operação com baixa tensão de alimentação e baixa potência, e ruído de saída para as referências Bandgap fabricadas em tecnologias submicrométricas. Além disso, uma investigação abrangente do impacto causado pelo o processo da fabricação e do ruído no desempenho da referência é apresentada. Será mostrado que o ruído de saída pode limitar a precisão dos circuitos Bandgap e seus circuitos de ajuste. Para desenvolver nosso trabalho, três Referências Bandgap foram projetadas utilizando o processo IBM 7RF 0.18 micra com uma tensão de alimentação de 1.8V. Também foram projetados os leiautes desses circuitos para prover informações pósleiaute extraídos e resultados de simulação elétrica. Este trabalho provê uma discussão de algumas topologias e das práticas de projeto para referências Bandgap.<br>A Voltage Reference is a pivotal block in several mixed-signal and radio-frequency applications, for instance, data converters, PLL's and power converters. The most used CMOS implementation for voltage references is the Bandgap circuit due to its highpredictability, and low dependence of the supply voltage and temperature of operation. This work studies the Bandgap Voltage References (BGR). The most relevant and the traditional topologies usually employed to implement Bandgap Voltage References are investigated, and the limitations of these architectures are discussed. A survey is also presented, discussing the most relevant issues and performance metrics for BGR, including, high-accuracy, low-voltage and low-power operation, as well as the output noise of Bandgap References fabricated in submicrometer technologies. Moreover, a comprehensive investigation on the impact of fabrication process effects and noise on the reference voltage is presented. It is shown that output noise can limit the accuracy of the BGR and trim circuits. To support and develop our work, three BGR´s were designed using the IBM 0.18 Micron 7RF process with a supply voltage of 1.8 V. The layouts of these circuits were also designed to provide post-extracted layout information and electrical simulation results. This work provides a comprehensive discussion on the structure and design practices for Bandgap References.
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Parker, Kevin. "An on-chip trimming technique for CMOS voltage references." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1997. http://www.collectionscanada.ca/obj/s4/f2/dsk2/ftp04/mq20686.pdf.
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Mattia, Neto Oscar Elisio. "NanoWatt resistorless CMOS voltage references for Sub-1 V applications." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2014. http://hdl.handle.net/10183/107131.
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Referências de tensão integradas sempre foram um bloco fundamental de qualquer sistema eletrônico e um importante tópico de pesquisa que tem sido estudado extensivamente nos últimos 50 anos. Uma tensão de referência é um circuito que provê uma tensão estável com baixa sensibilidade a variações em temperatura, alimentação, carga, características do processo de fabricação e tensões mecânicas de encapsulamento. Elas são normalmente implementadas através da soma ponderada de dois fenômenos físicos diferentes, com comportamentos em temperatura opostos. Normalmente, a tensão térmica, relacionada à constante de Boltzmann e à carga do elétron, fornece uma dependência positiva com temperatura, enquanto que a tensão base-emissor VBE de um transistor bipolar ou a tensão de limiar de um MOSFET fornece o termo complementar. Um bloco auxiliar é às vezes utilizado para fornecer as correntes de polarização do circuito, e outros blocos adicionais implementam a soma ponderada. A evolução da tecnologia de processos é o principal fator para aplicações em baixa tensão, enquanto que a emergência de dispositivos portáteis operados a bateria, circuitos biomédicos implantáveis e dispostivos de captura de energia do ambiente restringem cada circuito a consumir o mínimo possivel. Portanto, alimentações abaixo de 1 V e consumos na ordem de nanoWatts se tornaram características fundamentais de tais circuitos. Contudo, existem diversos desafios ao projetar referências de tensão de alta exatidão em processos CMOS modernos sob essas condições. As topologias tradicionais não são adequadas pois elas provêm uma referência de tensão acima de 1 V, e requerem resistências da ordem de G para atingir tão baixo consumo de potência, ocupando assim uma grande área de silício. Avanços recentes atingiram tais níveis de consumo de potência, porém com limitada exatidão, custosos procedimentos de calibração e grande área ocupada em silício. Nesta dissertação apresentam-se duas novas topologias de circuitos: uma tensão de junção bipolar com compensação de curvatura que não utiliza resistores e é auto-polarizada; e um circuito de referência bandgap sem resistores que opera abaixo de 1 V (também chamado de sub-bandgap). Ambos circuitos operam com consumo na ordem de nanoWatts e ocupam pequenas áreas de silício. Resultados de simulação para dois processos diferentes, 180 nm e 130 nm, e resultados experimentais de uma rodada de fabricação em 130 nm apresentam melhorias sobre tais limitações, mantendo as características desejadas de não conter resistores, ultra baixo consumo, baixa tensão de alimentação e áreas muito pequenas.<br>Integrated voltage references have always been a fundamental block of any electronic system, and an important research topic that has been extensively studied in the past 50 years. A voltage reference is a circuit that provides a stable voltage with low sensitivity to variations in temperature, supply, load, process characteristics and packaging stresses. They are usually implemented through the weighted sum of two independent physical phenomena with opposite temperature dependencies. Usually the thermal voltage, related to the Boltzmann’s constant and the electron charge, provides a positive temperature dependence, while the silicon bandgap voltage or a MOSFET’s threshold voltage provide the complementary term. An auxiliary biasing block is sometimes necessary to provide the necessary currents for the circuit to work, and additional blocks implement the weighted sum. The scaling of process technologies is the main driving factor for low voltage operation, while the emergence of portable battery-operated, implantable biomedical and energy harvesting devices mandate that every circuit consume as little power as possible. Therefore, sub-1 V supplies and nanoWatt power have become key characteristics for these kind of circuits, but there are several challenges when designing high accuracy voltage references in modern CMOS technologies under these conditions. The traditional topologies are not suitable because they provide a reference voltage above 1 V, and to achieve such power consumption levels would require G resistances, that occupy a huge silicon area. Recent advances have achieved these levels of power consumption but with limited accuracy, expensive calibration procedures and large silicon area.
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Bowers, Derek Frederick. "The Design of Bandgap Voltage References for Applications Requiring Minimal Output Noise." Thesis, Imperial College London, 2009. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.520857.
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Пилипенко, И. А., та А. А. Чубенко. "Обзор методов проектирования маломощных источников опорного напряжения в интегральном исполнении". Thesis, Видавництво СумДУ, 2012. http://essuir.sumdu.edu.ua/handle/123456789/27683.
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Рук.: Л.Д. Писаренко<br>Развитие технологии производства, математического аппарата моделирования и прочих средств разработки электронных устройств постоянно расширяет сферу их применения и роль в нашей повседневной жизни. Миниатюризация электронных компонентов и переход к цифровым методам обработки сигналов и передачи данных предъявляют постоянно растущие требования к точности измерений и преобразований аналоговых сигналов в цифровой вид. Решение этой проблемы на данный момент невозможно без использования прецизионных источников опорного напряжения (ИОН), а также их точных математических моделей, которые сокращают время разработки и улучшают точность характеристик проектируемых устройств.
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Gupta, Vishal. "An accurate, trimless, high PSRR, low-voltage, CMOS bandgap reference IC." Diss., Available online, Georgia Institute of Technology, 2007, 2007. http://etd.gatech.edu/theses/available/etd-07052007-073154/.
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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2008.<br>Ayazi, Farrokh, Committee Member ; Rincon-Mora, Gabriel, Committee Chair ; Bhatti, Pamela, Committee Member ; Leach, W. Marshall, Committee Member ; Morley, Thomas, Committee Member.
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Balasubramanian, Sidharth. "Low-voltage and low-power libraries for Medical SoCs." The Ohio State University, 2009. http://rave.ohiolink.edu/etdc/view?acc_num=osu1259776639.
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Sassi, Mariela Mayumi Franchini Sasaki. "Projeto de fontes de tensão de referência através de metaheurísticas." Universidade de São Paulo, 2013. http://www.teses.usp.br/teses/disponiveis/18/18155/tde-26082013-134021/.
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Geradores de referência, ou fontes de tensão de referência, são largamente empregados na composição de diversos circuitos eletrônicos, pois são responsáveis por gerar e manter uma tensão constante para o restante do circuito. Como se trata de um circuito analógico e que possui diversas condições a serem atendidas (baixo coeficiente de temperatura, baixa tensão de alimentação, baixa regulação de linha, dentre outras), sua complexidade é alta e isso se reflete no tempo/dificuldade de um projeto. Com a finalidade de aumentar a qualidade do circuito e diminuir o tempo de projeto, foi estudado o projeto de fontes de tensão de referência através da aplicação de metaheurísticas, que são métodos de otimização utilizados em problemas que não possuem solução analítica. As metaheurísticas aplicadas foram: algoritmos genéticos, simulated annealing e pattern search, todos disponíveis em uma toolbox de otimização do Matlab. A fonte projetada, utilizando uma topologia proposta neste trabalho, fornece uma tensão de referência de 0,302 V em 300 K a uma tensão mínima de operação de 1,01 V. O coeficiente de temperatura, no intervalo de -10°C a 90°C, é de 19 ppm/°C a 1,01 V e a regulação de linha, com tensão de alimentação no intervalo de 1,01 V a 2,5 V, é de 81 ppm/V a 300 K. O consumo de potência é de 4,2 \'mü\'W, também em 300 K e a 1,01 V e a área é de 0,061 \'MM POT.2\'. Como resultado, mostrou-se a eficiência da utilização destes métodos no dimensionamento de elementos do circuito escolhido e foi obtida uma fonte de tensão de referência que atende aos critérios estabelecidos e é superior quanto ao critério de regulação de linha, quando comparada a outras fontes da literatura. Neste trabalho, foi utilizada a tecnologia CMOS de 0,35 \'mü\'m da Austria Micro Systems (AMS).<br>Voltage references are widely employed to compose electronic circuits, since they are responsible for generating and maintaining a constant voltage to the rest of the circuit. As it is an analog circuit and it has several conditions to fulfill (low temperature coefficient, low supply voltage, low line regulation, among others), its complexity is high, which reflects at the time/difficulties of a design. In order to increase the quality of the circuit and to minimize the design time, it was studied voltage references design using metaheuristics, which are optimization methods used in problems with no analytical solution. The applied metaheuristics were: genetic algorithms, simulated annealing and pattern search, they are all available in an optimization toolbox at Matlab. The designed voltage reference, applying a topology proposed in this work, provides a reference voltage of 0.302 V at 300 K at a minimum supply voltage of 1.01 V. The temperature coefficient, from -10°C to 90°C, is 19 ppm/°C at 1.01 V and the line regulation, using a supply voltage from 1.01 V to 2.5 V, is 81 ppm/V at 300 K. The power consumption is 4.2 W also at 300 K and 1.01 V and the area is 0.061 \'MM POT.2\'. As a result, it was shown that those methods are efficient in sizing the devices of the chosen topology and it was obtained a voltage reference that fulfills all established criteria and that is superior at the line regulation criterion, when compared to other voltage reference of the literature. In this work, the 0.35-\'mü\'m CMOS technology provided by Austria Micro Systems (AMS) was used.
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Andersson, Martin. "Konstruktion av förstärkare och insamplingssteg till en PSAADC i 0.25 um CMOS." Thesis, Linköping University, Department of Electrical Engineering, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1132.
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<p>The aim and goal of this work has been to design and implement a voltage reference network for a 12-bit PSAADC, Parallell Successive Analog to Digital Converter. A chip containing the design has been sent away for fabrication. Because of the long processing time, no measurement data are presented. The main specifications for the voltage reference generator is to generate stable reference voltages with low noise and a good PSRR. Efforts has also been made to minimize the power consumption.</p>
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Komark, Stina. "Design of an integrated voltage regulator." Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1711.
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<p>Many analog systems need a stable power supply voltage that does not vary with temperature and time in order to operate properly. In a battery operated system the battery voltage is not stable, e.g. it decreases with decreasing temperature and with ageing. In that case a voltage regulator must be used, that regulates the battery voltage and generates a stable supply voltage to power other circuitry. </p><p>In this thesis a voltage regulator to be used in a battery operated system has been designed which meets the given specification of stability and power capabilities. A voltage reference, which is a commonly used devise in analog circuits, was also designed. The role of a reference voltage in an electrical system is the same as for a tuning fork in a musical ensemble; to set a standard to which other voltages are compared. </p><p>A functionality to detect when the lifetime of the battery is about to run out was also developed.</p>
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Srinivasan, Venkatesh. "Programmable Analog Techniques For Precision Analog Circuits, Low-Power Signal Processing and On-Chip Learning." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11588.
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In this work, programmable analog techniques using floating-gate transistors have been developed to design precision analog circuits, low-power signal processing primitives and adaptive systems that learn on-chip. Traditional analog implementations lack programmability with the result that issues such as mismatch are corrected at the expense of area. Techniques have been proposed that use floating-gate transistors as an integral part of the circuit of interest to provide both programmability and the ability to correct for mismatch. Traditionally, signal processing has been performed in the digital domain with analog circuits handling the interface with the outside world. Such a partitioning of responsibilities is inefficient as signal processing involves repeated multiplication and addition operations that are both very power efficient in the analog domain. Using programmable analog techniques, fundamental signal processing primitives such as multipliers have been developed in a low-power fashion while preserving accuracy. This results in a paradigm shift in signal processing. A co-operative analog/digital signal processing framework is now possible such that the partitioning of tasks between the analog and digital domains is performed in a power efficient manner. Complex signal processing tasks such as adaptive filtering that learn the weight coefficients are implemented by exploiting the non-linearities inherent with floating-gate programming. The resulting floating-gate synapses are compact, low-power and offer the benefits of non-volatile weight storage. In summary, this research involves developing techniques for improving analog circuit performance and in developing power-efficient techniques for signal processing and on-chip learning.
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TEIXEIRA, MARCOS VINICIUS PIMENTEL. "IMPLEMENTATION OF NEW VOLTAGES OF REFERENCE IN OPERATION POINTS WITH ADEQUACY PROBLEMS OF VOLTAGE CONTROL ACTIONS BY GENERATOR." PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO, 2012. http://www.maxwell.vrac.puc-rio.br/Busca_etds.php?strSecao=resultado&nrSeq=21063@1.
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PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO<br>CONSELHO NACIONAL DE DESENVOLVIMENTO CIENTÍFICO E TECNOLÓGICO<br>Casos reais de blecaute, caracterizados por afundamento de tensão, indicam que os procedimentos normais para o controle automático de tensão podem agravar o nível de tensão. Isto ocorre porque, em situações especiais, as ações de controle têm o efeito oposto ao esperado da sua lógica de projeto. Essas situações especiais podem ser identificadas através de ferramenta computacional que, baseada no sistema linearizado das equações de fluxo de carga e de todas as outras equações de controle consideradas pertinentes, determina uma matriz de sensibilidade dos controles através da qual se pode estabelecer a relação existente entre as tensões controladas e as grandezas controladoras dos dispositivos de controle de tensão. O controle de tensão em geradores síncronos é realizado por reguladores automáticos de tensão (RAT) que, na prática, não têm lógica de controle para diferenciar relação direta e inversa entre a tensão controlada e a tensão de excitação do gerador. Assim, se a relação é inversa, o resultado da ação do RAT é inadequado (oposto ao desejado) e pode levar o sistema ao colapso por baixa tensão, por exemplo. Visto isso, esse trabalho apresenta um método que, através de mudanças adequadas nas grandezas dos geradores determinadas pela análise da matriz de sensibilidade dos controles, permite alcançar um novo perfil de tensão partindo de pontos de operação com problema de adequação das ações de controle por geradores.<br>Actual recent blackouts which were charactherized by voltage sags suggest that normal process for the voltage control can aggravate the voltage level. It happens because, in special situations, the automatic voltage control has the opposite effect of its logic of conception. In order to identify situations like those, we developed a computational tool to evaluate the effect of voltage control based on the linearized system of power flow equations and selected control equations. The tool calculates the voltage control sensitivity matrix which relates the controlling variables and the controlled voltages of voltage control equipments. The voltage control on synchronous generators is performed by automatic voltage regulators (AVR) that, in practice, have no control logic to differentiate direct and inverse relation between the controlling variable and the excitation voltage of generator. Therefore, if the relation is inverse, the result of the action of the AVR is inadequate (opposite to desired) and may lead the system to collapse due to low voltage, for example. Hence, this paper presents a process to achieve the new voltage profile, starting from operating points with adequacy problems of voltage control actions, through appropriate changes in variables of generators determined by analysis in voltage control sensitivity matrix.
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Holman, William Timothy. "A low noise CMOS voltage reference." Diss., Georgia Institute of Technology, 1994. http://hdl.handle.net/1853/14968.
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Grohoľ, Stanislav. "Napěťová reference s LTZ1000." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2016. http://www.nusl.cz/ntk/nusl-242056.
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The thesis deals with the issue of stability of voltage reference based on LTZ1000(A) integrated circuit. At the beginning are specified main parameters of voltage references in terms of stability. The work presents distribution references by architecture and by method of connection to the circuit. Work compares some references of Analog Devices and Linear Technology companies. In work is described voltage reference LTZ1000(A) and its circuits from datasheet. Listed are the main factor that influence the stability of reference, such as temperature, PCB design, Zener diode bias current, airflow and choice of circuit components. Given the description of a design module with the 7 V, 5 V and 10 V output. Made was three samples of PCB. Listed are results from long-term drift and temperature drift measures.
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Souza, Flávio Queiroz de [UNESP]. "Projeto de uma referência de tensão com baixa susceptibilidade a interferência eletromagnética (EMI)." Universidade Estadual Paulista (UNESP), 2011. http://hdl.handle.net/11449/87063.
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souza_fq_me_ilha.pdf: 803035 bytes, checksum: 9aab0ce0802cfc37e761960c21f93140 (MD5)<br>Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)<br>Referências de tensão integradas com baixa sensibilidade à temperatura, tensão de a- limentação e eventos transitórios são componentes críticos na maioria dos circuitos integra- dos. Neste trabalho, além das restrições costumeiras, foi adicionada a preocupação com a in- terferência eletromagnética a qual vem ganhando muita importância devido a crescente polui- ção eletromagnética no ambiente. Assim, neste trabalho, propõe-se o projeto de uma referên- cia de tensão tipo bandgap com baixa susceptibilidade a interferência eletromagnética (EMI). O projeto deste circuito baseia-se na soma de duas correntes (referência de tensão baseada em corrente), uma com coeficiente complementar a temperatura absoluta (CTAT) e outra com coeficiente proporcional à temperatura absoluta (PTAT), aplicada sobre um resistor. Neste projeto, a susceptibilidade a interferência eletromagnética de uma referência de tensão band- gap é estudada por meio de simulação. Projetada para ser fabricada com a tecnologia CMOS 0,35 μm da AMS (Autriamicrosystems), a referência forneceu uma tensão de referência está- vel de 1,354 V em sua saída operando normalmente na faixa de temperatura de -40 a 150oC. Quando submetido à EMI, o circuito exibiu apenas 24,7 mV (quando filtros capacitivos são incluído) de offset induzido, para um sinal de interferência variando de 150 kHz a 1 GHz<br>Integrated voltage references with low sensitivity to temperature, supply voltage and transient events are critical requirements in the most of integrated circuits. In this work, be- sides the usual restrictions, was added to concern with electromagnetic interference which is gaining much importance due to increasing electromagnetic pollution on the environment. So, in this work, proposes the design of a bandgap voltage reference with low susceptibility to electromagnetic interference (EMI) is proposed. The design of the circuit is based on the sum of two currents (current-based voltage reference), one with coefficient complementary to ab- solute temperature (CTAT) and the other with coefficient proportional to absolute temperature (PTAT) into a resistor. In this work, the susceptibility to electromagnetic interference in a bandgap voltage reference is evaluated by simulations. Designed to be implemented in AMS (Autriamicrosystems) 0,35 μm CMOS process, the reference provides a stable voltage refer- ence equal to 1,354 V in the output working properly in the temperature range of -40 to 150oC. When EMI is injected, the circuit exhibits only 24,7 mV (when capacitive filters are included) of induced offset, for an interference signal varying in the frequency range of 150 kHz to 1 GHz
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Najafizadeh, Laleh. "Design of analog circuits for extreme environment applications." Diss., Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31796.
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Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: Cressler, John; Committee Member: Papapolymerou, John; Committee Member: Shen, Shyh-Chiang; Committee Member: Steffes, Paul; Committee Member: Zhou, Hao Min. Part of the SMARTech Electronic Thesis and Dissertation Collection.
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Mylonas, Georgios. "Programmable voltage reference generator for a SAR-ADC." Thesis, Linköpings universitet, Elektroniksystem, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-98567.
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SAR-ADCs are very popular and suitable for conversions up to few tens of MHz with 8 to 12 bits of resolution. A very popular type is the Charge Redistribution SAR-ADC which is based on a capacitive array. Higher speeds can be achieved by using the interleaving technique where a number of SAR-ADCs are working in parallel. These speeds, however, can only be achieved if the reference voltage can cope with the switching of the capacitive array. In this thesis the design of a programmable voltage reference generator for a Charge Redistribution SAR-ADC was studied. A number of architectures were studied and one based on a Current Steering DAC was chosen because of the settling time that could offer to the Charge Redistribution SAR-ADC switching operation. This architecture was further investigated in order to spot the weak points of the design and try to minimize the settling time. In the end, the final design was evaluated and possible trimming techniques were proposed that could further speed up the design.
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Kevin, Tom. "Sub-1V Curvature Compensated Bandgap Reference." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2585.
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<p>This thesis investigates the possibility of realizing bandgap reference crcuits for processes having sub-1V supply voltage. With the scaling of gate oxide thickness supply voltage is getting reduced. But the threshold voltage of transistors is not getting scaled at the same rate as that of the supply voltage. This makes it difficult to incorporate conventional designs of bandgap reference circuits to processeshaving near to 1V supply voltage. In the first part of the thesis a comprehensive study on existing low voltage bandgap reference circuits is done. Using these ideas a low-power, low-voltage bandgap reference circuit is designed in the second part of the thesis work. </p><p>The proposed bandgap reference circuit is capable of generating a reference voltage of 0.730V. The circuit is implemented in 0.18µm standard CMOS technology and operates with 0.9V supply voltage, consuming 5µA current. The circuit achieves 7 ppm/K of temperature coefficient with supply voltage range from 0.9 to 1.5V and temperature range from 0 to 60C.</p>
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Souza, Flávio Queiroz de. "Projeto de uma referência de tensão com baixa susceptibilidade a interferência eletromagnética (EMI) /." Ilha Solteira : [s.n.], 2011. http://hdl.handle.net/11449/87063.
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Orientador: Nobuo Oki<br>Banca: Cláudio Kitano<br>Banca: Márcio Barbosa Lucks<br>Resumo: Referências de tensão integradas com baixa sensibilidade à temperatura, tensão de a- limentação e eventos transitórios são componentes críticos na maioria dos circuitos integra- dos. Neste trabalho, além das restrições costumeiras, foi adicionada a preocupação com a in- terferência eletromagnética a qual vem ganhando muita importância devido a crescente polui- ção eletromagnética no ambiente. Assim, neste trabalho, propõe-se o projeto de uma referên- cia de tensão tipo bandgap com baixa susceptibilidade a interferência eletromagnética (EMI). O projeto deste circuito baseia-se na soma de duas correntes (referência de tensão baseada em corrente), uma com coeficiente complementar a temperatura absoluta (CTAT) e outra com coeficiente proporcional à temperatura absoluta (PTAT), aplicada sobre um resistor. Neste projeto, a susceptibilidade a interferência eletromagnética de uma referência de tensão band- gap é estudada por meio de simulação. Projetada para ser fabricada com a tecnologia CMOS 0,35 μm da AMS (Autriamicrosystems), a referência forneceu uma tensão de referência está- vel de 1,354 V em sua saída operando normalmente na faixa de temperatura de -40 a 150oC. Quando submetido à EMI, o circuito exibiu apenas 24,7 mV (quando filtros capacitivos são incluído) de offset induzido, para um sinal de interferência variando de 150 kHz a 1 GHz<br>Abstract: Integrated voltage references with low sensitivity to temperature, supply voltage and transient events are critical requirements in the most of integrated circuits. In this work, be- sides the usual restrictions, was added to concern with electromagnetic interference which is gaining much importance due to increasing electromagnetic pollution on the environment. So, in this work, proposes the design of a bandgap voltage reference with low susceptibility to electromagnetic interference (EMI) is proposed. The design of the circuit is based on the sum of two currents (current-based voltage reference), one with coefficient complementary to ab- solute temperature (CTAT) and the other with coefficient proportional to absolute temperature (PTAT) into a resistor. In this work, the susceptibility to electromagnetic interference in a bandgap voltage reference is evaluated by simulations. Designed to be implemented in AMS (Autriamicrosystems) 0,35 μm CMOS process, the reference provides a stable voltage refer- ence equal to 1,354 V in the output working properly in the temperature range of -40 to 150oC. When EMI is injected, the circuit exhibits only 24,7 mV (when capacitive filters are included) of induced offset, for an interference signal varying in the frequency range of 150 kHz to 1 GHz<br>Mestre
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Raczkowycz, Julian. "Monolithic data converters and integrated voltage reference sources." Thesis, University of Huddersfield, 1989. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.290740.
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Mudroch, Michal. "Návrh nízkonapěťového napájecího a referenčního bloku založeného na teplotně stabilní napěťové referenci." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2019. http://www.nusl.cz/ntk/nusl-399479.
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In this diploma thesis there is elaborated design of low-voltage power supply block using I3T25 technology. The theoretical part describes the basic structures used in the design, using CMOS and bipolar devices. Furthermore, the properties and the analysis used in the evaluation are described. In the design part there is an elaborated design of individual parts, including voltage references, current references, DAC converter, operational amplifier. In the last part, the power supply block is subjected to simulations for verification of temperature compensated output variables and analyzed circuit functionality.
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Chan, Yiu Fai. "A new curvature-compensation technique for bandgap voltage reference." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk2/tape17/PQDD_0003/MQ28924.pdf.
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Schwartz, George N. (George Nelson) 1973. "A novel precision voltage reference using a micromechanical resonator." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/46269.
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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.<br>Includes bibliographical references (p. 112-113).<br>This thesis describes the analysis and design of a precision voltage reference (PVR) based upon a micromechanical resonator. The precision voltage reference consists of two closed loop controllers and a nonlinear resonator. The oscillator loop maintains oscillations in the resonator. The phase locked loop is a frequency control loop that locks the resonator frequency to an external frequency. The micromechanical device consists of a pair of resonators that are electrostatically driven and sensed in their out-of-plane vibrational resonance mode. The oscillating proof masses move on flexure beams and the resonator is configured for use as a voltage controlled oscillator within the phase locked loop. The first order stiffness coefficient has an electrostatic component that reduces the frequency of oscillation with increasing bias voltage applied to the resonator. The resonator's frequency sensitivity to voltage is realized by the first order, bias voltage dependent stiffness coefficient. The input bias voltage to the voltage controlled oscillator is the precision voltage reference. A prototype PVR device was constructed and the PVR operation confirmed. Results between a first order design analysis, advanced modeling, and the prototype are in good agreement. The error model indicates the baseline design for the micromechanical PVR achieves a total voltage stability below 0.4 parts per million (ppm) with temperature control of 0.1°C.<br>by George N. Schwartz.<br>S.M.
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Zhang, ZiHao. "A High Temperature Reference Voltage Generator with SiC Transistors." Thesis, Virginia Tech, 2016. http://hdl.handle.net/10919/72888.
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Natural resources are always collected from harsh environments, such as mines and deep wells. Currently, depleted oil wells force the gas and oil industry to drill deeper. As the industry drills deeper, temperatures of these wells can exceed 210 °C. Contemporary downhole systems have reached their depth and temperature limitations in deep basins and are no longer meet the high requirements in harsh environment industries. Therefore, robust electronic systems that can operate reliably in harsh environments are in high demand. This thesis presents a high temperature reference voltage generator that can operate reliably up to 250 °C for a downhole communication system. The proposed reference voltage generator is designed and prototyped using 4H-SiC bipolar transistors. Silicon carbide (SiC) is a semiconductor material that exhibits wide bandgap, high dielectric breakdown field strength, and high thermal conductivity. Due to these properties, it is suitable for high-frequency, high-power, and high-temperature applications. For bypassing the lack of high temperature p-type SiC transistors (pnp BJT, PMOS) and OpAmp inconvenience, an all npn voltage reference architecture has been developed based on Widlar bandgap reference concept. The proposed reference voltage generator demonstrates for the first time a functional high temperature discrete reference voltage generator that uses only five 4H-SiC transistors to achieve both temperature and supply independent. Measurement results show that the proposed voltage reference generator provides an almost constant negative reference voltage around -3.23 V from 25 °C to 250 °C regardless of any change in power supply with a low temperature coefficient (TC) of 42 ppm/°C.<br>Master of Science
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Lima, Luis Henrique Rodovalho de. "Amplifier topologies for ultra low voltage applications." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2016. http://hdl.handle.net/10183/147758.
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Aplicações móveis que não podem ser recarregadas durante operação, como sensores biomédicos e aplicações da Internet das Coisas, dependem da extração de energia do próprio meio onde se encontram. Tensões de alimentação típicas são normalmente maiores que as disponiveis por métodos de extração de energia do meio e requerem uma conversão de nivel DC que invariavelmente resulta em perdas proporcionais ao fator de conversão. Consequentemente, aplicações projetadas para tensões de alimentação mais próximas da tensão nominal da fonte melhora a eficiência energética. Entretanto, topologias de circuitos elétricos para tensões típicas de alimentação sao impróprias para tensões extremamente baixas. Neste trabalho foram propostas topologias de amplificadores de saída unipolar e diferencial para tensões de alimentaçãoo na casa de centenas de milivolts. As técnicas propostas se baseiam no uso de pares pseudodiferenciais com terminais de corpo polarizados diretamente para vários propósitos, incluindo rejeição de modo comum e polarização de modo comum de saída e corrente DC. Adicionalmente, um oscilador baseado na mesmas técnicas de polarização foi proposto e projetado para duas classes de aplicações: um oscilador de referência intrinsicamente estável e um oscilador controlado por tensão para conversão analógica-digital com melhor linearidade.<br>Nomadic applications which cannot be recharged while at operation, such as biomedical sensors and Internet of Things applications, rely on energy harvesting from the environment. Typical supply voltages are usually higher than those achieved by energy harvesting methods and requires DC-DC conversion levels, which invariably results in energy loss proportionally to the step of voltage conversion. Consequently, designing at supply voltages closer to the nominal voltage of the energy source improves power efficiency. However, extremely low supply voltages bring design challenges, as circuit topologies for typical voltages employ techniques not suitable for extremely low supply voltages. In this work, single ended and fully differential amplifier topologies for voltage supplies in the range of few hundreds mV were proposed. The proposed approaches use the pseudo differential pairs with the transistor bulk terminals with forward biasing voltages for several purposes, including common mode rejection, output common mode voltage and DC current biasing. Additionally, a ring oscillator based in the same biasing techniques was proposed and designed for two main classes of applications: an intrinsically stable reference oscillator and a voltage controlled oscillator for analog-digital conversion with linearity improvements.
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Kacafírek, Jiří. "Návrh přesné napěťové reference v ACMOS procesu." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2010. http://www.nusl.cz/ntk/nusl-218682.
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In this thesis the principle of voltage reference especially bangap reference is described. Below are described two circuits of this type designed in ACMOS process. There is handmade evaluation of error analysis to identify main error contributors and also monte-carlo simulation. Also statistical analysis is made on the circuit. Results of all methods are compared. Error of reference voltage is compared for both circuits. Circuit with bigger error is optimized to achieve a better precision. Obtained results showed a good agreement of all methods, which evidences importance of hand error evaluation.
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Herbst, Steven (Steven G. ). "A low-noise bandgap voltage reference employing dynamic element matching." Thesis, Massachusetts Institute of Technology, 2011. http://hdl.handle.net/1721.1/77071.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2011.<br>Cataloged from PDF version of thesis.<br>Includes bibliographical references (p. 109).<br>Bandgap voltages references are widely used in IC design, but are sensitive to low-frequency noise and component mismatch. This thesis describes the design and testing of a new IC voltage reference that targets these issues through three dynamic element matching (DEM) subsystems. The first is a chopper OTA, and the second two are component rotation schemes: one to exchange the positions of two critical resistors, and the second to cycle through all BJTs, periodically selecting each to participate as the "1" transistor of the N:1 bandgap ratio. Practical designs that address the various switching issues typically associated with DEM, such as glitch and clock drift, are described. Analytic expressions for the effects of noise and mismatch throughout the bandgap reference are derived, along with expressions for calculating the improvement that can be achieved by DEM. A test chip was implemented in a 0.25[mu]m BiCMOS process; with its three DEM subsystems enabled it is shown to achieve a 20x 1/f noise improvement and a 34x mismatch error improvement.<br>by Steven Herbst.<br>M.Eng.
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Cardoso, Adilson Silva. "Design and characterization of BiCMOS mixed-signal circuits and devices for extreme environment applications." Diss., Georgia Institute of Technology, 2014. http://hdl.handle.net/1853/53099.
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State-of-the-art SiGe BiCMOS technologies leverage the maturity of deep-submicron silicon CMOS processing with bandgap-engineered SiGe HBTs in a single platform that is suitable for a wide variety of high performance and highly-integrated applications (e.g., system-on-chip (SOC), system-in-package (SiP)). Due to their bandgap-engineered base, SiGe HBTs are also naturally suited for cryogenic electronics and have the potential to replace the costly de facto technologies of choice (e.g., Gallium-Arsenide (GaAs) and Indium-Phosphide (InP)) in many cryogenic applications such as radio astronomy. This work investigates the response of mixed-signal circuits (both RF and analog circuits) when operating in extreme environments, in particular, at cryogenic temperatures and in radiation-rich environments. The ultimate goal of this work is to attempt to fill the existing gap in knowledge on the cryogenic and radiation response (both single event transients (SETs) and total ionization dose (TID)) of specific RF and analog circuit blocks (i.e., RF switches and voltage references). The design approach for different RF switch topologies and voltage references circuits are presented. Standalone Field Effect Transistors (FET) and SiGe HBTs test structures were also characterized and the results are provided to aid in the analysis and understanding of the underlying mechanisms that impact the circuits' response. Radiation mitigation strategies to counterbalance the damaging effects are investigated. A comprehensive study on the impact of cryogenic temperatures on the RF linearity of SiGe HBTs fabricated in a new 4th-generation, 90 nm SiGe BiCMOS technology is also presented.
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Tran, Sung. "Development of a Sensor Readout Integrated Circuit Towards a Contact Lens for Wireless Intraocular Pressure Monitoring." DigitalCommons@CalPoly, 2017. https://digitalcommons.calpoly.edu/theses/1750.
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This design covers the design of an integrated circuit (IC) in support of the active contact lens project at Cal Poly. The project aims to monitor intraocular eye pressure (IOP) to help diagnose and treat glaucoma, which is expected affect 6.3 million Americans by 2050. The IC is designed using IBM’s 130 nm 8RF process, is powered by an on-lens thin film 3.8 V rechargeable battery, and will be fabricated at no cost through MOSIS. The IC features a low-power linear regulator that powers a current-starved voltage-controlled oscillator (CSVCO) used for establishing a backscatter communication link. Additional circuitry is included to regulate power to and from the battery. An undervoltage lockout circuit protects the battery from deep discharge damage. When recharging, a rectifier and a voltage regulator provides overvoltage protection. These circuit blocks are biased primarily using a 696 mV subthreshold voltage reference that consumes 110.5 nA.
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Kotrč, Václav. "Napěťové reference v bipolárním a CMOS procesu." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2015. http://www.nusl.cz/ntk/nusl-221111.
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This diploma thesis deals with precise design of Brokaw BandGap voltage reference comparing with MOS references. There is STEP BY STEP separation and analysis of proposed devices, using Monte Carlo analysis. There are also presented the methods for achieving a lower deviation of the output voltage for yielding device, which needs no trimming.
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Guimaraes, Geraldo C. "Computer methods for transient stability analysis of isolated power generation systems with special reference to prime mover and induction motor modelling." Thesis, University of Aberdeen, 1990. http://digitool.abdn.ac.uk/R?func=search-advanced-go&find_code1=WSN&request1=AAIU028173.
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This thesis aims to establish computer methods for the transient stability analysis of electric power systems which operate isolated from the large interconnected system. A typical isolated system is characterized by a compact network in which the size of the load is relatively large when compared to the total, installed generation capacity. The stability problems are thus more severe for this system than for the grid-type system. This results in the need for more accurate representations for the system components in the computer studies. This work considers particularly the prime mover and the induction motor modelling. The accurate modelling for turbo-charged diesel engines and single shaft gas turbines is considered first due to the significative presence of these types of prime movers in the isolated systems. The quasi-steady approach is adopted in the development of these models. The induction motor modelling is then dealt with and an accurate model which accounts for the deep-bar effects and includes the stator transients is presented. In addition, this work also investigates the possibility of substituting all these detailed models by simple, reduced models in the computer simulations since the latter pose less problem in assembling the necessary data than the former ones. Furthermore, some theoretical aspects for the representation of synchronous machines, automatic voltage regulators and transformers are included in the thesis. Some insight on the numerical integration method used in the stability program - the Trapezoidal implicit - is also given in the text with the advantages and disadvantages being stated. Several studies are shown in the thesis which aim firstly to compare the various models for prime mover and induction motor representations and secondly to test the complete simulation package when dealing with stability analyses of typical isolated systems.
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Caicedo, Jhon Alexander Gomez. "CMOS low-power threshold voltage monitors circuits and applications." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2016. http://hdl.handle.net/10183/144080.
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Um monitor de tensão de limiar (VT0) é um circuito que, idealmente, entrega o valor do VT0 como uma tensão na saída, para uma determinada faixa de temperatura, sem a necessidade de polarização externa, configurações paramétricas, ajuste de curvas ou qualquer cálculo subsequente. Estes circuitos podem ser usados em sensores de temperatura, referências de tensão e corrente, dosímetros de radiação e outras aplicações, uma vez que a dependência do VT0 nas condições de operação é um aspecto bem modelado. Além disso, estes circuitos podem ser utilizados para monitoramento de processos de fabricação e para compensação da variabilidade do processo, uma vez que o VT0 é um parâmetro chave para o comportamento do transistor e sua modelagem. Nesta tese, são apresentadas três novas topologias de circuitos, duas são monitores de VT0 NMOS e a terceira é um monitor de VT0 PMOS. As três estruturas são topologias de circuito auto-polarizadas que não utilizam resistências, e apresentam alta rejeição a variações na alimentação, baixa sensibilidade de Linea, e permitem a extração direta da tensão de limiar para grandes intervalos de temperatura e de tensão de alimentação, com pequeno erro. Sua metodologia de projeto é baseada no modelo unificado controlado por corrente (UICM), um modelo MOSFET que é contínuo, desde o nível de inversão fraca a forte e para as regiões de operação de triodo e saturação. Os circuitos ocupam uma pequena área de silício, consomem apenas dezenas de nanowatts, e podem ser implementados em qualquer processo padrão CMOS digital, uma vez que só utilizam transistores MOS (não precisa de nenhum resistor). Os monitores de VT0 são utilizados em diferentes aplicações, a fim de investigar a sua funcionalidade e comportamento como parte de um sistema. As aplicações variam de uma tensão de referência, que apresenta um desempenho comparável ao estado da arte, para uma configuração que permite obter uma menor variabilidade com processo na saída de um circuito auto-polarizado que gera um tensão CTAT. Além disso, explorando a capacidade de funcionar como um gerador de corrente específica (ISQ) que os monitores de VT0 aqui apresentados oferecem, introduz-se um novo circuito auto-polarizado que gera um tensão CTAT, que é menos sensível a variações de processo, e pode ser usado em referências de tensão band-gap.<br>A threshold voltage (VT0) monitor is a circuit that ideally delivers the estimated VT0 value as a voltage at its output, for a given temperature range, without external biases, parametric setups, curve fitting or any subsequent calculation. It can be used in temperature sensors, voltage and current references, radiation dosimeters and other applications since the MOSFET VT0 dependence on the operation conditions is a very well modeled aspect. Also, it can be used for fabrication process monitoring and process variability compensation, since VT0 is a key parameter for the transistor behavior and modeling. In this thesis, we present three novel circuit topologies, two of them being NMOS VT0 monitors and the last one being a PMOS VT0 monitor. The three structures are resistorless self-biased circuit topologies that present high power supply rejection, low line sensitivity, and allow the direct extraction of the threshold voltage for wide temperature and power supply voltage ranges, with small error. Its design methodology is based on the Unified Current Control Model (UICM), a MOSFET model that is continuous from weak to strong inversion and from triode to saturation regions. The circuits occupy small silicon area, consume just tens of nanoWatts, and can be implemented in any standard digital CMOS process, since they only use MOS transistors (does not need any resistor). The VT0 monitors are used in different applications in order to prove their functionality, and behavior as part of a system. The applications vary from a reference voltage, that presents performance comparable with state-of-the-art works, to a configuration that allows to obtain a lower process variability, in the output of a self-biased circuit that generates a complementary to the absolute temperature (CTAT) voltage. In addition, exploiting the ability to operate as an specific current (ISQ) generator, that the VT0 monitors presented here offer, we introduced a new self-biased circuit that produces a CTAT voltage and is less sensitive to process variations, and can be used in band-gap voltage references.
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Wang, Ru-Jie, and 王銣傑. "CMOS Voltage References without Resistors." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/77139533456387300631.
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碩士<br>輔仁大學<br>電子工程學系<br>95<br>This work presents two CMOS voltage references without resistors. The first one is a curvature-compensated bandgap reference without resistors in 0.18-μm CMOS technology. The circuit uses a new current generator circuit for higher order temperature terms curvature compensation and a PMOS voltage divider for scaling down the reference voltage. A 605.6mV output voltage is generated with a temperature coefficient of 1 ppm/°C from –40 to 125 °C. It dissipates 77μW at a supply voltage of 1.8-V. The second one is a low-voltage low-power bandgap voltage reference without using passive components. A reference voltage of 646.4 mV is generated with a temperature coefficient of 1.7 ppm/°C in the range [−40, +125] °C at 1.8-V supply voltage. A line sensitivity of 0.18 mV/V in the supply voltage range [+1, +1.8] V are achieved. It dissipates a maximum power of 4.9 μW at a 1.8-V supply voltage and 125 °C. The silicon area is as small as 100 × 50 μm2 in 0.18um CMOS process.
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PO-CHENGWEI and 魏柏丞. "A Highly Energy-Efficient and Reliable Physical Unclonable Function Based on Sub-threshold Voltage References with a Metastable Detection Mechanism." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/8862hd.
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Chang, Wuchang, and 張武昌. "Design of low-power band-gap voltage reference circuits for low supply voltages." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/63027796637562889403.
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碩士<br>國立中興大學<br>電機工程學系<br>90<br>Reference voltage generators are widely used in many applications from analog circuit to mixed-signal circuits such as ADC, DAC, DRAM and flash memories. These structures are required to provide a stable voltage reference with a low sensitivity to temperature and supply voltage. One of the most popular architecture is the band-gap reference (BGR). Due to the need of battery-operated systems for portability, low supply voltages and low power consumption will be the trends in future VLSI products. Two new band-gap reference (BGR) circuits operated at low supply voltages using 0.6mm CMOS technology are presented in this thesis. The chip area of the new BGR circuit is small. The operation voltage can be down to 1.2V, while the reference voltage (Vref) can be set to almost any values. The deviation of Vref is less than 18ppm/ o C for the temperature range from -40°C to 125°C. In order to reduce the current consumption, we propose to use switches to control the BGR circuit connected or disconnected with power supplies. When the system is in power-saving mode, the BGR circuit is disconnected from power supplies to reduce the current consumption.
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Chen, Shin-Liang, and 陳信良. "Temperature and supply voltage independent current reference and voltage reference." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/07939159195316351904.
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碩士<br>北台科學技術學院<br>機電整合研究所<br>93<br>This paper presents two kinds of current references which are insensitive to supply voltage and without using resistors. The first current reference is composed of a positive supply voltage coefficient circuit and a negative supply voltage coefficient circuit. The positive supply voltage coefficient circuit exhibits the characteristic that the output current will increase as the supply voltage rises. However, the negative supply voltage coefficient circuit possesses the characteristic that the output current will decrease as the supply voltage rises. By combining these two components with adding operation, the supply voltage coefficient will be cancelled to zero and the output current will reject the variation of supply voltage. In addition, the second current reference is composed of two positive supply voltage coefficient circuits with subtraction operation. The output current of this current reference will also be insensitive to supply voltage. These two current references will be insensitive to supply voltage and identified not only by HSPICE simulation but also by the measured data from an integrated prototype. By applying the current references and the theory of the bandgap reference, we can derive a voltage reference insensitive to supply voltage and temperature.
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Mastovich, Stefan Noel. "A voltage reference using a temperature-dependent current to bias a junction diode." 2012. http://hdl.handle.net/2152/19702.
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Bandgap voltage-reference circuits generate an appropriate amount of a voltage that varies proportionately to absolute temperature (called PTAT), to cancel the complementary to absolute temperature voltage variation (known as CTAT) of a current biased p-n junction diode so that the sum of the two voltages remains constant with respect to temperature. The bandgap voltage of Silicon is approximately 1.1V. It is inconveniently large to generate and use in short-channel circuits where the supply voltage is limited 1.2V. So the idea presented here is to maintain a constant reference voltage of around half the supply voltage (700mV) across a junction diode. A simple circuit for generating the bias current with appropriate temperature dependence for biasing a diode is presented. Simulation results in 55 nanometer technology demonstrate the feasibility of this scheme. The performance that is achievable is a reference voltage with less than 1 percent variation in the temperature range of 0 to 100 degrees C.<br>text
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Cheng, Chin-Hung, and 鄭欽鴻. "Bandgap Reference Voltage Generator." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/10794634026978236467.
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碩士<br>國立臺灣大學<br>電子工程學研究所<br>92<br>Precision voltage reference plays an important role in modern integrated circuits systems. It can produce a stable reference voltage insensitive to the variations of supply voltage and temperature. Voltage references are widely adopted in many integrated circuits, such as A/D or D/A converters, operational amplifiers, and linear regulators. They are used for defining input/output voltage range, biasing current source of differential pairs, and providing a comparison reference for comparators, etc.
The objective of this thesis is to design a bandgap reference voltage generator with input voltage 3V to 6V and output voltage around 1.25V. This reference voltage is intended for using in low dropout linear regulators (LDO). A pre-regulator circuit feeds the bandgap circuit with a regulated 2V to lower the supply voltage sensitivity. A new bandgap circuit topology is also presented. The final bandgap reference with supply voltage sensitivity less than 0.3 mV/V, and temperature coefficient around 7 ppm/℃, and power consumption lower than 100μW is achieved.
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Chang, Ting-Wei, and 張庭瑋. "CMOS current reference and voltage reference design." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/53278481139150247466.
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碩士<br>北台科學技術學院<br>機電整合研究所<br>94<br>This paper presents some new circuits including CMOS circuit reference and voltage reference.
The architecture of the current references is produced not only by adding a positive supply voltage coefficient current reference and a negative supply voltage coefficient current reference to cancel out the supply voltage variations but also by adding a positive temperature coefficient current reference and a negative temperature coefficient current reference to cancel out the temperature variation. About the negative supply voltage coefficient current reference, we can product it by subtracting two current references with different positive supply voltage coefficient.
This paper also presents a sub-1v voltage reference, which is different from the traditional bandgap reference. The main architecture of the voltage reference is composed of a positive temperature coefficient voltage reference and a negative temperature coefficient voltage reference. At first, by putting two different bias voltage of the bipolar junction transistors into the differential pair and adjusting the transistor size, we can obtain a voltage reference with a positive temperature coefficient; Secondly, by putting a ground voltage and a bias voltage of the bipolar junction transistors into the differential pair and adjusting the transistor size, we can obtain a voltage reference with a negative temperature coefficient. Finally, by putting the positive coefficient voltage reference and the negative temperature coefficient voltage reference into the differential pair and adjusting the transistor size, we can obtain a voltage reference with less sensitive to temperature variation.
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Wang, Suo-Wei, and 王碩瑋. "Analysis And Design Of CMOS Voltage Reference Circuits In Subthreshold Operations For Ultra Low Supply Voltages." Thesis, 2007. http://ndltd.ncl.edu.tw/handle/25225230950184341638.
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碩士<br>長庚大學<br>電子工程研究所<br>95<br>For a conventional Bandgap voltage reference circuit, the output voltage (Vref) is the BJT base-emitter junction voltage (VBE) plus the thermal voltage VT(KT/q) multiplied by a constant. Therefore, its value is about 1.25V, which limits a low supply voltage operation below 1V. Moreover, low voltage Bandgap voltage reference circuits are limted to the threshold voltages of BJT and MOS (VBE=0.7V,VTH=0.5V by TSMC 0.18um process), therefore they can not work under 0.5V.
This thesis proposes a CMOS voltage reference circuit, which can successfully operate with sub-0.5V supply voltage.In the proposed circuit,the major structure is a Widlar current mirror. All transistors are biased in subthreshold region and VGS in subthreshold region decreases with the temperature. By combining positive and negative temperature coefficient voltages and large resistances, the reference voltage independent of the temperature can be obtained.
Based on post-layout simulations(VDD=0.5V,Vref=242mV), the variation of the reference voltage is about 1.25mV(57.85ppm) in the temperature range from -40 to 120°C. There are only 5 transistors and 4 resistors in the CMOS voltage reference circuit structure. And the lowest working voltage is 0.45V.
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Liu, Chzung-Tai, and 劉宗泰. "The study of low voltage bandgap voltage reference circuit." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/37524136168903290293.
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Huang, Kuei-Chen, and 黃癸禎. "Tempeature-Stable Voltage Reference, Transconductor, and Voltage-Controlled Oscillator." Thesis, 2000. http://ndltd.ncl.edu.tw/handle/80295709853083861334.
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碩士<br>國立彰化師範大學<br>工業教育學系<br>88<br>In the recent years, small size, light weight, and reliable operation in any environment have become the basic requirement in the electronic products such as personal communication systems and notebooks. But smaller feature sizes, higher packing density and rising power consumption lead to dramatic temperature increases in current high-performance VLSI circuits. To achieve stable performance of circuits, we should consider the influence of the temperature variation in the circuit design. In this thesis, we focus on the performance of the voltage reference, transconductor, and voltage-controlled oscillator versus the temperature variations. And we will provide several ways to compensate the influence of temperature drift. Using these compensation circuits, the temperature-stable voltage reference, transconductor, and voltage-controlled oscillator can be obtained.
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Hsu, Kang-Yu, and 徐康禹. "Current Mode Bandgap Voltage Reference." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/xxdacb.
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碩士<br>逢甲大學<br>電機工程所<br>90<br>The objective of this thesis is to design a bandgap voltage reference that can be operated in the range from 3.3V to 5V. The main work is to design a circuit that utilizes a PTAT (proportional to absolute temperature) to compensate the negative temperature coefficient resulting from BJT. The ordinary bandgap voltage reference requires an operational amplifier to stabilize the output voltage. As a result, the circuit will consequently consume considerable area and power dissipation. To circumvent these problems, we propose a current mode bandgap voltage reference, which will not only decrease the temperature effect, but also significantly reduce the power consumption. The proposed current mode bandgap voltage reference can regulate a stabilized output voltage and maintain an excellent resistance to other external variables. Moreover, the output voltage is adjustable by external resistors. Many capability of this design has shown to be superior to those using operational amplifier as feedback.
Our circuit is fabricated bt UMC 0.5μm double-poly triple-metal N-well CMOS process.
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Wu, Yi-Ping, and 吳一平. "Low Temperature-Coefficient Reference Voltage." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/pswyun.
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碩士<br>國立虎尾科技大學<br>電子工程系碩士班<br>103<br>This thesis is related to the design of cascade low temperature-coefficient reference voltage. The design principle is using both the positive and the negative temperature-coefficient parameters in BJT to compensate each other, and then a zero temperature-coefficient output reference voltage can be achieved. Two different circuit architectures have been simulated and discussed. As compared with the existed reference voltage circuits, the proposed circuits benefit from simpler circuit architecture, less chip area, and also there are no operational amplifiers included in the proposed circuits.
Detailed design principle has been disclosed in this thesis, and the HSPICE and LAKER simulation programs with 0.35-μm process parameters have been used to perform the layout and implement the circuits. According to the post-layout simulation results, where the supply voltage is 5V and the temperature ranges from -20°C-120°C, after first order temperature-compensation, as the output reference voltage is 3.014V, the maximum output voltage variation is 2.568mV, and when the output reference voltage is 2.495V, the maximum output voltage variation is 1.772mV, and finally if the output reference voltage is 1.249V, the maximum output voltage variation is 1.192mV. The corresponding power dissipation is 0.891mW. After second order temperature-compensation, the output reference voltage can be 2.489V with the maximum output voltage variation of only 1.127mV, and 1.127V with the maximum output voltage variation of 0.589mV. The corresponding power dissipation is 0.954mW.
All the simulation results are consistent with the theoretic analysis. The proposed low temperature-coefficient reference voltage circuits can be applied to vehicle electronic devices design and other digital and analog circuits.
Keywords: temperature coefficient, cascode, current mirror, reference voltage.
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Chia, Jr-Yung, and 賈志勇. "Micro Power Low Voltage Bandgap Reference." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/09338594754044322158.
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碩士<br>中原大學<br>電子工程研究所<br>94<br>Abstract
Three micro power low voltage bandgap references are presented. These complete designs were simulated and laid out in a standard digital 0.18-µm 1P6M 1.8V CMOS process and operated at 1.5V power supply. A micro power folded cascode operational transconductance amplifier is also presented for these micro power bandgap references.
A micro power bandgap voltage reference uses a micro power amplifier to keep a balance condition, and provides a 1.2086V 2.3mV bandgap voltage, a temperature coefficient of 48.7 ppm/℃ over a temperature range from 0 to 60℃ from a measured statistics. The operated chips of this reference consume a mean power dissipation of 43.1µW.
Another micro power low bandgap voltage reference uses independent circuits of biasing and start-up in internal amplifier to obtain more reliability, and provides a 603.9mV 1.8mV bandgap voltage, a temperature coefficient of 72.8 ppm/℃ over a temperature range from 0 to 60℃ from a measured statistics. The measured chips can be operated a minimum supply voltage of sub-1V and consume a mean power dissipation of 49.1µW. Moreover, a micro power bandgap current reference utilized a compensated technology of two branch current was presented in this thesis. In a block circuit with a feedback noise issue, the improved bandgap current reference is able to restrain noise feedback and keep current supply stably. In this design, the reference output current is 300µA within a temperature coefficient of 16 ppm/℃.
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Chiang, Tzung-Yin, and 江宗殷. "Temperature-compensated CMOS voltage reference circuit." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/07003708814603618036.
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碩士<br>國立清華大學<br>工程與系統科學系<br>93<br>Reference circuits have been studying for many years. Following the vigorous development of portable electronic products, integrated circuits with low voltage and small area have become the core part of the recent research. Parasitic vertical bipolar junction transistors are commonly used in CMOS voltage reference circuits for a better stability. Recently, MOS reference circuits have been used to replace BJT ones in order to reduce the chip area and supply voltage. Whether BJT or MOS is utilized, the problem that resistances parallelizing on either side of BJT or MOS generally occupy quite large ratio of chip area under the consideration of power consumption and loading parasitic capacitances of op-amp still exists. Another problem worthy of our concern is that spurious signals coming from the supply voltage cannot be adequately rejected and may couple into the circuit to degrade output signal in high frequency applications.
This thesis aims to improve the above problems and proposes a novel voltage reference circuit. A current mirror is designed for temperature compensation and large resistors are defeasible for reduction chip area. Besides, it has been implemented by a 0.18 μm CMOS process with a chip area of 0.023 mm2. Simulation shows that the variation of temperature coefficient is from 59.5 to 63.8 ppm/℃ under the temperature range from -40 to 100 ℃ and a supply voltage variation from 1.2 to 1.98 V. The power noise rejection ratio is -70 dB at 10 kHz with 1.2V supply voltage. In summary, the thesis adopts a current mirror to achieve low-temperature-drift reference voltage and abandons large resistances on design consideration. With this approach, power noise rejection ration is reduced.
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Chen, Suheng. "Low-power switched capacitor voltage reference." 2009. http://etd.utk.edu/2009/Spring2009Dissertations/ChenSuheng.pdf.
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Liao, Jia-Zheng, and 廖家正. "Design of A CMOS Reference Voltage." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/3h6nk8.
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碩士<br>國立虎尾科技大學<br>電子工程系碩士班<br>101<br>In this thesis, a CMOS differential-mode reference voltage circuit has been proposed. By properly using the positive and negative temperature coefficient parameters, a zero temperature-coefficient can be achieved. The proposed circuits are based on the traditional bandgap voltage reference circuit architecture with an additional current mirror and a proportional-to-absolute-temperature current source which is composed of current mirrors. As compared with the existed differential-mode reference voltage circuit, the proposed circuit does not need an operational amplifier, therefore it benefits from simpler circuit architecture, less chip area, and less power consumption. Besides the detailed design principle, the HSPICE and LAKER simulation program with 0.35-um and 0.18-um process parameters have been used to perform the pre-layout and post-layout simulation. According to the post-layout simulation results, as the supply voltages is 3.3V, the differential-mode output voltage reference circuit shows that, as the temperature varies from -20oC to 120oC, the corresponding output voltage changes only 1.3mV(0.225%), the corresponding power dissipation is 2.354mW and the temperature-coefficient is 16.11 ppm/˚C. In addition, if a transistor and a resistor are removed from the proposed differential-mode output voltage reference circuit, a single-ended mode reference voltage with zero temperature coefficient can be obtained. According to the post-layout simulation results, when the supply voltages is 2.8V, and as the temperature varies from -20oC to 120oC, the corresponding output voltage changes only 2.01mV(0.387%), the corresponding power dissipation is 1.412mW and the temperature-coefficient is 27.79 ppm/˚C.
All the simulation results are consistent with the theoretic analysis. The proposed circuits can be applied to different analog circuits.
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Shih, Jia-Hao, and 施家豪. "Design of Low-Power Reference Voltage." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/q3kxxf.
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碩士<br>國立虎尾科技大學<br>電子工程系碩士班<br>101<br>In this thesis, two low-power differential-mode reference voltage circuits have been proposed. The design principle is based on the low-power dissipation characteristic and the exponential relationship between the voltage and the current of the MOSFET in sub-threshold region, When the NMOS transistor is operating in the sub-threshold region, appropriately adjust the positive and negative temperature coefficients, a zero temperature coefficient reference voltage circuit can be realized. As compared with the existed differential mode reference voltage circuit, the proposed circuit benefits from low-power consumption, simpler circuit architecture, and less chip area. In this thesis, detailed design principle has been disclosed, also the HSPICE and LAKER simulation program with 0.35-um and 0.18-um process parameters have been used to do the pre-layout and post-layout simulation. According to the post-layout simulation results, under the supply voltage of 1.8V, the first proposed improved CMOS reference voltage circuit shows that, as the temperature varies from -20oC to 120oC, the corresponding output voltage changes only 2mV, the power dissipation is only 4.5959uW and the temperature-coefficient is 18.40 ppm/˚C. The simulation results of the second proposed reference voltage circuit shows that, under the supply voltage of 2.1V, the temperature is varies from -20˚C to 120˚C, the output voltage changes 3mV, the power dissipation is only 21.516uW and the temperature coefficient is 29.22 ppm/˚C.
Both the simulation results are consistent with the theoretic analysis. The proposed circuit can be applied to medical instruments and other analog circuits.
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Ho, Guan-Ru, and 何官儒. "Design of Multi-Output Reference Voltage." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/6satz3.
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碩士<br>國立虎尾科技大學<br>電子工程系碩士班<br>103<br>This thesis is related to the design of multi-output reference voltage. The design principle is using both the positive and the negative temperature-coefficient parameters in BJT to compensate each other, and then a zero temperature-coefficient output reference voltage can be achieved. Two different circuit architectures have been simulated and discussed. As compared with the existed reference voltage circuits, the proposed circuits benefit from simpler circuit architecture, less chip area, and lower temperature-coefficient.
Detailed design principle has been disclosed in this thesis, and the HSPICE and LAKER simulation programs with 0.35-μm process parameters have been used to perform the layout and implement the circuits. According to the post-layout simulation results, where the supply voltage is 5V and the temperature ranges from -20°C-120°C, after the first order temperature-compensation the corresponding output reference voltage is 2.965V and 1.483V, the maximum output voltage variation is 0.78mV and 0.38mV, the corresponding power dissipation is 1.3925mW. Also, after second order temperature-compensation, the corresponding output reference voltage can be 3.056V and 1.53V, the maximum output voltage variation is only 2.54mV and 1.24mV, the corresponding power dissipation is 2.6554mW.
All the simulation results are consistent with the theoretic analysis. The proposed low temperature-coefficient reference voltage circuits can be applied to vehicle electronic devices design and other digital and analog circuits.