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Journal articles on the topic 'Voltage references'

Author: Grafiati

Published: 4 June 2021

Last updated: 27 January 2023

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1

Merev, Ahmet, and Jari K. Hallstrom. "A Reference System for Measuring High-DC Voltage Based on Voltage References." IEEE Transactions on Instrumentation and Measurement 64, no. 1 (2015): 184–89. http://dx.doi.org/10.1109/tim.2014.2338673.

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2

POPA, COSMIN. "LOGARITHMICAL CURVATURE-CORRECTED VOLTAGE REFERENCES WITH IMPROVED TEMPERATURE BEHAVIOR." Journal of Circuits, Systems and Computers 18, no. 03 (2009): 519–34. http://dx.doi.org/10.1142/s0218126609005253.

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Two voltage reference circuits will be presented. For the first circuit, the linear compensation of V GS (T) for an MOS transistor in subthreshold region will be realized using an original offset voltage follower block as PTAT voltage generator, with the advantages of reducing the silicon area and of increasing accuracy by replacing matched resistors with matched transistors. A new logarithmic curvature-correction technique will be implemented using an asymmetric differential amplifier for compensating the logarithmic temperature dependent term from V GS (T). Because of the operation in weak inversion of all MOS transistors, the circuit will have a very small current consumption, making it compatible with low-power low-voltage designs. The simulated temperature coefficient of the reference voltage for V DD = 2.5 V and a temperature range 0 < t < 30° C is 36.5 ppm/K, confirming the theoretical estimations. The variation of the reference voltage with respect to the supply voltage is 1.5 mV/V for 2–4 V. The circuit current consumption is about 1 μA and the minimal supply voltage is 2 V. The main goal of the second proposed voltage reference is to improve the temperature behavior of a previous reported bipolar voltage reference, by replacing the bipolar transistors with MOS transistors working in weak inversion, with the advantage of obtaining the compatibility with CMOS technology. The new proposed curvature-correction technique will be based on the compensation of the nonlinear temperature dependence of the gate-source voltage for a subthreshold operated MOS transistor by a correction current obtained by taking the difference between two gate-source voltages for MOS transistors biased at drain currents with different temperature dependencies. The circuit is implemented in 0.35 μm CMOS technology. The SPICE simulation confirms the theoretical estimated results, reporting a temperature coefficient of 4.23 ppm/K for the commercial temperature range, 0 < t < 70° C and a small supply voltage, V DD = 2.5 V . The variation of the reference voltage with respect to the supply voltage is 0.9 mV/V for 2–4 V.

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3

Egorychev, L. N. "Improving the output voltage reproducibility of dc voltage references." Measurement Techniques 32, no. 4 (1989): 361–62. http://dx.doi.org/10.1007/bf00866636.

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4

Pandey, Brajesh, and A. N. Chandorkar. "Precision Low Voltage and Current References." Journal of Low Power Electronics 3, no. 2 (2007): 167–74. http://dx.doi.org/10.1166/jolpe.2007.127.

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5

Vukadinović, Dinko, and Mateo Bašić. "A Stand-Alone Induction Generator with Improved Stator Flux Oriented Control." Journal of Electrical Engineering 62, no. 2 (2011): 65–72. http://dx.doi.org/10.2478/v10187-011-0011-5.

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A Stand-Alone Induction Generator with Improved Stator Flux Oriented ControlThis paper presents an improved stator flux oriented (SFO) control system for a stand-alone induction generator. The induction generator supplies a variable resistive dc load. In order to provide an essentially constant terminal voltage, the product of the rotor speed and the stator flux reference should remain constant. However, in this case the control system is not able to function properly at different loads and dc-link voltages. In this paper, we introduce a new algorithm in which this product is constant at certain dc-load and dc-link voltage references. The dependence of the stator flux reference on the dc load and dc voltage reference is mapped using an artificial neural network (ANN). We also present an analysis of the efficiency of the SFO control system, as well as its performance during transients, over a wide range of both dc-link voltage references and loads. The validity of the proposed approach is verified by realistic simulation in a Matlab-Simulink environment.

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6

Pflueger, R. J. "New RTD-boostrapped current and voltage references. I. Self-bootstrapped references." IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications 41, no. 11 (1994): 740–43. http://dx.doi.org/10.1109/81.331527.

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7

Pflueger, R. J. "New RTD-bootstrapped current and voltage references. II. Mirror-based references." IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications 41, no. 11 (1994): 744–47. http://dx.doi.org/10.1109/81.331528.

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8

Abesingha, B., G. A. Rincon-Mora, and D. Briggs. "Voltage shift in plastic-packaged bandgap references." IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing 49, no. 10 (2002): 681–85. http://dx.doi.org/10.1109/tcsii.2002.806734.

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9

Degrauwe, M. G. R., O. N. Leuthold, E. A. Vittoz, H. J. Oguey, and A. Descombes. "CMOS voltage references using lateral bipolar transistors." IEEE Journal of Solid-State Circuits 20, no. 6 (1985): 1151–57. http://dx.doi.org/10.1109/jssc.1985.1052453.

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10

Bounouh, Alexandre, Henri Camon, and Denis Belieres. "Wideband High Stability MEMS-Based AC Voltage References." IEEE Transactions on Instrumentation and Measurement 62, no. 6 (2013): 1646–51. http://dx.doi.org/10.1109/tim.2012.2225963.

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11

Shetler, K. J., N. M. Atkinson, W. T. Holman, et al. "Radiation Hardening of Voltage References Using Chopper Stabilization." IEEE Transactions on Nuclear Science 62, no. 6 (2015): 3064–71. http://dx.doi.org/10.1109/tns.2015.2499171.

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12

Fiori, F., and P. S. Crovetti. "Investigation on RFI effects in bandgap voltage references." Microelectronics Journal 35, no. 6 (2004): 557–61. http://dx.doi.org/10.1016/j.mejo.2003.11.002.

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13

Homulle, Harald, Fabio Sebastiano, and Edoardo Charbon. "Deep-Cryogenic Voltage References in 40-nm CMOS." IEEE Solid-State Circuits Letters 1, no. 5 (2018): 110–13. http://dx.doi.org/10.1109/lssc.2018.2875821.

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14

Zharkin, A. F., S. O. Palachov, A. G. Pazieiev, and D. O. Malakhatka. "DETERMINATION OF OPTIMAL CHARACTERISTICS OF DEVICES FOR VOLTAGE UNBALANCE REDUCING IN LOW VOLTAGE ELECTRIC NETWORKS." Tekhnichna Elektrodynamika 2020, no. 6 (2020): 43–46. http://dx.doi.org/10.15407/techned2020.06.043.

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Ways of searching for optimal ways to improve the quality of electric energy in electric networks with dispersed unbalanced loads using zero-sequence current filters are considered, which take into account the possibility of ensuring the desired performance with minimal cost and taking into account the peculiarities of operation in emergency network conditions and ensuring electrical safety of consumers. Corresponding calculations were carried out using simulation modeling. References 6, figures 4.

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15

Shangzhi Pan and P. K. Jain. "A New Digital Adaptive Voltage Positioning Technique with Dynamically Varying Voltage and Current References." IEEE Transactions on Power Electronics 24, no. 11 (2009): 2612–24. http://dx.doi.org/10.1109/tpel.2009.2030807.

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16

Lee, Min Chin, and Chi Jing Hu. "A CMOS Bandgap References Voltage Circuit Using Current Conveyor for Power Management Applications." Applied Mechanics and Materials 385-386 (August 2013): 1335–39. http://dx.doi.org/10.4028/www.scientific.net/amm.385-386.1335.

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This paper proposes a low power bandgap reference voltage circuit that provides an output reference voltage close to the bandgap voltage having a low output resistance and allows resistive loading. This proposed circuit is design and implemented using the TSMC 0.18μm 1P6M CMOS process. Simulation and measured results verify that the chip size is with power dissipation about 0.1mW, and the operation temperature range formwith temperature coefficient about . The chip supply voltage can from 1.3 to 1.8V with PSRR about 70 dB, and its output reference voltage can stable on .

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17

Fleddermann, R., M. Trobs, F. Steier, G. Heinzel, and K. Danzmann. "Intrinsic Noise and Temperature Coefficients of Selected Voltage References." IEEE Transactions on Instrumentation and Measurement 58, no. 6 (2009): 2002–7. http://dx.doi.org/10.1109/tim.2008.2006133.

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18

Manetakis, K. "CMOS micro-power output stage for integrated voltage references." Electronics Letters 40, no. 15 (2004): 917. http://dx.doi.org/10.1049/el:20045366.

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19

Meijer, G. C. M., Guijie Wang, and F. Fruett. "Temperature sensors and voltage references implemented in CMOS technology." IEEE Sensors Journal 1, no. 3 (2001): 225–34. http://dx.doi.org/10.1109/jsen.2001.954835.

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20

Deng, Junli, Yuan Mao, and Yun Yang. "Distribution Power Loss Reduction of Standalone DC Microgrids Using Adaptive Differential Evolution-Based Control for Distributed Battery Systems." Energies 13, no. 9 (2020): 2129. http://dx.doi.org/10.3390/en13092129.

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With high penetrations of renewable energy sources (RES), distributed battery systems (DBS) are widely adopted in standalone DC microgrids to stabilize the bus voltages by balancing the active power. This paper presents an Adaptive Differential Evolution (ADE)-based hierarchical control for DBS to achieve online distribution power loss mitigation as well as bus voltage regulations in standalone DC microgrids. The hierarchical control comprises two layers, i.e., ADE for the secondary layer and local proportional-integral (PI) control for the primary layer. The secondary layer control provides the bus voltage references for the primary control by optimizing the fitness function, which contains the parameters of the bus voltage deviations and the power loss on the distribution lines. Simultaneously, the state-of-charge (SoC) of the battery packs are controlled by local controllers to prevent over-charge and deep-discharge. Case studies using a Real-Time Digital Simulator (RTDS) validate that the proposed ADE-based hierarchical control can effectively reduce the distribution power loss and regulate the bus voltages within the tolerances in DC microgrids.

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21

Nguyen, Thanh Hai, Tan Luong Van, Asif Nawaz, and Ammar Natsheh. "Feedback Linearization-Based Control Strategy for Interlinking Inverters of Hybrid AC/DC Microgrids with Seamless Operation Mode Transition." Energies 14, no. 18 (2021): 5613. http://dx.doi.org/10.3390/en14185613.

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This study proposes an advanced control scheme for the interlinking inverters of the hybrid AC/DC microgrids, which facilitates a seamless transition between grid-connected and stand-alone/islanding modes for the microgrid. Due to a nonlinear relationship between the terminal voltages of the voltage-source inverter (VSI) interfacing through inductor–capacitor (LC) filters with the grid voltages and currents, a feedback linearization technique (FLT) is employed to control the interlinking VSI under both grid-connected and islanding operations. The FLT-based current controllers are applied in the grid-connected mode, in which they adjust the power exchange between the DC and AC subgrids and mitigate the distortion of the grid currents produced by nonlinear loads. Under the stand-alone operation, the AC bus voltages are directly regulated by the FLT-voltage controllers of the interlinking VSI. In order to reduce the inrush currents and voltage overshot at the instant of mode switching, the FLT-based controllers are performed all the time regardless of the operating modes, where the voltage references for the VSI are not changed abruptly. The control performance of the VSI is highly satisfactory with low-transient overshoot values of the voltages and currents and low total harmonic distortion (THD) values of the grid currents and AC bus voltages are about 3.5% and 2.7%, respectively, under the nonlinear load condition. The validity of the new control strategy is verified by the simulation work, which investigates the operation of a hybrid AC/DC microgrid.

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22

Velychko, Oleh. "Linking results of key and supplementary comparisons of AC/DC voltage transfer references." International Journal of Metrology and Quality Engineering 9 (2018): 4. http://dx.doi.org/10.1051/ijmqe/2018002.

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A regional key comparison (KC) COOMET.EM-K6.a and a supplementary comparison (SC) COOMET.EM-S1 of AC/DC voltage transfer references were conducted between participating laboratories from the Eurasian region. Measurements were made over the period 2004–2014. The results showed good agreement between all but one of the participating laboratories. The proposed procedure of linking results of key and SCs of regional metrology organization of AC/DC voltage transfer references is presented. Linking results is realized for COOMET.EM-K6.a and CCEM-K6.a KCs, and for COOMET.EM-K6.a KC and COOMET.EM-S1 SC.

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23

Colombo, Dalton, Christian Fayomi, Frederic Nabki, Luiz F. Ferreira, Gilson Wirth, and Sergio Bampi. "A Design Methodology Using the Inversion Coefficient for Low-Voltage Low-Power CMOS Voltage References." Journal of Integrated Circuits and Systems 6, no. 1 (2011): 7–17. http://dx.doi.org/10.29292/jics.v6i1.333.

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This paper presents an analog design methodology, which uses the selection of the inversion coefficient of MOS devices, to design low-voltage and low-power (LVLP) CMOS voltage references. The motivation of this work comes from the demand for analog design methods that optimize the sizing process of transistors working in subthreshold operation. The advantage of the presented method – compared to the traditional approaches for circuit design – is the reduction of design cycle time and the minimization of simulation iterations when the proposed equations are used. As a case study, a LVLP voltage reference based on subthreshold MOSFETs with a supply voltage of 0.7 V was designed in a 0.18-μm CMOS technology.

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24

Xiao, Muxuan, Feng Wang, Zhixing He, Honglin Ouyang, Renyifan Hao, and Qianming Xu. "Power Control and Fault Ride-Through Capability Analysis of Cascaded Star-Connected SVG under Asymmetrical Voltage Conditions." Energies 12, no. 12 (2019): 2361. http://dx.doi.org/10.3390/en12122361.

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The cascaded H-bridge static var generator (SVG) has been employed to provide reactive power and regulate grid voltages for many years because of its good modularity, easy scalability, and improved harmonic performance. A novel cluster-balancing power control method combining negative-sequence currents and zero-sequence voltage is proposed to redistribute the unbalanced active powers and eliminate the power oscillation under asymmetrical conditions. Simultaneously, the dynamic performance of the SVG power balance control can be improved under asymmetrical conditions with the zero-sequence voltage expression derived in this paper. On the basis of the proposed method, the fault ride through capability of star-connected SVG under asymmetrical conditions is compared among active power oscillation elimination (APOE), reactive power oscillation elimination (RPOE), and balanced positive sequence current (BPSC) injection references calculation strategies from the perspective of the zero-sequence voltage, maximum phase voltage, and maximum phase current. The method provides the theoretical reference for power control under asymmetric conditions and the analysis results show that under asymmetrical conditions, the current of BPSC is minimal and symmetrical, while the RPOE has the least voltage and no zero- sequence voltage needs to be injected. Finally, the results of simulation and experiment have been given to verify the theoretical studies.

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25

Vera Casañas, César William, Thainann Henrique Pereira de Castro, Gabriel Antonio Fanelli de Souza, Robson Luiz Moreno, and Dalton Martini Colombo. "Review of CMOS Currente References." Journal of Integrated Circuits and Systems 17, no. 1 (2022): 1–9. http://dx.doi.org/10.29292/jics.v17i1.592.

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A current reference is able to provide a precise and accurate current for other circuits inside a chip. This type of electronic circuit is employed as a building block in numerous analog and mixed-signal circuits. Moreover, it is a fundamental component of current-mode circuits. This work discusses the basic and essential concepts of designing CMOS integrated current references. A review of conventional topologies is presented, including current mirrors and current references. Temperature dependence is discussed, along with PTAT and CTAT topologies, and some low-power/low-voltage implementations are also presented.

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26

Pati, Swagat, Kanungo Barada Mohanty, and Sanjeeb Kumar Kar. "Performance improvement of a STATCOM using fuzzy controller for isolated generator." World Journal of Engineering 15, no. 2 (2018): 273–82. http://dx.doi.org/10.1108/wje-06-2017-0149.

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Purpose This paper aims to demonstrate the efficacy of fuzzy logic controller (FLC) over proportional integral (PI) and sliding mode controller (SMC) for maintaining flat voltage profile at the load bus of a single-generator-based micro-grid system using STATCOM. Design/methodology/approach A STATCOM is used to improve the voltage profile of the load bus. The performance of the STATCOM is evaluated by using three different controllers: PI controllers, FLCs and SMCs. The performance comparison of the controllers is done with different dc bus voltages, different load bus voltage references, various loads such as R-L loads and dynamic loads. Findings A comparative analysis is done between the performances of the three different controllers. The comparative study culminates that FLC is found to be superior than the other proposed controllers. SMC is a close competitor of fuzzy controller. Originality/value Design of fuzzy logic and SMCs for a STATCOM implemented in a single-generator-based micro-grid system is applied.

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27

Bounouh, A., and D. Bélières. "New approach in ac voltage references based on micro-nanosystems." Metrologia 48, no. 1 (2011): 40–46. http://dx.doi.org/10.1088/0026-1394/48/1/004.

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28

Rahman, Ashfaqur, Anthony Matt Francis, Shamim Ahmed, Sai Kiran Akula, Jim Holmes, and Alan Mantooth. "High-Temperature Voltage and Current References in Silicon Carbide CMOS." IEEE Transactions on Electron Devices 63, no. 6 (2016): 2455–61. http://dx.doi.org/10.1109/ted.2016.2550580.

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29

Huntley, Les. "A primary standard of voltage maintained in solid-state references." IEEE Transactions on Instrumentation and Measurement IM-36, no. 4 (1987): 908–12. http://dx.doi.org/10.1109/tim.1987.6312580.

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30

Olivera, F., and A. Petraglia. "Gate leakage compensation technique for self-cascode based voltage references." Electronics Letters 56, no. 22 (2020): 1174–76. http://dx.doi.org/10.1049/el.2020.1452.

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31

Hedayati, Raheleh, Luigia Lanni, Ana Rusu, and Carl-Mikael Zetterling. "Wide Temperature Range Integrated Bandgap Voltage References in 4H–SiC." IEEE Electron Device Letters 37, no. 2 (2016): 146–49. http://dx.doi.org/10.1109/led.2015.2508064.

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32

Christian, L. A., Sze Wey Chua, Tian Yeong Sim, and Ling Xiang Liu. "Measurement uncertainties arising from unpowered shipment of dc voltage references." IEEE Transactions on Instrumentation and Measurement 50, no. 2 (2001): 259–62. http://dx.doi.org/10.1109/19.918116.

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33

Bai, Jingfen, Yubo Yang, and Da Lu. "Theories and applications of electrical quantum benchmarks." E3S Web of Conferences 165 (2020): 06028. http://dx.doi.org/10.1051/e3sconf/202016506028.

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The voltage unit and the resistance unit are the basic units in electrical metering. The Josephson voltage standard and the quantized Hall resistance standard have replaced the physical reference that was maintained by standard batteries and standard resistors. This paper investigates the working principle of voltage quantum reference, resistance quantum reference and current quantum reference. Furthermore, the applications of these new electrical References are discussed. This study provides theoretical support for the development of electricity value transfer methods.

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34

Yang, Weipeng, Hang Zhang, Jungang Li, Aimin Zhang, Yunhong Zhou, and Jianhua Wang. "PIDR Sliding Mode Current Control with Online Inductance Estimator for VSC-MVDC System Converter Stations under Unbalanced Grid Voltage Conditions." Energies 11, no. 10 (2018): 2599. http://dx.doi.org/10.3390/en11102599.

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This study aims to present a novel proportional-integral-derivative-resonant law-based sliding mode current control strategy with online inductance estimator (PIDR-SMCC-OIE) for voltage source converter medium voltage direct current (VSC-MVDC) system converter stations under unbalanced grid voltage conditions. A generalized current reference calculation method, by which the ratio of the amplitude of the active power ripple to that of the reactive power ripple can be continuously controlled without current distortion is presented. A dynamic model of the current control errors in the positive sequence synchronous reference frame is developed, and a PIDR law-based sliding mode current controller is designed, where derivatives of the current references are obtained by simple algebraic operations. An OIE adopting the dynamic filtering method and gradient algorithm is proposed to further improve system robustness. In this OIE, the converter pole voltages are obtained by computation utilizing the gate signals of the switching devices and the DC bus voltage, so that no additional voltage sensors are needed. To verify effectiveness of the PIDR-SMCC-OIE strategy, simulation studies on a two-terminal VSC-MVDC system are conducted in PSCAD/EMTDC. The results show it can provide satisfactory performance over a wide range of operating conditions.

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35

Bako, Niko, Ivo Broz, Željko Butković, Marko Magerl, and Adrijan Barić. "Design of low-power voltage/current references and supply voltage for 9-bit fully differential ADC." Automatika 57, no. 1 (2016): 239–51. http://dx.doi.org/10.7305/automatika.2016.03.1616.

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36

Pan, Shangzhi, and Praveen K. Jain. "A Low-Complexity Dual-Voltage-Loop Digital Control Architecture With Dynamically Varying Voltage and Current References." IEEE Transactions on Power Electronics 29, no. 4 (2014): 2049–60. http://dx.doi.org/10.1109/tpel.2013.2265398.

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37

Álvarez-Simón, Luis, Emmanuel Gómez-Ramírez, and María Sanz-Pascual. "Low-Power Highly Robust Resistance-to-Period Converter." Sensors 19, no. 1 (2018): 8. http://dx.doi.org/10.3390/s19010008.

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This paper presents a novel structure of Resistance- to-Period (R-T) Converter highly robust to supply and temperature variations. Robustness is achieved by using the ratiometric approach so that complex circuits or high accuracy voltage references are not necessary. To prove the proposed architecture of R-T converter, a prototype was implemented in a 0.18 μ m CMOS process with a single supply voltage of 1.8 V and without any stable reference voltage. Experimental results show a maximum ±1.5% output signal variation for ±10% supply voltage variation and in a 3–95 ° C temperature range.

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38

Zubkov, I. S., V. Ya Hutsaliuk, and O. M. Yurchenko. "DIGITAL PHASE-LOCKED LOOP SYSTEM OF RESONANCE VOLTAGE INVERTER." Tekhnichna Elektrodynamika 2022, no. 2 (2022): 27–34. http://dx.doi.org/10.15407/techned2022.02.027.

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The digital phase-locked loop (PLL) system for the resonant voltage inverter with pulse density modulation of induction heating installations is developed. The proposed system for frequency determination uses the feedback signal on the collector-emitter (drain-source) voltage of the inverter transistors and on the output current of the inverter, and stores this frequency on the interval of zero output voltage. A study of the PLL system in different operating modes when changing the load parameters is presented. References 8, figures 6, table 1.

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39

Banu, Viorel, Pierre Brosselard, Xavier Jordá, Phillippe Godignon, and José Millan. "Demonstration of High Temperature Bandgap Voltage Reference Feasibility on SiC Material." Materials Science Forum 645-648 (April 2010): 1131–34. http://dx.doi.org/10.4028/www.scientific.net/msf.645-648.1131.

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This work demonstrates that a stable voltage reference with temperature, in the 25°C-300°C range is possible with SiC. This paper reports the simulated and experimental results as well and a practical and simplified vision on the principles of thermally compensated voltage reference circuits, usually named bandgap references. For our demonstration, we have used SiC Schottky diodes. The influence of the barrier height and the ideality factor on the voltage reference and a comparison between simulated and experimental results are also presented.

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40

Han, Peiqing, Niansong Mei, and Zhaofeng Zhang. "Resistorless Frequency Locked On-Chip Oscillator with Proportional-to-Absolute Temperature References." Journal of Circuits, Systems and Computers 28, no. 10 (2019): 1950162. http://dx.doi.org/10.1142/s0218126619501627.

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A 36-kHz frequency locked on-chip oscillator is proposed, the proportional-to-absolute temperature (PTAT) current and voltage generator is presented to eliminate conventional temperature-compensated resistors. The resistorless approach reduces the process variation of frequency and the chip area. The oscillator is fabricated in 0.18-[Formula: see text]m standard CMOS process with an active area of 0.072[Formula: see text]mm2. The temperature coefficient of frequency is 48[Formula: see text]ppm/∘C at best and 82.5[Formula: see text]ppm/∘C on average over [Formula: see text]–70∘C and the frequency spread is 1.43% ([Formula: see text]/[Formula: see text] without calibration. The supply voltage sensitivity is 1.8%/V in the range from 0.65[Formula: see text]V to 1[Formula: see text]V and the power consumption is 95[Formula: see text]nW under the supply voltage of 0.65[Formula: see text]V.

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41

Mao, Wang, Xing Zhang, Yuhua Hu, et al. "A Research on Cascaded H-Bridge Module Level Photovoltaic Inverter Based on a Switching Modulation Strategy." Energies 12, no. 10 (2019): 1851. http://dx.doi.org/10.3390/en12101851.

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The stable operating region of a photovoltaic (PV) cascaded H-bridge (CHB) grid-tied module level inverter is extended by adopting the hybrid modulation strategy. However, the traditional single hybrid modulation method is unable to regulate the DC-side voltage of each module precisely, which may aggravate the fluctuation of modules’ DC-side voltages or even cause the deviation of modules’ DC-side voltages under some fault conditions and, thus, degrade the energy harvesting of PV panels. To tackle this problem, a switching modulation strategy for PV CHB inverter is proposed in this paper. When the CHB inverter is operating in normal mode, the hybrid modulation strategy containing the zero state is adopted to suppress DC-side voltage fluctuation, thereby, improving the output power of PV modules. When the CHB inverter is operating in fault mode owing to failing solar panels, the hybrid modulation strategy without the zero state is utilized to make the DC-side voltages reach the references and, thus, maintain a higher energy yield under fault conditions. Experimental results achieved by a laboratory prototype of a single-phase eleven-level CHB inverter demonstrate both the feasibility and effectiveness of the proposed method.

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42

Lei, Tongfei, Saleem Riaz, Noor Zanib, Munira Batool, Feng Pan, and Shaoguo Zhang. "Performance Analysis of Grid-Connected Distributed Generation System Integrating a Hybrid Wind-PV Farm Using UPQC." Complexity 2022 (March 18, 2022): 1–14. http://dx.doi.org/10.1155/2022/4572145.

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This work presents a distributed generation system (DG) that combines system of a wind turbine (WT) and photovoltaic (PV) using a unified power quality conditioner (UPQC). Along with providing active power (AP) to the utility grid, Wind-PV-UPQC improves PQ indicators, for example, voltage drops/surges, harmonics of grid voltages, and PF. Since Wind-PV-UPQC depends on dual compensation scheme, the parallel converter works as a sinusoidal voltage source, while the series converter works as a sinusoidal current source. In this way, a smooth transition from grid operation to island operation and vice versa can be achieved without load voltage transitions. In addition, in order to overcome the problems through abrupt solar radiation or wind speed variations, a faster power balance is achieved between the wind turbines, the PV array, and the grid, as FFCL pursue the production of the current references of series converter. Consequently, the dynamic reactions of the converter currents and the voltage of dc bus are enhanced. A comprehensive analysis of flow of the AP through the converters is done to ensure a proper understanding of how Wind-PV-UPQC works. Finally, the simulation results are shown to estimate the dynamic and static performance of Wind-PV-UPQC in conjunction with the power distribution system.

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Lo-Hive, J. P., D. Reymann, and G. Geneves. "Using 10 V Josephson voltage standards to estimate the uncertainty of Zener voltage references as traveling standards." IEEE Transactions on Instrumentation and Measurement 48, no. 2 (1999): 253–56. http://dx.doi.org/10.1109/19.769576.

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Colombo, Dalton Martini, Gilson Wirth, and Sergio Bampi. "Sub-1 V band-gap based and MOS threshold-voltage based voltage references in 0.13 µm CMOS." Analog Integrated Circuits and Signal Processing 82, no. 1 (2014): 25–37. http://dx.doi.org/10.1007/s10470-014-0343-8.

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Fruett, F., G. C. M. Meijer, and A. Bakker. "Minimization of the mechanical-stress-induced inaccuracy in bandgap voltage references." IEEE Journal of Solid-State Circuits 38, no. 7 (2003): 1288–91. http://dx.doi.org/10.1109/jssc.2003.813286.

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Colombo, Dalton Martini, Allan Rosseto, Gilson I. Wirth, Sergio Bampi, and Odair Lelis Goncalez. "Total Dose Effects on Voltage References in 130-nm CMOS Technology." IEEE Transactions on Device and Materials Reliability 18, no. 1 (2018): 27–36. http://dx.doi.org/10.1109/tdmr.2017.2787906.

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Franco, F. J., C. Palomar, J. G. Izquierdo, and J. A. Agapito. "An analog cell to detect single event transients in voltage references." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 770 (January 2015): 135–40. http://dx.doi.org/10.1016/j.nima.2014.10.006.

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Wu, Chung-Yu, and Shu-Yuan Chin. "High-precision curvature-compensated CMOS band-gap voltage and current references." Analog Integrated Circuits and Signal Processing 2, no. 3 (1992): 207–15. http://dx.doi.org/10.1007/bf00276633.

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Fusco, Daniel, and Tiago R. Balen. "Radiation Effects in Low Power and Ultra-Low Power Voltage References." Journal of Low Power Electronics 12, no. 4 (2016): 403–12. http://dx.doi.org/10.1166/jolpe.2016.1453.

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Tajalli, Armin, Mohammad Chahardori, and Abbas Khodaverdi. "An area and power optimization technique for CMOS bandgap voltage references." Analog Integrated Circuits and Signal Processing 62, no. 2 (2009): 131–40. http://dx.doi.org/10.1007/s10470-009-9344-4.

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