Relevant bibliographies by topics / Voltage Supply Variations

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers

Academic literature on the topic 'Voltage Supply Variations'

Author: Grafiati
Published: 4 June 2021
Last updated: 1 February 2022

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Journal articles on the topic "Voltage Supply Variations"

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Saponara, Sergio. "Integrated Bandgap Voltage Reference for High Voltage Vehicle Applications." Journal of Circuits, Systems and Computers 24, no. 08 (2015): 1550125. http://dx.doi.org/10.1142/s021812661550125x.

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This work presents a bandgap voltage reference (BGR) integrated in 0.25-μm bipolar-CMOS-DMOS (BCD) technology. The BGR circuit generates a reference voltage of 1.22 V. It is able to withstand large supply voltage variations of vehicle applications from 4.5 V, e.g., in case of cranking, up to 60-V, maximum value in case of emerging 48-V battery systems for hybrid and electrical vehicles. The circuit has an embedded high-voltage (HV) pseudo-regulator block that provides a more stable internal supply rail for a cascaded low-voltage bandgap core. HV MOS are used only in the pre-regulator block thu
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Li, Lin An, Ming Tang, Wen Ou, and Yang Hong. "An All CMOS Current Reference." Applied Mechanics and Materials 135-136 (October 2011): 192–97. http://dx.doi.org/10.4028/www.scientific.net/amm.135-136.192.

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In this paper, an all CMOS current reference circuit which generates a reference current independent of PVT (Process, supply Voltage, and Temperature) variations is presented. The circuit consists of a self-biased current source (SBCS) and two nested connected transistors which supply a voltage with positive temperature coefficient and the resulting reference circuit has low temperature coefficient. It is based on CSMC 0.5um mixed-signal process with the supply voltage of 5V. The precision of reference current is about ±3.05% when considering the process, supply voltage and temperature variati
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Álvarez-Simón, Luis, Emmanuel Gómez-Ramírez, and María Sanz-Pascual. "Low-Power Highly Robust Resistance-to-Period Converter." Sensors 19, no. 1 (2018): 8. http://dx.doi.org/10.3390/s19010008.

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This paper presents a novel structure of Resistance- to-Period (R-T) Converter highly robust to supply and temperature variations. Robustness is achieved by using the ratiometric approach so that complex circuits or high accuracy voltage references are not necessary. To prove the proposed architecture of R-T converter, a prototype was implemented in a 0.18 μ m CMOS process with a single supply voltage of 1.8 V and without any stable reference voltage. Experimental results show a maximum ±1.5% output signal variation for ±10% supply voltage variation and in a 3–95 ° C temperature range.
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Roslita Rusli, Julie, Suhaidi Shafie, Roslina Mohd Sidek, Hasmayadi Abdul Majid, W. Z. Wan Hassan, and M. A. Mustafa. "Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation." Indonesian Journal of Electrical Engineering and Computer Science 17, no. 2 (2020): 783. http://dx.doi.org/10.11591/ijeecs.v17.i2.pp783-792.

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Power consumption and speed are the main criteria in designing comparator for analog-to-digital converter (ADC). This paper presents an optimized low voltage low power dynamic comparator which is robust to process, voltage and temperature (PVT) variations with adequate speed. The comparator circuit was designed using 0.18µm CMOS technology with low voltage supply of 0.8V. The method used to verify the robustness of the comparator circuit across 45 PVT is presented. The circuit is simulated with 10% voltage supply variation, five process corners and temperature variation from 0°C to 100°C. The
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Haghdad, K., and M. Anis. "Design-Specific Optimization Considering Supply and Threshold Voltage Variations." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27, no. 10 (2008): 1891–901. http://dx.doi.org/10.1109/tcad.2008.2003288.

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Kini, P. Giridhar, R. C. Bansal, and R. S. Aithal. "Impact of voltage unbalance on the performance of three-phase induction motor." South Pacific Journal of Natural and Applied Sciences 24, no. 1 (2006): 45. http://dx.doi.org/10.1071/sp06007.

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Availability of quality power has become an important issue for industrial utilities due to frequent performance variations in process industries. Increase in the generating capacity has not kept up pace of power demand, which results into shortage of power supply and power system network is normally subjected to varying and unequal loads across the three phases. Continuous variation of single-phase loads on the power system network leads to voltage variation and unbalance, most importantly; the three-phase voltages tend to become asymmetrical in nature. Application of asymmetrical voltages to
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Korunovic, Lidija, and Ivan Anastasijevic. "Dependencies of current harmonics of some nonlinear load devices on rms supply voltage." Facta universitatis - series: Electronics and Energetics 33, no. 2 (2020): 261–71. http://dx.doi.org/10.2298/fuee2002261k.

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The paper deals with the determination of current harmonic dependencies of some nonlinear load devices on the rms supply voltage. These dependencies are based on the laboratory experiments that include the variations of rms supply voltage in relatively wide ranges. The experiments were performed on some representatives of nonlinear load devices. Both current harmonic amplitudes and their angles are recorded during the voltage changes, and corresponding dependencies on rms voltage are obtained by curve fitting. The results are related to actual devices that are typically used in residential loa
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WOLPERT, DAVID, and PAUL AMPADU. "ADAPTIVE DELAY CORRECTION FOR RUNTIME VARIATION IN DYNAMIC VOLTAGE SCALING SYSTEMS." Journal of Circuits, Systems and Computers 17, no. 06 (2008): 1111–28. http://dx.doi.org/10.1142/s0218126608004861.

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Temperature and voltage fluctuations affect delay sensitivity differently, as supply voltage is reduced. These differences make runtime variations particularly difficult to manage in dynamic voltage scaling systems, which adjust supply voltage in accordance with the required operating frequency. To include process variation in current table-lookup methods, a worst-case process is typically assumed. We propose a new method that takes process variation into account and reduces the excessive runtime variation guardbands. Our approach uses a ring oscillator to generate baseline frequencies, and em
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Olmos, Alfredo, Fabricio Ferreira, Fernando Paixão Cortes, Fernando Chavez, and Marcelo Soares Lubaszewski. "A 2-Transistor Sub-1V Low Power Temperature Compensated CMOS Voltage Reference: Design and Application." Journal of Integrated Circuits and Systems 10, no. 2 (2015): 74–80. http://dx.doi.org/10.29292/jics.v10i2.408.

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This paper presents the design and application of a CMOS sub-1V voltage reference using a 2-transistor Self-Cascode MOSFET (SCM) structure able to get low power consumption, temperature compensation, and small area. An efficient design procedure applied to this simple topology relying on NMOS transistors with different threshold voltages allows attaining large immunity against bias current and supply voltage variations. The two transistors can operate in weak, moderate, or strong inversion making the design flexible in terms of area and power consumption. Implemented in a > 0.18mm standard
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Aqeeli, Mohammed, Abdullah Alburaikan, Cahyo Muvianto, Xianjun Huang, and Zhirun Hu. "A Wideband Gain Linearized Microwave Voltage Controlled Oscillator with Low Phase Noise Variation in Nanometer CMOS Technology." Journal of Circuits, Systems and Computers 24, no. 03 (2015): 1550024. http://dx.doi.org/10.1142/s0218126615500243.

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A wideband CMOS LC tank voltage-controlled oscillator (VCO) with low phase noise variations and a linearized gain has been designed using a new binary-weighted switched-capacitor and digitally-controlled varactor bank. The novel design has the advantages of more linear VCO frequency tuning, lower phase noise and reduced gain to variations in supply voltage. The proposed VCO has been designed using UMC 90-nm, 6-metal CMOS technology and features phase noise variation of less than 4.9 dBc/Hz. The VCO operates from 3.45 to 6.55 GHz, with phase noise of -133.4 dBc/Hz at a 1 MHz offset, a figure of
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Dissertations / Theses on the topic "Voltage Supply Variations"

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Kadada, Holiday C. "Designing low voltage feeders to meet quality of supply specifications for voltage variations." Master's thesis, University of Cape Town, 2012. http://hdl.handle.net/11427/14558.

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Includes bibliographical references.<br>The provision of electricity has become a global necessity. In the developing world, residential electrification has become a tool for poverty alleviation. Unfortunately connecting residential customers to the grid, particularly in the low income communities, is more of a social task as the expected returns from the investment are unlikely to cover the costs to electrify and supply the communities. In such cases it is necessary to not over- or under-design a low voltage (LV) distribution network as this leads to unnecessary capital expenditure. The main
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Salem, Jebreel Mohamed Muftah. "A Reliable CMOS Receiver for Power Line Communications in Integrated Circuits." Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/30942.

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Power line communications (PLC) in integrated circuits (ICs) was proposed by Dr. Dong S. Haâ group in 2005. Their goal was to utilize the power distribution network for data communications as well as delivery of power, so that the routing overhead can be avoided and the number of pins in the chip can be reduced. Dr. Haâ s group demonstrated through measurements the existence of pass-bands in the power distribution networks and the feasibility of power line communications in ICs. Several PLC receivers were developed to recover data superimposed on the power lines of an IC. This thesis res
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Bahadornejad, Momen. "On-line local load measurement based voltage instability prediction." Queensland University of Technology, 2005. http://eprints.qut.edu.au/16187/.

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Voltage instability is a major concern in operation of power systems and it is well known that voltage instability and collapse have led to blackout or abnormally low voltages in a significant part of the power system. Consequently, tracking the proximity of the power system to an insecure voltage condition has become an important element of any protection and control scheme. The expected time until instability is a critical aspect. There are a few energy management systems including voltage stability analysis function in the real-time environment of control centres, these are based on assump
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Le, Guen Marie-Pierre. "Etude et réalisation d'un générateur de courant : application à l'étude des mécanismes d'approche à la saturation dans les tores ferrimagnétiques polycristallins magnétiquement doux." Brest, 1987. http://www.theses.fr/1987BRES2038.

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Conception d'un generateur de courant sinusoidal de periode 20 ms variant de 0 a 100 a, realise autour d'un circuit integre. Application a l'etude de tore en ferrites grenats (yig) et spinelles (nizn) entre la temperature ambiante et la temperature de curie. Verification de la loi de neel pour les materiaux poreux. Observation d'une anomalie pour les materiaux denses. Interpretation des phenomenes
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Ahmadi, Rubil. "Timing analysis in presence of power supply and ground voltage variations." 2004. http://link.library.utoronto.ca/eir/EIRdetail.cfm?Resources__ID=81083&T=F.

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Vandersand, James Dennis. "An analog multiphase self-calibrating DLL to minimize the effects of process, supply voltage, and temperature variations." 2008. http://etd.utk.edu/2008/VandersandJames.pdf.

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Hsiu-Fan, Lai, and 來修帆. "High Delay Resolution and High Supply Voltage Variation Tolerance All-Digital On-Chip Delay Measurement Circuit Design." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/22443159029347985607.

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碩士<br>輔仁大學<br>電機工程學系碩士班<br>102<br>In this thesis, two high delay resolution and high supply voltage variation tolerance all-digital on-chip delay measurement (OCDM) circuits for the high performance system-on-chip (SoC) applications are proposed. One is proposed OCDM circuit and the other is proposed wide-range OCDM circuit. Both of proposed OCDM circuits not only have a high immunity to supply voltage variations without extra self-biasing or calibration circuit, but also achieve high delay measurement resolution. The proposed OCDM circuit is implemented in TSMC 90nm standard CMOS technology,
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Jhao, Shu-Syun, and 趙俞勛. "Wide Measurement Range and High Supply Voltage Variation Tolerance All-Digital On-Chip Delay Measurement Circuit Design." Thesis, 2014. http://ndltd.ncl.edu.tw/handle/19567490865686128832.

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碩士<br>輔仁大學<br>電機工程學系碩士班<br>102<br>In this thesis, wide measurement range and high supply voltage variation Tolerance all-digital on-chip delay measurement (OCDM) circuit design are proposed. The OCDM circuits not only have a high immunity to supply voltage variations without extra self-biasing or calibration circuit, but also achieve high wide measurement range. The proposed OCDM circuit is implemented in TSMC 0.18μm standard CMOS technology, and simulation results show that measurement range can be improved to 1.2ns. Because using the vernier delay line with low supply sensitivity and two all
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Books on the topic "Voltage Supply Variations"

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Saibal, Mukhopadhyay, and SpringerLink (Online service), eds. Low-Power Variation-Tolerant Design in Nanometer Silicon. Springer Science+Business Media, LLC, 2011.

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Ahmadi, Rubil. Timing analysis in presence of power supply and ground voltage variations. 2004.

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Mukhopadhyay, Saibal, and Swarup Bhunia. Low-Power Variation-Tolerant Design in Nanometer Silicon. Springer, 2014.

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Mukhopadhyay, Saibal, and Swarup Bhunia. Low-Power Variation-Tolerant Design in Nanometer Silicon. Springer, 2011.

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Effects on microwave power output of size of load, continuous (intermittent) use, position of load, and variation in mains supply voltage. MAFF Publications, 1994.

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Book chapters on the topic "Voltage Supply Variations"

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Golanbari, Mohammad Saber, Mojtaba Ebrahimi, Saman Kiamehr, and Mehdi B. Tahoori. "Selective Flip-Flop Optimization for Circuit Reliability." In Dependable Embedded Systems. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-52017-5_14.

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AbstractThis chapter proposes a selective flip-flop optimization method (Golanbari et al., IEEE Trans Very Large Scale Integr VLSI Syst 39(7):1484–1497, 2020; Golanbari et al., Aging guardband reduction through selective flip-flop optimization. In: IEEE European Test Symposium (ETS) (2015)), in which the timing and reliability of the VLSI circuits are improved by optimizing the timing-critical components under severe impact of runtime variations. As flip-flops are vulnerable to aging and supply voltage fluctuation, it is necessary to address these reliability issues in order to improve the overall system lifetime. In the proposed method, we first extend the standard cell libraries by adding optimized versions of the flip-flops designed for better resiliency against severe Bias Temperature Instability (BTI) impact and/or supply voltage fluctuation. Then, we optimize the VLSI circuit by replacing the aging-critical and voltage-drop critical flip-flops of the circuit with optimized versions to improve the timing and reliability of the entire circuit in a cost-effective way. Simulation results show that incorporating the optimized flip-flops in a processor can prolong the circuit lifetime by 36.9%, which translates into better reliability.This chapter is organized as follows. Section 1 introduces wide-voltage operation reliability issues and motivates the proposed selective flip-flop optimization approach. The impacts of runtime variations on flip-flops are explained in Sect. 2. Consequently, Sect. 3 presents cell-level optimization of the flip-flops. The proposed selective flip-flop optimization methodology is described in Sect. 4, and optimization results are discussed in Sect. 5. Finally, Sect. 7 concludes the chapter.
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Piri, Amirreza. "The Improvement of Voltage Reference Below 1 V with Low Temperature Dependence and Resistant to Variations of Power Supply in CMOS Technology." In Lecture Notes in Electrical Engineering. Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-8672-4_41.

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Nowak, Paweł, Andrzej Juś, Roman Szewczyk, Michał Nowicki, and Wojciech Winiarski. "Resistance of MAX 6325 Reference Voltage Source on Supply Voltage Variation." In Advances in Intelligent Systems and Computing. Springer International Publishing, 2015. http://dx.doi.org/10.1007/978-3-319-10990-9_31.

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Garg, Rajesh, and Sunil P. Khatri. "Process Variation Tolerant Single-supply True Voltage Level Shifter." In Analysis and Design of Resilient VLSI Circuits. Springer US, 2009. http://dx.doi.org/10.1007/978-1-4419-0931-2_10.

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Chen, Howard, and Daniel Ostapko. "Modeling Temporal and Spatial Power Supply Voltage Variation for Timing Analysis." In Lecture Notes in Computer Science. Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/978-3-540-30205-6_83.

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Sovcik, Michal, Lukas Nagy, Viera Stopjakova, and Daniel Arbet. "Digital On-Chip Calibration of Analog Systems towards Enhanced Reliability." In Practical Applications in Reliability Engineering. IntechOpen, 2021. http://dx.doi.org/10.5772/intechopen.96609.

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This chapter deals with digital method of calibration for analog integrated circuits as a means of extending its lifetime and reliability, which consequently affects the reliability the analog electronic system as a whole. The proposed method can compensate for drift in circuit’s electrical parameters, which occurs either in a long term due to aging and electrical stress or it is rather more acute, being caused by process, voltage and temperature variations. The chapter reveals the implementation of ultra-low voltage on-chip system of digitally calibrated variable-gain amplifier (VGA), fabricated in CMOS 130 nm technology. It operates reliably under supply voltage of 600mV with 10% variation, in temperature range from −20°C to 85°C. Simulations suggest that the system will preserve its parameters for at least 10 years of operation. Experimental verification over 10 packaged integrated circuit (IC) samples shows the input offset voltage of VGA is suppressed in range of 13μV to 167μV. With calibration the VGA closely meets its nominally designed essential specifications as voltage gain or bandwidth. Digital calibration is comprehensively compared to its widely used alternative, Chopper stabilization through its implementation for the same VGA.
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Abbadi, Amel, Fethia Hamidia, Abdelkader Morsli, Habiba Bellatrache, Djamel Boukhetala, and Lazhari Nazli. "Interval Type 2 Fuzzy-Logic-Based Solar Power MPPT Algorithm Connected to AC Grid." In Research Anthology on Clean Energy Management and Solutions. IGI Global, 2021. http://dx.doi.org/10.4018/978-1-7998-9152-9.ch037.

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In this article, an interval type-2 fuzzy logic controller (IT2FLC) is used as a Maximum Power Point Tracker (MPPT) to supply a large scale interconnected grid. The IT2FLC has the advantage of being able to regulate the MPP in case of severe variations of the weather conditions. A photovoltaic array is connected to AC grid via a DC-DC boost converter and a three-phase three-level Voltage Source Converter (VSC). The duty cycle of the boost converter is switched by the IT2FLC. A three phase VSC converts the VDC link voltage to AC and keeps unity power factor. The VSC control system uses two control loops: an external control loop which regulates DC link voltage to alternative current and an internal control loop which regulates the active and the reactive grid currents. Vd and Vq voltage outputs of the current controller are converted to three modulating signals used by the PWM Generator.
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Druml, Norbert, Manuel Menghin, Christian Steger, et al. "Vulnerabilities of Secure and Reliable Low-Power Embedded Systems and Their Analysis Methods." In Advances in Systems Analysis, Software Engineering, and High Performance Computing. IGI Global, 2014. http://dx.doi.org/10.4018/978-1-4666-6194-3.ch005.

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Due to the increase in popularity of mobile devices, it has become necessary to develop a low-power design methodology in order to build complex embedded systems with the ability to minimize power usage. In order to fulfill power constraints and security constraints if personal data is involved, test and verification of a design's functionality are imperative tasks during a product's development process. Currently, in the field of secure and reliable low-power embedded systems, issues such as peak power consumption, supply voltage variations, and fault attacks are the most troublesome. This chapter presents a comprehensive study over design analysis methodologies that have been presented in recent years in literature. During a long-lasting and successful cooperation between industry and academia, several of these techniques have been evaluated, and the identified sensitivities of embedded systems are presented. This includes a wide range of problem groups, from power and supply-related issues to operational faults caused by attacks as well as reliability topics.
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Bouchiba, Nouha, Souhir Sallem, Mohamed Ben Ali Kammoun, Larbi Chrifi-Alaoui, and Saïd Drid. "Nonlinear Control Strategies of an Autonomous Double Fed Induction Generator Based Wind Energy Conversion Systems." In Entropy and Exergy in Renewable Energy [Working Title]. IntechOpen, 2021. http://dx.doi.org/10.5772/intechopen.94757.

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In the last few decades, among the wide range of renewable energy sources, wind energy is widely used. Variable speed wind energy conversion systems based on double fed induction generator have a considerable interest mostly in case of islanded networks and/or isolated applications. In this paper, as a means to supply remote areas, an investigation of a wind energy conversion system (WECS) based on a double fed induction generator (DFIG) is carried out. The presence of both wind turbine aerodynamics and DFIG coupled dynamics causes strong nonlinearities in the studied system. Wind speed and demanded power variations have a major impact on the quality of the produced energy. In order to control and maintain the stator output voltage and frequency at their nominal values (220 V/50 Hz) under wind speed and load variations, this work presents a study of three kinds of controllers: PI, Back-Stepping and Sliding Mode controllers. These controllers are integrated in the studied system and a comparison of their dynamic performances has been developed. Moreover, in order to ensure the rotor side converter safety on the one hand and to guarantee an optimal operation of the DFIG on the other hand, a management strategy is proposed in this work. Simulation results are performed using Matlab/Simulink environment and show the effectiveness and the accuracy of each controller compared to others mainly with the presence of wind speed and load demand variations.
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Venkobarao, Vivek. "Hybridized Genetic Algorithm Based Machine Parameters Estimation for Direct Torque Control of 3 Phase Motor for Wind Energy Systems." In Advances in Computer and Electrical Engineering. IGI Global, 2016. http://dx.doi.org/10.4018/978-1-4666-9911-3.ch006.

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It is generally aware that real-time parameter estimation of A.C. induction machine is very important for the efficient operation of vector-controlled drives. However, most existing methods have not taken into account of the four imperfections within the system, i.e. the existence of severe power harmonics due to the PWM inverter drive, the imbalancing of the 3-phase supply from the inverter, the variation of supply frequency under load changing and acceleration/deceleration, and changes in resistance. In this example, we have developed a new method of parameter estimation based on real time data sampling of voltages and currents, no matter they are sinusoidal or not. Here, the assumption of a synchronous rotating speed of the stator flux is not critical. With the aid of hybrid genetic algorithm techniques, the model has been found useful for on-line speed/torque control in most field orientation control schemes as it is much easier to achieve a global minimum during the optimization process.
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Conference papers on the topic "Voltage Supply Variations"

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Lasbouygues, B., R. Wilson, N. Azemard, and P. Maurine. "Timing analysis in presence of supply voltage and temperature variations." In the 2006 international symposium. ACM Press, 2006. http://dx.doi.org/10.1145/1123008.1123012.

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Hande, Vinayak Gopal, and Maryam Shojaei Baghini. "Design of voltage reference with low sensitivity to process, supply voltage and temperature variations." In 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2013. http://dx.doi.org/10.1109/mwscas.2013.6674592.

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Haghdad, Kian, and Mohab Anis. "Scaling analysis of yield optimization considering supply and threshold voltage variations." In 2010 IEEE International Symposium on Circuits and Systems - ISCAS 2010. IEEE, 2010. http://dx.doi.org/10.1109/iscas.2010.5537773.

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Kaur, Manpreet, Rashid Rashidzadeh, and Roberto Muscedere. "Reliability of Physical Unclonable Function under Temperature and Supply Voltage Variations." In 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, 2018. http://dx.doi.org/10.1109/mwscas.2018.8623849.

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Chawla, M., A. Rajvanshy, A. Ghosh, and A. Joshi. "Distribution bus voltage control using DVR under the supply frequency variations." In 2006 IEEE Power India Conference. IEEE, 2006. http://dx.doi.org/10.1109/poweri.2006.1632524.

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Ahmadi, R., and F. N. Najm. "Timing analysis in presence of power supply and ground voltage variations." In ICCAD-2003. International Conference on Computer Aided Design. IEEE, 2003. http://dx.doi.org/10.1109/iccad.2003.159687.

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Gopal, Hande Vinayak, Prafful Gupta, and Maryam Shojaei Baghini. "Ultra low-supply voltage reference generator with low sensitivity to PVT variations." In 2013 5th Asia Symposium on Quality Electronic Design (ASQED). IEEE, 2013. http://dx.doi.org/10.1109/asqed.2013.6643557.

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Avital, Moshe, Anatoli Mordakhay, David Zooker Zabib, Yoav Weizman, Alexander Fish, and Osnat Keren. "Utilization of Process and Supply Voltage Random Variations for Random Bit Generation." In 2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS). IEEE, 2018. http://dx.doi.org/10.1109/apccas.2018.8605708.

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Kadam, Gurunath, Markus Rudack, Krishnendu Chakrabarty, and Juergen Alt. "Supply-voltage optimization to account for process variations in high-volume manufacturing testing." In 2016 IEEE International Test Conference (ITC). IEEE, 2016. http://dx.doi.org/10.1109/test.2016.7805846.

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Luo, Shien-Chun, and Lih-Yih Chiou. "Adaptive minimum supply voltage for subthreshold circuits considering noise margin and PT variations." In 2010 International Conference on Green Circuits and Systems (ICGCS). IEEE, 2010. http://dx.doi.org/10.1109/icgcs.2010.5543012.

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