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Journal articles on the topic 'Von Neumann bottleneck'

Author: Grafiati

Published: 4 June 2025

Last updated: 1 August 2025

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1

Kumbhar, Gaurang. "Synaptic AI: Bridging Neural Dynamics and Deep Learning for Next- Generation Computation." International Scientific Journal of Engineering and Management 04, no. 04 (2025): 1–7. https://doi.org/10.55041/isjem02829.

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The escalating computational and power demands of deep learning algorithms challenge traditional von Neumann architectures, which separate memory and processing units. This structural bottleneck, often referred to as the "von Neumann bottleneck," hampers data throughput and energy efficiency—especially in real-time, data-intensive AI applications. Neuromorphic computing, inspired by the human brain's architecture and function, offers a promising alternative. Unlike conventional systems, neuromorphic models integrate processing and memory, enabling highly parallel, event-driven computation. Thi

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Lin, Zhiting, Zhongzhen Tong, Jin Zhang, et al. "A review on SRAM-based computing in-memory: Circuits, functions, and applications." Journal of Semiconductors 43, no. 3 (2022): 031401. http://dx.doi.org/10.1088/1674-4926/43/3/031401.

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Abstract Artificial intelligence (AI) processes data-centric applications with minimal effort. However, it poses new challenges to system design in terms of computational speed and energy efficiency. The traditional von Neumann architecture cannot meet the requirements of heavily data-centric applications due to the separation of computation and storage. The emergence of computing in-memory (CIM) is significant in circumventing the von Neumann bottleneck. A commercialized memory architecture, static random-access memory (SRAM), is fast and robust, consumes less power, and is compatible with st

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KIM, Yonghun, Jung-Dae KWON, and Jongwon YOON. "2D Materials-based Neuromorphic Computing Electronic Device." Physics and High Technology 32, no. 11 (2023): 10–16. http://dx.doi.org/10.3938/phit.32.029.

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Nowadays, with the rapid information explosion connected to all devices, there is a huge demand for effectively processing big data. In particular, conventional von Neumann computing system with physically separated processing and memory units face significant problems in dealing with massive unstructured data such as sound, images, and video because of a von Neumann bottleneck. As a key feature of parallel operations, neuromorphic computing systems can analyze massive unstructured data in a time and energy efficient manner. However, critical issues related to reliability and variability of no

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Ou, Qiao-Feng, Bang-Shu Xiong, Lei Yu, Jing Wen, Lei Wang, and Yi Tong. "In-Memory Logic Operations and Neuromorphic Computing in Non-Volatile Random Access Memory." Materials 13, no. 16 (2020): 3532. http://dx.doi.org/10.3390/ma13163532.

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Recent progress in the development of artificial intelligence technologies, aided by deep learning algorithms, has led to an unprecedented revolution in neuromorphic circuits, bringing us ever closer to brain-like computers. However, the vast majority of advanced algorithms still have to run on conventional computers. Thus, their capacities are limited by what is known as the von-Neumann bottleneck, where the central processing unit for data computation and the main memory for data storage are separated. Emerging forms of non-volatile random access memory, such as ferroelectric random access m

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Lu, Chun Hsien, Chih Sheng Lin, Hung Lin Chao, Jih g. Shen, and Pao Ann Hsiung. "Reconfigurable multi-core architecture - a plausible solution to the von Neumann performance bottleneck." International Journal of Adaptive and Innovative Systems 2, no. 3 (2015): 217. http://dx.doi.org/10.1504/ijais.2015.074399.

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Sheng, Huayi, and Muhammad Shemyal Nisar. "Simulating an Integrated Photonic Image Classifier for Diffractive Neural Networks." Micromachines 15, no. 1 (2023): 50. http://dx.doi.org/10.3390/mi15010050.

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The slowdown of Moore’s law and the existence of the “von Neumann bottleneck” has led to electronic-based computing systems under von Neumann’s architecture being unable to meet the fast-growing demand for artificial intelligence computing. However, all-optical diffractive neural networks provide a possible solution to this challenge. They can outperform conventional silicon-based electronic neural networks due to the significantly higher speed of the propagation of optical signals (≈108 m.s−1) compared to electrical signals (≈105 m.s−1), their parallelism in nature, and their low power consum

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Ringwood, G. A. "Metalogic machines: a retrospective rationale for the Japanese Fifth Generation." Knowledge Engineering Review 3, no. 4 (1988): 303–20. http://dx.doi.org/10.1017/s0269888900004604.

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AbstractThe oft quoted inadequacy of von Neumann architectures for AI applications has regularly been used to justify the design of special purpose parallel machines. In particular, the von Neumann computational model has been criticized as being unsuitable for parallelism because of the memory access bottleneck. For the design of a new machine both top-down and bottom-up methodologies have drawbacks. The middle-out strategy, working both up and down from an intrinsically concurrent high-level programming language as a means of both representing and processing knowledge provides an attractive

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Wang, Yi Da. "Selection of Switching Layer Materials for Memristive Devices: from Traditional Oxide to 2D Materials." Materials Science Forum 1027 (April 2021): 107–14. http://dx.doi.org/10.4028/www.scientific.net/msf.1027.107.

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Redox-based resistive switching devices (ReRAM) provide new hardware concepts which make it possible to break the von Neumann bottleneck and build a new computing system in the information. However, the materials for switching layers are various and mechanisms are quite different, these will block the further exploration for practical applications. This review tends to demonstrate different kinds of memristors fabricated with various materials, such as oxide, nitride and 2D materials. The electrical properties of those based on different materials are compared and the advantages of each are li

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Niu, Xuezhong, Bobo Tian, Qiuxiang Zhu, Brahim Dkhil, and Chungang Duan. "Ferroelectric polymers for neuromorphic computing." Applied Physics Reviews 9, no. 2 (2022): 021309. http://dx.doi.org/10.1063/5.0073085.

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The last few decades have witnessed the rapid development of electronic computers relying on von Neumann architecture. However, due to the spatial separation of the memory unit from the computing processor, continuous data movements between them result in intensive time and energy consumptions, which unfortunately hinder the further development of modern computers. Inspired by biological brain, the in situ computing of memristor architectures, which has long been considered to hold unprecedented potential to solve the von Neumann bottleneck, provides an alternative network paradigm for the nex

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Blair, Enrique, and Craig Lent. "Clock Topologies for Molecular Quantum-Dot Cellular Automata." Journal of Low Power Electronics and Applications 8, no. 3 (2018): 31. http://dx.doi.org/10.3390/jlpea8030031.

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Quantum-dot cellular automata (QCA) is a low-power, non-von-Neumann, general-purpose paradigm for classical computing using transistor-free logic. Here, classical bits are encoded on the charge configuration of individual computing primitives known as “cells.” A cell is a system of quantum dots with a few mobile charges. Device switching occurs through quantum mechanical inter-dot charge tunneling, and devices are interconnected via the electrostatic field. QCA devices are implemented using arrays of QCA cells. A molecular implementation of QCA may support THz-scale clocking or better at room

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Song, Soonbum, and Youngmin Kim. "Novel In-Memory Computing Adder Using 8+T SRAM." Electronics 11, no. 6 (2022): 929. http://dx.doi.org/10.3390/electronics11060929.

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Von Neumann architecture-based computing systems are facing a von Neumann bottleneck owing to data transfer between separated memory and processor units. In-memory computing (IMC), on the other hand, reduces energy consumption and improves computing performance. This study explains an 8+T SRAM IMC circuit based on 8+T differential SRAM (8+T SRAM) and proposes 8+T SRAM-based IMC full adder (FA) and 8+T SRAM-based IMC approximate adder, which are based on the 8+T SRAM IMC circuit. The 8+T SRAM IMC circuit performs SRAM read and bitwise operations simultaneously and performs each logic operation

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Larrabee, Allan R. "The P4 Parallel Programming System, the Linda Environment, and Some Experiences with Parallel Computation." Scientific Programming 2, no. 3 (1993): 23–35. http://dx.doi.org/10.1155/1993/817634.

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The first digital computers consisted of a single processor acting on a single stream of data. In this so-called "von Neumann" architecture, computation speed is limited mainly by the time required to transfer data between the processor and memory. This limiting factor has been referred to as the "von Neumann bottleneck". The concern that the miniaturization of silicon-based integrated circuits will soon reach theoretical limits of size and gate times has led to increased interest in parallel architectures and also spurred research into alternatives to silicon-based implementations of processo

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Im, Jisung, Sangyeon Pak, Sung-Yun Woo, Wonjun Shin, and Sung-Tae Lee. "Flash Memory for Synaptic Plasticity in Neuromorphic Computing: A Review." Biomimetics 10, no. 2 (2025): 121. https://doi.org/10.3390/biomimetics10020121.

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The rapid expansion of data has made global access easier, but it also demands increasing amounts of energy for data storage and processing. In response, neuromorphic electronics, inspired by the functionality of biological neurons and synapses, have emerged as a growing area of research. These devices enable in-memory computing, helping to overcome the “von Neumann bottleneck”, a limitation caused by the separation of memory and processing units in traditional von Neumann architecture. By leveraging multi-bit non-volatility, biologically inspired features, and Ohm’s law, synaptic devices show

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Zanotti, Tommaso, Paolo Pavan, and Francesco Maria Puglisi. "Multi-Input Logic-in-Memory for Ultra-Low Power Non-Von Neumann Computing." Micromachines 12, no. 10 (2021): 1243. http://dx.doi.org/10.3390/mi12101243.

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Logic-in-memory (LIM) circuits based on the material implication logic (IMPLY) and resistive random access memory (RRAM) technologies are a candidate solution for the development of ultra-low power non-von Neumann computing architectures. Such architectures could enable the energy-efficient implementation of hardware accelerators for novel edge computing paradigms such as binarized neural networks (BNNs) which rely on the execution of logic operations. In this work, we present the multi-input IMPLY operation implemented on a recently developed smart IMPLY architecture, SIMPLY, which improves t

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Jha, Rashmi, Vamshi Kiran Kiran Gogi, and Siddharth Barve. "(Invited) Novel Neuromorphic Computing Paradigms Enabled By Emerging Memory Devices." ECS Meeting Abstracts MA2024-01, no. 57 (2024): 3011. http://dx.doi.org/10.1149/ma2024-01573011mtgabs.

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Implementation of Artificial Intelligence and Machine Learning algorithms on conventional Von Neumann computing architectures are crippled by the memory-wall bottleneck. To overcome these issues, novel computing architectures with high-bandwidth memories, in-memory computing, and near-memory computing capabilities are being developed. Almost all of these architectures will benefit from high-density on-chip non-volatile memories, offered by the emerging non-volatile memory devices. Additionally, emerging memory devices offer rich device physics that can be leveraged for the implementation of no

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Jafari, Atousa, Christopher Münch, and Mehdi Tahoori. "A Spintronic 2M/7T Computation-in-Memory Cell." Journal of Low Power Electronics and Applications 12, no. 4 (2022): 63. http://dx.doi.org/10.3390/jlpea12040063.

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Computing data-intensive applications on the von Neumann architecture lead to significant performance and energy overheads. The concept of computation in memory (CiM) addresses the bottleneck of von Neumann machines by reducing the data movement in the computing system. Emerging resistive non-volatile memory technologies, as well as volatile memories (SRAM and DRAM), can be used to realize architectures based on the CiM paradigm. In this paper, we propose a hybrid cell design to provide the opportunity for CiM by combining the magnetic tunnel junction (MTJ) and the conventional 6T-SRAM cell. T

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Reuben, John. "Binary Addition in Resistance Switching Memory Array by Sensing Majority." Micromachines 11, no. 5 (2020): 496. http://dx.doi.org/10.3390/mi11050496.

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The flow of data between processing and memory units in contemporary computing systems is their main performance and energy-efficiency bottleneck, often referred to as the ‘von Neumann bottleneck’ or ‘memory wall’. Emerging resistance switching memories (memristors) show promising signs to overcome the ‘memory wall’ by enabling computation in the memory array. Majority logic is a type of Boolean logic, and in many nanotechnologies, it has been found to be an efficient logic primitive. In this paper, a technique is proposed to implement a majority gate in a memory array. The majority gate is re

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Jo, Yooyeon, Dae Kyu Lee, and Joon Young Kwak. "Recent Progress in Development of Artificial Neuromorphic Devices Based on Emerging Materials." Ceramist 25, no. 4 (2022): 454–74. http://dx.doi.org/10.31613/ceramist.2022.25.4.08.

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In the fourth industrial revolution, the efficient processing of huge amounts of data is important due to the development of artificial intelligence (AI), internet of things (IoT), and machine learning (ML). The conventional computing system, which is known as von Neumann architecture, has been facing bottleneck problems because of the physical separation of memory and central processing unit (CPU). Many researchers have interested to study on neuromorphic computing, inspired by the human brain, to solve the bottleneck problems. The development of artificial neuromorphic devices, such as neuro

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Haj-Ali, Ameer, Rotem Ben-Hur, Nimrod Wald, Ronny Ronen, and Shahar Kvatinsky. "IMAGING-In-Memory AlGorithms for Image processiNG." IEEE Transactions on Circuits and Systems I: Regular Papers 65, no. 12 (2018): 4258–71. https://doi.org/10.1109/TCSI.2018.2846699.

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Data-intensive applications such as image processing suffer from massive data movement between memory and processing units. The severe limitations on system performance and energy efficiency imposed by this data movement are further exacerbated with any increase in the distance the data must travel. This data transfer and its associated obstacles could be eliminated by the use of emerging non-volatile resistive memory technologies (memristors) that make it possible to both store and process data within the same memory cells. In this paper, we propose four in-memory algorithms for efficient exe

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Kim, Gyeongpyo, Seoyoung Park, and Sungjun Kim. "Quantum Dots for Resistive Switching Memory and Artificial Synapse." Nanomaterials 14, no. 19 (2024): 1575. http://dx.doi.org/10.3390/nano14191575.

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Memristor devices for resistive-switching memory and artificial synapses have emerged as promising solutions for overcoming the technological challenges associated with the von Neumann bottleneck. Recently, due to their unique optoelectronic properties, solution processability, fast switching speeds, and low operating voltages, quantum dots (QDs) have drawn substantial research attention as candidate materials for memristors and artificial synapses. This review covers recent advancements in QD-based resistive random-access memory (RRAM) for resistive memory devices and artificial synapses. Fol

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Zhou, Jun. "Recent Progress of Memristor-based Neuromorphic Computing." Transactions on Computer Science and Intelligent Systems Research 5 (August 12, 2024): 1655–61. http://dx.doi.org/10.62051/1kany131.

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The evolution of memristors and their successful applications have positioned them as formidable candidates for the next generation of computer systems. With the rapid advancement of foundational ar- tificial intelligence applications, there is an increasing demand for computational power, energy efficiency, and stability. Memristors and the Neuromorphic Computing (NMC) systems they underpin hold signifi- can’t potential to break through the von Neumann bottleneck. However, technical challenges remain in the application of NMC to computer systems. In this review, we focus on the performance of

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Saxena, Vishal, Xinyu Wu, Ira Srivastava, and Kehan Zhu. "Towards Neuromorphic Learning Machines Using Emerging Memory Devices with Brain-Like Energy Efficiency." Journal of Low Power Electronics and Applications 8, no. 4 (2018): 34. http://dx.doi.org/10.3390/jlpea8040034.

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The ongoing revolution in Deep Learning is redefining the nature of computing that is driven by the increasing amount of pattern classification and cognitive tasks. Specialized digital hardware for deep learning still holds its predominance due to the flexibility offered by the software implementation and maturity of algorithms. However, it is being increasingly desired that cognitive computing occurs at the edge, i.e., on hand-held devices that are energy constrained, which is energy prohibitive when employing digital von Neumann architectures. Recent explorations in digital neuromorphic hard

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Feng, Yang, Zhaohui Sun, Yueran Qi, et al. "Optimized operation scheme of flash-memory-based neural network online training with ultra-high endurance." Journal of Semiconductors 45, no. 1 (2024): 012301. http://dx.doi.org/10.1088/1674-4926/45/1/012301.

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Abstract With the rapid development of machine learning, the demand for high-efficient computing becomes more and more urgent. To break the bottleneck of the traditional Von Neumann architecture, computing-in-memory (CIM) has attracted increasing attention in recent years. In this work, to provide a feasible CIM solution for the large-scale neural networks (NN) requiring continuous weight updating in online training, a flash-based computing-in-memory with high endurance (109 cycles) and ultra-fast programming speed is investigated. On the one hand, the proposed programming scheme of channel ho

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Wang, Shuiyuan, Xiang Hou, Lan Liu, et al. "A Photoelectric-Stimulated MoS2 Transistor for Neuromorphic Engineering." Research 2019 (November 11, 2019): 1–10. http://dx.doi.org/10.34133/2019/1618798.

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The von Neumann bottleneck has spawned the rapid expansion of neuromorphic engineering and brain-like networks. Synapses serve as bridges for information transmission and connection in the biological nervous system. The direct implementation of neural networks may depend on novel materials and devices that mimic natural neuronal and synaptic behavior. By exploiting the interfacial effects between MoS2 and AlOx, we demonstrate that an h-BN-encapsulated MoS2 artificial synapse transistor can mimic the basic synaptic behaviors, including EPSC, PPF, LTP, and LTD. Efficient optoelectronic spikes en

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V, Mr Sampath Kumar, Apar Agarwal, and Km Nidhi Chaurasia. "Design and Analysis of XNOR-SRAM for In-Memory Computing." International Journal for Research in Applied Science and Engineering Technology 11, no. 5 (2023): 3904–9. http://dx.doi.org/10.22214/ijraset.2023.52189.

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Abstract: The use of in-memory computing is a promising strategy with the potential to circumvent the von Neumann bottleneck and improve the overall performance of contemporary computer systems. In this study, the design and analysis of an innovative XNOR-SRAM cell for use in in-memory computing applications is presented. The performance of the suggested cell is assessed using crucial parameters such as cell ratio (CR), pull-up ratio (PR), static noise margin (SNM), write margin (WM), and read margin(RM)MA. Simulation and optimization of the proposed cell are carried out with the assistance of

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Huang, Wen, Huixing Zhang, Zhengjian Lin, Pengjie Hang, and Xing’ao Li. "Transistor-Based Synaptic Devices for Neuromorphic Computing." Crystals 14, no. 1 (2024): 69. http://dx.doi.org/10.3390/cryst14010069.

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Currently, neuromorphic computing is regarded as the most efficient way to solve the von Neumann bottleneck. Transistor-based devices have been considered suitable for emulating synaptic functions in neuromorphic computing due to their synergistic control capabilities on synaptic weight changes. Various low-dimensional inorganic materials such as silicon nanomembranes, carbon nanotubes, nanoscale metal oxides, and two-dimensional materials are employed to fabricate transistor-based synaptic devices. Although these transistor-based synaptic devices have progressed in terms of mimicking synaptic

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Wang, Ziling, Li Luo, Jie Li, Lidan Wang, and Shukai Duan. "Reconfigurable nonvolatile Boolean logic with one-transistor-two-memristor for in-memory computing." Semiconductor Science and Technology 36, no. 12 (2021): 125023. http://dx.doi.org/10.1088/1361-6641/ac363b.

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Abstract In-memory computing is highly expected to break the von Neumann bottleneck and memory wall. Memristor with inherent nonvolatile property is considered to be a strong candidate to execute this new computing paradigm. In this work, we have presented a reconfigurable nonvolatile logic method based on one-transistor-two-memristor device structure, inhibiting the sneak path in the large-scale crossbar array. By merely adjusting the applied voltage signals, all 16 binary Boolean logic functions can be achieved in a single cell. More complex computing tasks including one-bit parallel full ad

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Slavova, Angela, and Ventsislav Ignatov. "Edge of Chaos in Memristor Cellular Nonlinear Networks." Mathematics 10, no. 8 (2022): 1288. http://dx.doi.org/10.3390/math10081288.

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Information processing in the brain takes place in a dense network of neurons connected through synapses. The collaborative work between these two components (Synapses and Neurons) allows for basic brain functions such as learning and memorization. The so-called von Neumann bottleneck, which limits the information processing capability of conventional systems, can be overcome by the efficient emulation of these computational concepts. To this end, mimicking the neuronal architectures with silicon-based circuits, on which neuromorphic engineering is based, is accompanied by the development of n

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Boldman, Walker L., Cheng Zhang, Thomas Z. Ward, et al. "Programmable Electrofluidics for Ionic Liquid Based Neuromorphic Platform." Micromachines 10, no. 7 (2019): 478. http://dx.doi.org/10.3390/mi10070478.

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Due to the limit in computing power arising from the Von Neumann bottleneck, computational devices are being developed that mimic neuro-biological processing in the brain by correlating the device characteristics with the synaptic weight of neurons. This platform combines ionic liquid gating and electrowetting for programmable placement/connectivity of the ionic liquid. In this platform, both short-term potentiation (STP) and long-term potentiation (LTP) are realized via electrostatic and electrochemical doping of the amorphous indium gallium zinc oxide (aIGZO), respectively, and pulsed bias m

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Nie, Yiling, Pengshan Xie, Xu Chen, et al. "Hybrid C8-BTBT/InGaAs nanowire heterojunction for artificial photosynaptic transistors." Journal of Semiconductors 43, no. 11 (2022): 112201. http://dx.doi.org/10.1088/1674-4926/43/11/112201.

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Abstract The emergence of light-tunable synaptic transistors provides opportunities to break through the von Neumann bottleneck and enable neuromorphic computing. Herein, a multifunctional synaptic transistor is constructed by using 2,7-dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8-BTBT) and indium gallium arsenide (InGaAs) nanowires (NWs) hybrid heterojunction thin film as the active layer. Under illumination, the Type-I C8-BTBT/InGaAs NWs heterojunction would make the dissociated photogenerated excitons more difficult to recombine. The persistent photoconductivity caused by charge trappi

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Rue Yie Lim, Dr. Muhammad Afiq Nurudin Bin Hamzah, N. Ezaila Alias, Michael Loong Peng Tan, and Izam Kamisian. "Implementation of 10 Transistor SRAM Computing-in-Memory for Binarized Multiply Accumulate Unit." ELEKTRIKA- Journal of Electrical Engineering 24, no. 1 (2025): 47–52. https://doi.org/10.11113/elektrika.v24n1.632.

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The von Neumann bottleneck is a major challenge in the development of energy-efficient processors capable of handling high-workload computations. Computing-in-memory (CiM) technique offers a promising solution to overcome the memory wall restrictions that limit performance. By embedding processing units directly into memory, CiM can mitigate issues of latency and energy consumption during memory access. In this study, we implemented a dual-port design method for a 10-Transistor (10T) SRAM bit-cell to perform Binarized Multiply-Accumulate operation using 45nm CMOS process technology. We use sev

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Kao, Hsu-Yu, Liang-Ying Su, Shih-Hsu Huang, and Wei-Kai Cheng. "A Neural Network Compiler for Efficient Data Storage Optimization in ReRAM-Based DNN Accelerators." Electronics 14, no. 12 (2025): 2352. https://doi.org/10.3390/electronics14122352.

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ReRAM-based DNN accelerators have emerged as a promising solution to mitigate the von Neumann bottleneck. While prior research has introduced tools for simulating the hardware behavior of ReRAM’s non-linear characteristics, there remains a notable gap in high-level design automation tools capable of efficiently deploying DNN models onto ReRAM-based accelerators with simultaneous optimization of execution time and memory usage. In this paper, we propose a neural network compiler built on the open-source TVM framework to address this challenge. The compiler incorporates both layer fusion and mod

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Blachowicz, Tomasz, and Andrea Ehrmann. "Magnetic Elements for Neuromorphic Computing." Molecules 25, no. 11 (2020): 2550. http://dx.doi.org/10.3390/molecules25112550.

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Neuromorphic computing is assumed to be significantly more energy efficient than, and at the same time expected to outperform, conventional computers in several applications, such as data classification, since it overcomes the so-called von Neumann bottleneck. Artificial synapses and neurons can be implemented into conventional hardware using new software, but also be created by diverse spintronic devices and other elements to completely avoid the disadvantages of recent hardware architecture. Here, we report on diverse approaches to implement neuromorphic functionalities in novel hardware usi

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Ying, Jiajie, Yan Liang, Guangyi Wang, Peipei Jin, Long Chen, and Guanrong Chen. "Action potential and chaos near the edge of chaos in memristive circuits." Chaos: An Interdisciplinary Journal of Nonlinear Science 32, no. 9 (2022): 093101. http://dx.doi.org/10.1063/5.0097075.

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Memristor-based neuromorphic systems have a neuro-bionic function, which is critical for possibly overcoming Moore's law limitation and the von Neumann bottleneck problem. To explore neural behaviors and complexity mechanisms in memristive circuits, this paper proposes an N-type locally active memristor, based on which a third-order memristive circuit is constructed. Theoretical analysis shows that the memristive circuit can exhibit not only various action potentials but also self-sustained oscillation and chaos. Based on Chua's theory of local activity, this paper finds that the neural behavi

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Lagorce, Xavier, and Ryad Benosman. "STICK: Spike Time Interval Computational Kernel, a Framework for General Purpose Computation Using Neurons, Precise Timing, Delays, and Synchrony." Neural Computation 27, no. 11 (2015): 2261–317. http://dx.doi.org/10.1162/neco_a_00783.

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There has been significant research over the past two decades in developing new platforms for spiking neural computation. Current neural computers are primarily developed to mimic biology. They use neural networks, which can be trained to perform specific tasks to mainly solve pattern recognition problems. These machines can do more than simulate biology; they allow us to rethink our current paradigm of computation. The ultimate goal is to develop brain-inspired general purpose computation architectures that can breach the current bottleneck introduced by the von Neumann architecture. This wor

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Zhou, Rong, and Hao Cai. "Time-domain computing for Boolean logic using STT-MRAM." AIP Advances 13, no. 2 (2023): 025102. http://dx.doi.org/10.1063/9.0000378.

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With the development of artificial intelligence, the separation of memory and processor in the traditional von-Neumann architecture has led to the bottleneck of data transmission hindering the development of energy efficient computing. The computing-in-memory (CIM) paradigm is expected to solve the problems of memory wall and power wall. In this work, we propose a time-domain (TD) computing scheme based on the spin transfer torque magnetic random access memory (STT-MRAM). Basic Boolean logic operations, such as AND/OR/Full-adder (FA), are implemented through converting the bit-line voltage to

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Sun, Zhaohui, Yang Feng, Peng Guo, et al. "Flash-based in-memory computing for stochastic computing in image edge detection." Journal of Semiconductors 44, no. 5 (2023): 054101. http://dx.doi.org/10.1088/1674-4926/44/5/054101.

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Abstract The “memory wall” of traditional von Neumann computing systems severely restricts the efficiency of data-intensive task execution, while in-memory computing (IMC) architecture is a promising approach to breaking the bottleneck. Although variations and instability in ultra-scaled memory cells seriously degrade the calculation accuracy in IMC architectures, stochastic computing (SC) can compensate for these shortcomings due to its low sensitivity to cell disturbances. Furthermore, massive parallel computing can be processed to improve the speed and efficiency of the system. In this pape

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He, Zhen-Yu, Tian-Yu Wang, Jia-Lin Meng, et al. "CMOS Back-end compatible memristors for in-situ digital and neuromorphic computing application." Materials Horizons, 2021. http://dx.doi.org/10.1039/d1mh01257f.

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In-memory logic calculations and brain-inspired artificial synaptic neuromorphic computing are expected to solve the bottleneck of traditional von Neumann computing architecture. The data processing efficiency of the traditional von Neumann...

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39

Chen, Yang, Haoming Wei, Yangqing Wu, Tengzhou Yang, and Bingqiang Cao. "Photovoltaic Memristor based on Photoelectric Synaptic Plasticity of Bulk Photovoltaic Effect." Journal of Materials Chemistry C, 2022. http://dx.doi.org/10.1039/d2tc03800e.

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40

Choi, Moon Gu, Jae Hyun In, Hanchan Song, et al. "Demonstration of a novel Majority logic in the memristive crossbar array for in-memory parallel computing." Materials Horizons, 2024. http://dx.doi.org/10.1039/d4mh01196a.

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Memristive crossbar array can execute Boolean logic operations directly within the memory, which is highly noteworthy as it addresses the data bottleneck issue in traditional von Neumann computing. Although its...

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41

He, Lin, Zuchong Yang, Zhiming Wang, Tim Olivier Leydecker, and Emanuele Orgiu. "Organic multilevel (opto)electronic memories towards neuromorphic applications." Nanoscale, 2023. http://dx.doi.org/10.1039/d3nr01311a.

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In the past decades, neuromorphic computing has attracted the interest of the scientific community due to its potential to circumvent the von Neumann bottleneck. Organic materials, owing to their fine...

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42

Feng, Zihao, Ahmed Elewa, Islam Mekhemer, et al. "Covalent Organic Polymer Based Transistor with Multifunctional Memory and Synaptic Functions." Journal of Materials Chemistry C, 2024. http://dx.doi.org/10.1039/d3tc03026a.

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Inspired by biological systems that are highly connected and can process massive amounts of data, neuromorphic transistor may overcome the tranditional von Neumann bottleneck. In this work, an organic synaptic...

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43

Yan, Xiaobing, Jianhui Zhao, Yunfeng Ran, et al. "Memristors based in NdNiO3 nanocrystals film as sensory neurons for neuromorphic computing." Materials Horizons, 2023. http://dx.doi.org/10.1039/d3mh00835e.

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By mimicking the human brain behavior, artificial neural systems offer the possibility to further improve computing efficiency and solve the von Neumann bottleneck. In particular, the neural system with perceptual...

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44

Cao, Yixin, Yuanxi Li, Ganggui Zhu, et al. "Advances in Perovskite-Based Neuromorphic Computing Devices." Nanoscale, 2025. https://doi.org/10.1039/d5nr00335k.

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Neuromorphic computing devices, inspired by the architecture and functionality of the human brain, offer a promising solution to the limitations imposed by the von Neumann bottleneck on contemporary computing systems....

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45

Nandi, Sanju, Sirsendu Ghosal, M. Meyyappan, and P. K. Giri. "Defect-engineered 2DBi2Se3-based broadband optoelectronic synapses with ultralow energy consumption for neuromorphic computing." Materials Horizons, 2025. https://doi.org/10.1039/d4mh01625d.

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Optoelectronic synapses (OES) inspired by the human brain have gained attention in addressing the von Neumann bottleneck facing traditional computing. Numerous candidates, including topological insulators and other 2D materials, have...

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46

Sarkar, Prasenjit, Litty Thomas Manamel, Puranjay Saha, et al. "A Triradical-Containing Trinuclear Pd(II) Complex: Spin-Polarized Electronic Transmission, Analog Resistive Switching and Neuromorphic Advancements." Materials Horizons, 2024. http://dx.doi.org/10.1039/d4mh00928b.

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Neuromorphic computation has emerged as a potential alternative to subvert the von Neumann bottleneck issue in conventional computing. In this context, the development of resistive switching-based memristor devices mimicking various...

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Liu, Yongkai, Tian-Yu Wang, Kangli Xu, et al. "Low-Power and High-Speed HfLaO-based FE-TFTs for Artificial Synapse and Reconfigurable Logic Applications." Materials Horizons, 2023. http://dx.doi.org/10.1039/d3mh01461d.

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Emulating the human nervous system to build next-generation computing architectures is considered a promising way to solve the von Neumann bottleneck. Transistors based on ferroelectric layers are strong contenders for...

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Zhu, Chen, Tenglong Guo, Hanyu Zhang, et al. "Mimicking Excitatory and Inhibitory Behaviors with Optical-Absorption and Electrical-Switch Heterostructures." Journal of Materials Chemistry C, 2025. https://doi.org/10.1039/d5tc01522g.

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Inspired by human brain neural networks, two-terminal optoelectronic synaptic devices could process large amounts of information and promise to pave the way for overcoming the von Neumann bottleneck in non-traditional...

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Sachan, Pradeep, Anwesha Mahapatra, Rajwinder Kaur, Lalith Adithya Sai Channapragada, Subham Sahay, and Prakash Chandra Mondal. "Electrosynthesis of Molecular Memory Elements." Chemical Science, 2025. https://doi.org/10.1039/d4sc08461f.

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The increasing pace of computing beyond Moore’s law scaling and the von Neumann bottleneck necessitates a universal memory solution that offers high speed, low-power consumption, scalability, and non-volatility, such as...

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Singh, Deependra Kumar, and Govind Gupta. "Brain-Inspired Computing: Can 2D Materials Bridge the Gap Between Biological and Artificial Neural Networks?" Materials Advances, 2024. http://dx.doi.org/10.1039/d4ma00133h.

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The era of data science with data flood actively demands development of excellent non-volatile storage (NVS) and computing devices, which can overcome the memory bottleneck of the traditional von-Neumann structure-based...

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