Relevant bibliographies by topics / Write Endurance

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'Write Endurance'

Author: Grafiati
Published: 4 June 2021
Last updated: 9 February 2022

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Journal articles on the topic "Write Endurance"

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SUGIBAYASHI, T., T. HONDA, N. SAKIMURA, S. TAHARA, and N. KASAI. "MRAM Applications Using Unlimited Write Endurance." IEICE Transactions on Electronics E90-C, no. 10 (2007): 1936–40. http://dx.doi.org/10.1093/ietele/e90-c.10.1936.

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Bauer, M., R. Lopusnik, J. Fassbender, B. Hillebrands, J. Bangert, and J. Wecker. "Switching dynamics and write endurance of magnetic tunnel junctions." Journal of Applied Physics 91, no. 1 (2002): 543. http://dx.doi.org/10.1063/1.1423784.

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Choi, Jun Hyeong, Kyung Min Kim, and Jong Wook Kwak. "TA-CLOCK: Tendency-Aware Page Replacement Policy for Hybrid Main Memory in High-Performance Embedded Systems." Electronics 10, no. 9 (2021): 1111. http://dx.doi.org/10.3390/electronics10091111.

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Recently, high-performance embedded systems have adopted phase change memory (PCM) as their main memory because PCMs have attractive advantages, such as non-volatility, byte-addressability, high density, and low power consumption. However, PCMs have disadvantages, such as limited write endurance in each cell and high write latency compared to DRAMs. Therefore, researchers have investigated methods for enhancing the limitations of PCMs. In this paper, we propose a page replacement policy called tendency-aware CLOCK (TA-CLOCK) for the hybrid main memory of embedded systems. To improve the limited write endurance of PCMs, TA-CLOCK classifies the page access tendency of the victim page through access pattern analysis and determines the migration location of the victim page. Through the classification of the page access tendency, TA-CLOCK reduces unnecessary page migrations from DRAMs to PCMs. Unnecessary migrations cause an increase in write operations in PCMs and the energy consumption of the hybrid main memory in embedded systems. Thus, our proposed policy improves the limited write endurance of PCMs and enhances the access latency of the hybrid main memory of embedded systems by classifying the page access tendency. We compared the TA-CLOCK with existing page replacement policies to evaluate its performance. In our experiments, TA-CLOCK reduced the number of write operations in PCMs by 71.5% on average, and it enhanced the energy delay product by 38.3% on average compared with other page replacement policies.
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Mittal, Sparsh, and Jeffrey S. Vetter. "Reliability Tradeoffs in Design of Volatile and Nonvolatile Caches." Journal of Circuits, Systems and Computers 25, no. 11 (2016): 1650139. http://dx.doi.org/10.1142/s0218126616501395.

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Researchers have explored both volatile memories (e.g., SRAM and embedded DRAM) and nonvolatile memories (NVMs, such as resistive RAM) for design of on-chip caches. However, both volatile and nonvolatile memories present unique reliability challenges. NVMs are immune to radiation-induced soft errors, however, due to their limited write endurance, they are vulnerable to hard errors under nonuniform write distribution. By contrast, SRAM has high write endurance but is susceptible to soft errors due to cosmic radiation. SRAM–NVM hybrid caches and the management techniques for them aim to bring the best of SRAM and NVM together, however, the reliability implications of them have not been well understood. In this paper, we show that there are inherent tradeoffs in improving resilience to hard and soft errors in hybrid caches such that mitigating one may result in aggravating another. We confirm this by experiments with two recent hybrid cache management techniques. We also re-examine cache design trends in modern processors from reliability perspective. This paper provides valuable insights to system developers for making reliability-aware design decisions.
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Guo, Jie, Chuhan Min, Tao Cai, and Yiran Chen. "Improving Write Performance and Extending Endurance of Object-Based NAND Flash Devices." ACM Transactions on Embedded Computing Systems 17, no. 1 (2018): 1–26. http://dx.doi.org/10.1145/3105924.

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Wu, Lei, Hongxia Liu, Jinfu Lin, and Shulong Wang. "Self-Compliance and High Performance Pt/HfOx/Ti RRAM Achieved through Annealing." Nanomaterials 10, no. 3 (2020): 457. http://dx.doi.org/10.3390/nano10030457.

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A self-compliance resistive random access memory (RRAM) achieved through thermal annealing of a Pt/HfOx/Ti structure. The electrical characteristic measurements show that the forming voltage of the device annealing at 500 °C decreased, and the switching ratio and uniformity improved. Tests on the device’s cycling endurance and data retention characteristics found that the device had over 1000 erase/write endurance and over 105 s of lifetime (85 °C). The switching mechanisms of the devices before and after annealing were also discussed.
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Chen, Zheng Guo, Nong Xiao, Fang Liu, Yu Xuan Xing, and Zhen Sun. "Using FPGA to Accelerate Deduplication on High-Performance SSD." Advanced Materials Research 1042 (October 2014): 212–17. http://dx.doi.org/10.4028/www.scientific.net/amr.1042.212.

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Data deduplication technology applied in solid state disks (SSD), can reduce the amount of write operations and garbage collection, and thus improve writing performance and prolong lifetime. With the significant increase of write performance onto SSD, whether deduplication based on SSD could be a performance bottleneck of SSD comes to a spot worthy of our attention. To this end, this paper, firstly, performs an experiment on achieving deduplication via software method, and reveals that software-based deduplication decreases SSD's read and write performance. And then a hardware-based deduplication with details is proposed and implemented to accelerate deduplication using FPGA, and expected results are achieved. Finally, we come to the conclusion that hardware-based deduplication can not only guarantee read and write performance of SSD, but also save storage capacity and enhance endurance.
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Zhang, Tiefei, Jixiang Zhu, Jun Fu, and Tianzhou Chen. "CWC: A Companion Write Cache for Energy-Aware Multi-Level Spin-Transfer Torque RAM Cache Design." Journal of Circuits, Systems and Computers 24, no. 06 (2015): 1550079. http://dx.doi.org/10.1142/s0218126615500796.

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Due to its large leakage power and low density, the conventional SARM becomes less appealing to implement the large on-chip cache due to energy issue. Emerging non-volatile memory technologies, such as phase change memory (PCM) and spin-transfer torque RAM (STT-RAM), have advantages of low leakage power and high density, which makes them good candidates for on-chip cache. In particular, STT-RAM has longer endurance and shorter access latency over PCM. There are two kinds of STT-RAM so far: single-level cell (SLC) STT-RAM and multi-level cell (MLC) STT-RAM. Compared to the SLC STT-RAM, the MLC STT-RAM has higher density and lower leakage power, which makes it a even more promising candidate for future on-chip cache. However, MLC STT-RAM improves density at the cost of almost doubled write latency and energy compared to the SLC STT-RAM. These drawbacks degrade the system performance and diminish the energy benefits. To alleviate these problems, we propose a novel cache organization, companion write cache (CWC), which is a small fully associative SRAM cache, working with the main MLC STT-RAM cache in a master-and-servant way. The key function of CWC is to absorb the energy-consuming write updates from the MLC STT-RAM cache. The experimental results are promising that CWC can greatly reduce the write energy and dynamic energy, improve the performance and endurance of MLC STT-RAM cache compared to a baseline.
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Melianas, A., T. J. Quill, G. LeCroy, et al. "Temperature-resilient solid-state organic artificial synapses for neuromorphic computing." Science Advances 6, no. 27 (2020): eabb2958. http://dx.doi.org/10.1126/sciadv.abb2958.

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Devices with tunable resistance are highly sought after for neuromorphic computing. Conventional resistive memories, however, suffer from nonlinear and asymmetric resistance tuning and excessive write noise, degrading artificial neural network (ANN) accelerator performance. Emerging electrochemical random-access memories (ECRAMs) display write linearity, which enables substantially faster ANN training by array programing in parallel. However, state-of-the-art ECRAMs have not yet demonstrated stable and efficient operation at temperatures required for packaged electronic devices (~90°C). Here, we show that (semi)conducting polymers combined with ion gel electrolyte films enable solid-state ECRAMs with stable and nearly temperature-independent operation up to 90°C. These ECRAMs show linear resistance tuning over a >2× dynamic range, 20-nanosecond switching, submicrosecond write-read cycling, low noise, and low-voltage (±1 volt) and low-energy (~80 femtojoules per write) operation combined with excellent endurance (>109 write-read operations at 90°C). Demonstration of these high-performance ECRAMs is a fundamental step toward their implementation in hardware ANNs.
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Dong, Guiqiang, Yangyang Pan, and Tong Zhang. "Using Lifetime-Aware Progressive Programming to Improve SLC NAND Flash Memory Write Endurance." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22, no. 6 (2014): 1270–80. http://dx.doi.org/10.1109/tvlsi.2013.2267753.

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Dissertations / Theses on the topic "Write Endurance"

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Salman, Mohammed. "Towards Improving Endurance and Performance in Flash Storage Clusters." Thesis, Virginia Tech, 2017. http://hdl.handle.net/10919/86413.

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NAND flash-based Solid State Devices (SSDs) provide high performance and energy efficiency and at the same time their capacity continues to grow at an unprecedented rate. As a result, SSDs are increasingly being used in high end computing systems such as supercomputing clusters. However, one of the biggest impediments to large scale deployments is the limited erase cycles in flash devices. The natural skewness in I/O workloads can results in Wear imbalance which has a significant impact on the reliability, performance as well as lifetime of the cluster. Current load balancers for storage systems are designed with a critical goal to optimize performance. Data migration techniques are used to handle wear balancing but they suffer from a huge metadata overhead and extra erasures. To overcome these problems, we propose an endurance-aware write off-loading technique (EWO) for balancing the wear across different flash-based servers with minimal extra cost. Extant wear leveling algorithms are designed for a single flash device. With the use of flash devices in enterprise server storage, the wear leveling algorithms need to take into account the variance of the wear at the cluster level. EWO exploits the out-of-place update feature of flash memory by off- loading the writes across flash servers instead of moving data across flash servers to mitigate extra-wear cost. To evenly distribute erasures to flash servers, EWO off-loads writes from the flash servers with high erase cycles to the ones with low erase cycles by first quantitatively calculating the amount of writes based on the frequency of garbage collection. To reduce metadata overhead caused by write off-loading, EWO employs a hot-slice off-loading policy to explore the trade-offs between extra-wear cost and metadata overhead. Evaluation on a 50 to 200 node SSD cluster shows that EWO outperforms data migration based wear balancing techniques, reducing up to 70% aggregate extra erase cycles while improving the write performance by up to 20% compared to data migration.
Master of Science
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Wang, Mingyang. "Improving Performance And Reliability Of Flash Memory Based Solid State Storage Systems." University of Cincinnati / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1470757497.

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"TWEEN: toward write eciency and endurance in SSD RAID using non-volatile cache." 2014. http://repository.lib.cuhk.edu.hk/en/item/cuhk-1292115.

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Ding, Qian.
Thesis M.Phil. Chinese University of Hong Kong 2014.
Includes bibliographical references (leaves 71-80).
Abstracts also in Chinese.
Title from PDF title page (viewed on 19, December, 2016).
Ding, Qian.
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Book chapters on the topic "Write Endurance"

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Peterson, Michael. "Responsibility and the Non(bio)degradable." In Eco-Deconstruction. Fordham University Press, 2018. http://dx.doi.org/10.5422/fordham/9780823279500.003.0011.

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“Responsibility and the Non(bio)degradable” is an effort to take seriously a claim found in the Human Interference Task Force’s report on the possibility of future generations compromising the isolation of interred nuclear waste materials at the Waste Isolation Pilot Plant. The HITF writes: “Future societies with knowledge of the existence and location of the repository, its contents, and risks of interference bear the full responsibility for any of their actions that can reasonably be expected to adversely affect the performance of the repository.” Through a reading of Jacques Derrida’s “Biodegradables: Seven Diary Fragments,” the chapter argues that the notion of “full responsibility” is inadequate to a thinking of responsibilities toward and of future generations. By thinking the endurance of nuclear waste through Derrida’s reading of “(bio)degradability” and “non(bio)degradability”—here thought alongside the well-known Derridean watchword “iterability”—the reader comes to see the necessity of thinking the impossibility of responsibility ever being inherited in its entirety or coming to an end for any generation in particular. As such, a more rigorous development of responsibility is called for, especially when applied to material or environmental problems.
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Copeland, Jack, and Jonathan Bowen. "Life and work." In The Turing Guide. Oxford University Press, 2017. http://dx.doi.org/10.1093/oso/9780198747826.003.0007.

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A few months after Alan Turing’s tragically early death, in 1954, his colleague Geoffrey Jefferson (professor of neurosurgery at Manchester University) wrote what might serve as Turing’s epitaph: Alan in whom the lamp of genius burned so bright—too hot a flame perhaps it was for his endurance. He was so unversed in worldly ways, so childlike it sometimes seemed to me, so unconventional, so non-conform[ing] to the general pattern. His genius flared because he had never quite grown up, he was I suppose a sort of scientific Shelley. After his short but brilliant career Alan Mathison Turing’s life ended 15 days short of his fortysecond birthday.2 His ideas lived on, however, and at the turn of the millennium Time magazine listed him among the twentieth-century’s one hundred greatest minds, alongside the Wright brothers, Albert Einstein, DNA busters Crick and Watson, and Alexander Fleming, the discoverer of penicillin.3 Turing’s achievements during his short lifetime were legion. Best known as the mathematician who broke some of Nazi Germany’s most secret codes, Turing was also one of the ringleaders of the computer revolution. Today, all who click, tap, or touch to open are familiar with the impact of his ideas. We take for granted that we use the same slab of hardware to shop, manage our finances, type our memoirs, play our favourite music and videos, and send instant messages across the street or around the world. In an era when ‘computer’ was the term for a human clerk who did the sums in the back office of an insurance company or science lab, Turing envisaged a ‘universal computing machine’, able to do anything that a programmer could pin down in the form of a series of instructions. He could not have foreseen this at the time, but his universal computing machine changed the way we live: it eventually caught on like wildfire, with sales of personal computers now hovering around the million a day mark. Turing’s universal machine transported us into a world where many young people have never known life without the Internet.
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Gross, Alan G. "Rachel Carson: The Ethical Sublime." In The Scientific Sublime. Oxford University Press, 2018. http://dx.doi.org/10.1093/oso/9780190637774.003.0012.

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Rachel Carson has become Saint Rachel, canonized time and again by the environmental movement. May 27, 2007, marked the 100th anniversary of her birth. In that year, the Cape Cod Museum of Natural History in Brewster, Massachusetts, hosted a major Rachel Carson centennial exhibition. The show was a partnership project of the museum and the US Fish and Wildlife Service, and it featured artifacts, writings, photographs, and artwork from Carson’s life and career. In 2012, the 50th anniversary of the publication of Silent Spring was commemorated by a Coastal Maine Botanical Gardens event and exhibit. From September 7 through October 23, the exhibit presented artwork, photos, and interpretive panels in the visitor center. Canonization, and the posthumous fame it bestows, comes at a price: the disappearance of the Rachel Carson whose work was driven by two forces. The first was the love of nature. A perceptive review of The Sea Around Us compares Carson with great science writers who share with her a love of nature: . . . It is not an accident of history that Gilbert White and Charles Darwin described flora and fauna with genius, nor that the great mariners and voyagers in distant lands can re-create their experiences as part of our own. They wrote as they saw and their honest, questing eye, their care for detail is raised to the power of art by a deep-felt love of nature, and respect for all things that live and move and have their being. . . . The second force was the love of a woman, Dorothy Freeman, a person who in Carson’s view made her later life endurable and her later work possible: . . . All I am certain of is this: that it is quite necessary for me to know that there is someone who is deeply devoted to me as a person, and who also has the capacity and the depth of understanding to share, vicariously, the sometimes crushing burden of creative effort, recognizing the heartache, the great weariness of mind and body, the occasional black despair it may involve—someone who cherishes me and what I am trying to create, as well. . . .
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"Getting his start producing lms with American director Paul Williams in the UK, Edward R. Pressman set the tone for his lmmaker-driven, globally-minded independent lm career. With more than 80 titles to his credit now, Pressman continues to make lms with an indie edge, while also keeping his eye on opportunities in foreign markets. Pressman established a New York-based production hub with Williams in the late 1960s and bankrolled their rst productions with support from his family’s toy business. After Williams decided to stop making lms, Pressman continued to produce. Over the years, he has helped launch the careers of an eclectic range of directors. The maverick producer made early lms by Brian De Palma, Terrence Malick, Oliver Stone, Kathryn Bigelow, Alex Proyas, and crossover talents such as musician David Byrne (True Stories, 1986), among others. Pressman has had ongoing collaborations with many, particularly with Stone: He produced Stone’s feature debut, horror-thriller The Hand (1981), followed by Wall Street (1987), Talk Radio (1988), and sequel Wall Street: Money Never Sleeps (2010). Pressman and Stone have worked together as producers on multiple lms, such as Bigelow’s Blue Steel (1989) and Barbet Schroeder’s Reversal of Fortune (1990). Stone also co-wrote Conan the Barbarian (1982), which he developed with the producer. Pressman has also collaborated many times with Abel Ferrara, starting with his cult lm Bad Lieutenant (1992). Pressman and Malick continue to make lms together through their Sunower Productions label. So far, Sunower has yielded ve projects marked by evocative imagery and global talent and subjects: Ethiopian runner Haile Gebrselassie biopic Endurance (1999), Zhang Yimou’s comedy Happy Times (2000), Hans Petter Moland’s Vietnam GI child drama The Beautiful Country (2004), David Gordon Green’s thriller Undertow (2004), and Michael Apted’s transatlantic slave trade period drama Amazing Grace (2006). Pressman’s eponymous production label continues to churn out lmmaker-driven projects spanning various genres. And the producer is also making the most out of his prior successes with new lms and television series inspired by iconic lms from the Pressman library." In FilmCraft: Producing. Routledge, 2013. http://dx.doi.org/10.4324/9780240823881-54.

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Conference papers on the topic "Write Endurance"

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Saraf, Puneet, and Madhu Mutyam. "Endurance enhancement of write-optimized STT-RAM caches." In MEMSYS '19: The International Symposium on Memory Systems. ACM, 2019. http://dx.doi.org/10.1145/3357526.3357538.

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Hui Sun, Guodong Chen, Xu Liang, and Wei Liu. "Exploring SSD endurance model based on write amplification and temperature." In 2016 Seventh International Green and Sustainable Computing Conference (IGSC). IEEE, 2016. http://dx.doi.org/10.1109/igcc.2016.7892596.

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Ning, Sheyang, Tomoko Ogura Iwasaki, and Ken Takeuchi. "Write stress reduction in 50nm AlxOy ReRAM improves endurance 1.4× and write time, energy by 17%." In 2013 5th IEEE International Memory Workshop (IMW). IEEE, 2013. http://dx.doi.org/10.1109/imw.2013.6582097.

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Han, Se Jun, Dong Hyun Kang, and Young Ik Eom. "Hybrid write buffer algorithm for improving performance and endurance of nand flash storages." In 2016 IEEE International Conference on Consumer Electronics (ICCE). IEEE, 2016. http://dx.doi.org/10.1109/icce.2016.7430530.

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Endoh, T., R. Shirota, Y. Tanaka, et al. "New design technology for EEPROM memory cells with 10 million write/erase cycling endurance." In Proceedings of IEEE International Electron Devices Meeting. IEEE, 1989. http://dx.doi.org/10.1109/iedm.1989.74352.

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Berman, Amit, and Yitzhak Birk. "Integrating de-duplication and write for increased performance and endurance of Solid-State Drives." In Electronics Engineers in Israel (IEEEI 2010). IEEE, 2010. http://dx.doi.org/10.1109/eeei.2010.5662097.

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Zhu, Yu, S. Kim, J. Gonsalves, et al. "Investigation of Phase Change Memory Confined Cell Endurance Using Transmission Electron Microscopy." In ISTFA 2016. ASM International, 2016. http://dx.doi.org/10.31399/asm.cp.istfa2016p0472.

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Abstract The endurance performance of a novel confined phase change memory cell with metallic nitride liner is investigated using a transmission electron microscope (TEM). Write endurance has been shown to be substantially improved by this new structure [1]. Memory cells that had been cycled up to 109 were cross-sectioned and studied using the TEM. A majority of the electrically observed endurance failure mechanisms were stuck-SET. Physical failure analysis showed the failed cell is always associated with large void formation and material segregation. In-situ TEM analysis was used to study the void formation, accumulation and movement, where the memory cell was simultaneously operated and imaged in the TEM. Also, an interesting self-healing process of the void was recorded during the set/reset operation.
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Kawahara, A., K. Kawai, Y. Ikeda, et al. "Filament scaling forming technique and level-verify-write scheme with endurance over 107 cycles in ReRAM." In 2013 IEEE International Solid-State Circuits Conference (ISSCC 2013). IEEE, 2013. http://dx.doi.org/10.1109/isscc.2013.6487708.

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Cintra, Marcelo, and Niklas Linkewitsch. "Characterizing the impact of process variation on write endurance enhancing techniques for non-volatile memory systems." In the ACM SIGMETRICS/international conference. ACM Press, 2013. http://dx.doi.org/10.1145/2465529.2465755.

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Matsui, Chihiro, and Ken Takeuchi. "22% Higher performance, 2x SCM write endurance heterogeneous storage with dual storage class memory and NAND flash." In ESSDERC 2017 - 47th IEEE European Solid-State Device Research Conference (ESSDERC). IEEE, 2017. http://dx.doi.org/10.1109/essderc.2017.8066578.

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