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Dissertations / Theses on the topic 'Low Thermal Budget'

Author: Grafiati

Published: 9 March 2023

Last updated: 31 July 2025

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1

Schiz, Frank Jochen Wilhelm. "The effect of fluorine in low thermal budget polysilicon emitters for SiGe heterojunction bipolar transistors." Thesis, University of Southampton, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.287345.

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2

Krockert, Katja. "Development and characterization of a low thermal budget process for multi-crystalline silicon solar cells." Doctoral thesis, Technische Universitaet Bergakademie Freiberg Universitaetsbibliothek "Georgius Agricola", 2016. http://nbn-resolving.de/urn:nbn:de:bsz:105-qucosa-192742.

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Higher conversion efficiencies while reducing costs at the same time is the ultimate goal driving the development of solar cells. Multi-crystalline silicon has attracted considerable attention because of its high stability against light soaking. In case of solar grade multi-crystalline silicon the rigorous control of metal impurities is desirable for solar cell fabrication. It is the aim of this thesis to develop a new manufacturing process optimized for solar-grade multi-crystalline silicon solar cells. In this work the goal is to form solar cell emitters in silicon substrates by plasma immer

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3

Saidi, Bilel. "Metal gate work function modulation mechanisms for 20-14 nm CMOS low thermal budget integration." Toulouse 3, 2014. http://www.theses.fr/2014TOU30300.

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Afin de poursuivre la miniaturisation des dispositifs CMOS, l'empilement HfO2/Métal a remplacé l'empilement SiO2/polySi. Cependant, la diffusion incontrôlée des espèces chimiques dans ces nouveaux empilements fabriqués avec un fort budget thermique compromet l'obtention des travaux de sortie (EWF) et des épaisseurs d'oxyde équivalent (EOT) définis par l'ITRS. Une solution consiste à utiliser une intégration à plus bas budget thermique. Avec cette nouvelle approche, l'objectif de ce travail de thèse était de comprendre les paramètres physiques permettant d'obtenir une EOT<1nm et des EWF perm

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4

Krockert, Katja [Verfasser], Hans-Joachim [Akademischer Betreuer] Möller, Hans-Joachim [Gutachter] Möller, and Gerhard [Gutachter] Gobsch. "Development and characterization of a low thermal budget process for multi-crystalline silicon solar cells : Development and characterization of a low thermal budget process for multi-crystalline silicon solar cells / Katja Krockert ; Gutachter: Hans-Joachim Möller, Gerhard Gobsch ; Betreuer: Hans-Joachim Möller." Freiberg : Technische Universitaet Bergakademie Freiberg Universitaetsbibliothek "Georgius Agricola", 2016. http://d-nb.info/1220912336/34.

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5

Gregory, Hayden J. "Low thermal budget issues for Si/Siâ†1â†-â†xGeâ†x heterojunction bipolar transistors and selective epitaxial Si bipolar transistors." Thesis, University of Southampton, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.361660.

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6

BIETTI, SERGIO. "Nanostructured III-V epilayers on silicon substrate for optoelectronic applications." Doctoral thesis, Università degli Studi di Milano-Bicocca, 2011. http://hdl.handle.net/10281/18979.

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The integration of III-V devices on Si substrates would allow the fabrication of specialized devices for optoelectronics and photonics directly on the highly refined silicon infrastructure, based on CMOS technology. In this work of thesis, Droplet Epitaxy technique is used for the low thermal budget fabrication of GaAs quantum nanostructures on silicon substrates through a Ge layer and for the fabrication of GaAs local artificial substrates directly on Si substrate. Quantum nanostructures grown on Si substrate through a Ge layer showed an intense photoluminescence emission, detectable up to ro

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7

Chang, Chung-Yih, and 張忠義. "Low Temperature Electron Cyclotron Resonance Oxidation with Low Thermal Budget Annealing." Thesis, 1995. http://ndltd.ncl.edu.tw/handle/64384961082973421703.

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碩士<br>國立交通大學<br>電子研究所<br>83<br>In this thesis,we successfully utilize the rapid thermal O2, N2, and N2O annealing technology to improve the quality of the ultra-low temperature (-20?C) electron cyclotron resonance (ECR) thin oxide. Among the three kinds of annealing technology, the N2O annealed oxide is found to have the better electrical characteristics due to the Si-N bonds in place of the weaker bonds at the Si/SiO2 interface. The breakdwon field( over 12.5 MV/cm), Dit (1.95e10cm-2eV-1)

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8

Harn, Shyh-Chyang, and 韓士強. "A Study of Shallow Junction Formation by Using Low Thermal Budget." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/78378584814180772272.

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碩士<br>國立臺灣科技大學<br>電子工程系<br>87<br>The scaling of CMOS devices to satisfy deep submicrometer technology requirements involves several process adjustments . One of the main challenges is the formation of shallow junction . Low-energy ion implantation , in tandem with low-thermal budget annealing processes , allows us to form shallower junctions . To adopt a low thermal budget scheme , we employed long-time low-temperature furnace annealing and rapid thermal annealing（RTA）as an approach of activating the implanted dopants without significant diffusion and eliminating the implanted-induced defects

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9

Wang, Yu-Da, and 王裕達. "The fabrication and characterization of low-thermal-budget poly-Si TFTs." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/63928685294274586306.

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10

Huang, Tzu-En, and 黃子恩. "Visible and Far Infrared Laser Annealing-enabled Low Thermal Budget Ge Transistor." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/248766.

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11

Krockert, Katja. "Development and characterization of a low thermal budget process for multi-crystalline silicon solar cells: Development and characterization of a low thermal budget process for multi-crystalline silicon solar cells." Doctoral thesis, 2015. https://tubaf.qucosa.de/id/qucosa%3A23014.

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Higher conversion efficiencies while reducing costs at the same time is the ultimate goal driving the development of solar cells. Multi-crystalline silicon has attracted considerable attention because of its high stability against light soaking. In case of solar grade multi-crystalline silicon the rigorous control of metal impurities is desirable for solar cell fabrication. It is the aim of this thesis to develop a new manufacturing process optimized for solar-grade multi-crystalline silicon solar cells. In this work the goal is to form solar cell emitters in silicon substrates by plasma immer

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12

Teng, Li-Feng, and 鄧立峯. "Study on transparent oxide thin film transistors with low thermal budget post-treatments." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/78056947262316473209.

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博士<br>國立交通大學<br>光電工程研究所<br>101<br>Recently, transparent metal oxide semiconductor attracts great attention due to the characteristics of high mobility, high transparency, room temperature deposited, and high process compatibility with present solid-state semiconductor technologies. Among several novel oxide semiconductors, amorphous InGaZnO (a-IGZO) thin film received considerable attention for their use in next-generation active matrix liquid crystal display (AMLCD) and active-matrix organic light-emitting diode display (AMOLED) technologies. The sputter-deposited a-IGZO active layer typicall

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13

Lo, Fa-Sain, and 羅法聖. "Low Temperature & High Strength Wafer Bonding : A Green Technology towards Lower Thermal Budget." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/258rpt.

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博士<br>國立中央大學<br>機械工程學系<br>103<br>Wafer bonding is the core technology for semiconductor industry and related micro/nano devices. It has made significant innovation in recent years for its widely applications, such as silicon on insulator、high performance microelectronics、micro-electromechanical systems、3D IC and optoelectronics, etc. Today, as energy saving and carbon reduction is continuing to evolve, wafer bonding technology is needed to innovate for the green earth. Different bonding materials do not present difficulty for wafer bonding, but thermal mismatch imposes a severe limitation on t

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14

Huang, Yu-Shu, and 黃郁書. "Visible and Far Infrared Laser Annealing-enabled Low Thermal Budget SiGe Nano-scaled Transistor." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/67006893370454453698.

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碩士<br>國立交通大學<br>光電工程研究所<br>103<br>In this thesis, the amorphous SiGe thin film is deposited by ICPCVD at low temperature of 450oC, the SiGe thin film is then crystallized by visible laser crystallization (λ=532 nm). The grain size of as-crystallized poly-SiGe thin films range from 500 nm to 600 nm. It is found that germanium segregation is observed after laser crystallization. It causes germanium-rich region on surface of the thin film. Thus, Chemical Mechanical Polishing (CMP) is used to polish high germanium concentration region and smoothen the surface to obtain thin and flat ploy SiGe film

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15

Huang, Wen-Hsien, and 黃文賢. "Low Thermal Budget Amorphous Silicon for Fabrication of Photovoltaic and Non-volatile Memory Devices." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/61524689266630700346.

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博士<br>國立交通大學<br>材料科學與工程學系所<br>104<br>The demand for system on panel (SoP) and monolithic 3D integration is increasing for realizing devices with high density and operation speed and low power consumption to fabricate future chip integration. However, the conventional high thermal processes constrain this realization; thus developing low thermal budget processes is essential. In this thesis, we investigated the material characteristics of low thermal budget amorphous Si (a-Si) thin-film for fabrication of low thermal budget photovoltaics and field effect transistors. Furthermore, we developed a

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16

Marvin-Ueng and 翁茂元. "Improvement of 4H-SiC MIS Capacitor Interface State Density by Low Thermal Budget Processes." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/96212313344306166188.

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碩士<br>國立交通大學<br>電子研究所<br>100<br>Silicon carbide (SiC) is suitable for fabricating high power semiconductor devices because of its wide band-gap and high thermal conductivity. Unfortunately, low channel mobility occurs on the 4H-SiC MOSFETs due to the high SiO2/SiC interface state density. How to reduce interface state density is an important issue. In this thesis, several low thermal budget processes to reduce interface state density are evaluated. Electrical parameters including interface state density and breakdown field distribution are analyzed. The effect of process conditions on interfac

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17

Chueh-Kuei, Jan, and 詹爵魁. "Characteristics of Pulsed-Laser Deposition (Pb0.6Sr0.4)TiO3 Thin Films with Low Thermal Budget Post Treatment." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/85786501585430724757.

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碩士<br>國立交通大學<br>電子工程系<br>91<br>Since high temperature post-annealing for ferroelectric materials was usually required to get the fine crystallinity and ferroelectric characteristics. But many trouble issues was induced by the high thermal budget, such as the inter-diffusion of ferroelectric and substrate, and the deformation of junction profile etc. Therefore it is essential for the reduction of post-annealing temperature in order to make the ferroelectric material compatible the Si-base fabrication process. In this these, low temperature and low thermal budget for fabrication and post-anneali

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18

Chen, Yu Hsiu, and 陳譽修. "Application of Low Thermal Budget Far Infrared Ray Laser Technology on 3D Stackable Poly-Si FET." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/daphh4.

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碩士<br>國立清華大學<br>電子工程研究所<br>104<br>In this thesis, we propose low thermal budget laser technologies to fabricate high-performance 3D stackable poly-Si FET, including green nanosecond laser used to produce high-quality poly-Si channel, far infrared ray laser used to anneal source / drain regions after ion implantation and form the metal silicide layer on the source / drain, thereby improves the device performance. Green nanosecond laser is employed to transform the channel layer of the device from a-Si to poly-Si thin film. After chemical mechanical polishing (CMP) process, the average grain

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19

Chang, Yao-Yuan, and 張耀元. "Microwave Annealing as a Low Thermal Budget Technique for Amorphous InGaZnO Thin-Film Transistors Fabricated Using AP-PECVD." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/76hfh9.

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20

Lu, Cheng-Hsien, and 呂政憲. "Application and Material Properties of Low Thermal Budget Polyimide in Asymmetric Cu/Sn Hybrid Bonding in 3D Integration Platform." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/g8d3y2.

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博士<br>國立交通大學<br>電子研究所<br>107<br>Hybrid bonding technology is one of the key technologies of 3D integrated circuits (3D IC). It has high material selectivity and high semiconductor process compatibility, enabling heterogeneous integration and achieving of lower power, smaller size and more functional products. Therefore, this technology is highly valued in both industry and academia, and is currently moving toward low thermal budget and fine pitch requirements. In hybrid bonding techniques, the polymer and metal need to be bonded during the bonding process, respectively. Conventional polyimides

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