Academic literature on the topic 'Low workfunction metal'

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Journal articles on the topic "Low workfunction metal"

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Labed, Madani, Nouredine Sengouga та You Seung Rim. "Control of Ni/β-Ga2O3 Vertical Schottky Diode Output Parameters at Forward Bias by Insertion of a Graphene Layer". Nanomaterials 12, № 5 (2022): 827. http://dx.doi.org/10.3390/nano12050827.

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Controlling the Schottky barrier height (ϕB) and other parameters of Schottky barrier diodes (SBD) is critical for many applications. In this work, the effect of inserting a graphene interfacial monolayer between a Ni Schottky metal and a β-Ga2O3 semiconductor was investigated using numerical simulation. We confirmed that the simulation-based on Ni workfunction, interfacial trap concentration, and surface electron affinity was well-matched with the actual device characterization. Insertion of the graphene layer achieved a remarkable decrease in the barrier height (ϕB), from 1.32 to 0.43 eV, an
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Soni, Deepak, Amit Kumar Behera, Dheeraj Sharma, Dip Prakash Samajdar, and Dharmendra Singh Yadav. "Structural Modification of Doped Tunnel Field Effect Transistor for Enhanced Conduction Current and Lower Subthreshold Swing." Journal of Nanoelectronics and Optoelectronics 14, no. 11 (2019): 1539–47. http://dx.doi.org/10.1166/jno.2019.2665.

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The material solubility in the source region and abrupt source/channel junction profile are the major concern which is responsible for the improvement of the electrical characteristics of conventional physical doped tunnel field effect transistor (PD-TFET). For this, an additional negatively polarised electrode is mounted in P+ (source) – N (channel) – N+ (drain) structure over the source region to overcome material solubility. This improves the electrical characteristics of the device. Along with this, we have implanted a low workfunction metal layer (ML) in the oxide layer under the gate ele
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Kumar, Pushpendra, Florian Domengie, Charles Leroux, Patrice Gergaud, and G. Ghibaudo. "Impact of CMOS TiN metal gate process on microstructure and its correlation with electrical properties." MRS Advances 4, no. 27 (2019): 1565–71. http://dx.doi.org/10.1557/adv.2019.77.

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ABSTRACTIn this paper, the effect of TiN metal gate deposition conditions on the crystal orientation and size of TiN grains has been investigated. We have focused on process conditions that reduce the grain size or provide a unique orientation, which might impact CMOS threshold voltage variability. We have shown that the grain size can be significantly modulated by the RF power and pressure, with grain size as low as 5.2 nm. Further it has been shown that for a few optimized conditions, a unique grain orientation can be obtained. Then, the impact of these process conditions on TiN gate mechani
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Oh, Yong-Ho, and Young-Min Kim. "Gate Workfunction Optimization of a 32 nm Metal Gate MOSFET for Low Power Applications." Journal of Electrical Engineering and Technology 1, no. 2 (2006): 237–40. http://dx.doi.org/10.5370/jeet.2006.1.2.237.

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Pan, James, Shamima Afroz, Scott Suko, James D. Oliver, and Thomas Knight. "High Workfunction, Compound Gate Metal Engineering for Low DIBL, High Gain, High Density Advanced RF Power Static Induction Transistor (SIT) and HV Schottky Diode in 4H Silicon Carbide." Materials Science Forum 924 (June 2018): 641–44. http://dx.doi.org/10.4028/www.scientific.net/msf.924.641.

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Wide bandgap semiconductors, such as 4H SiC, are suitable for power regulating devices, due to compatibility with conventional process integration, high breakdown voltage and thermal conductivity [1]. For RF applications, in order to achieve better switching speed, high cut off frequency, and low series resistance (Rdson), it is essential to choose the right gate metals [2]. Engineering of the gate metals not only improves the critical device parameters by adjustment of the metal workfunction, but also affects how the high aspect ratio trenches are filled for a next generation SIT device confi
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Kim, Mansu, Geun-Chae Yu, and Young Chul Kim. "Effects of Low Workfunction Metal Acetate Layers on the Electroluminescent Characteristics of Organic Light-Emitting Diodes." Korean Chemical Engineering Research 51, no. 5 (2013): 634–39. http://dx.doi.org/10.9713/kcer.2013.51.5.634.

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Yoon, Young Jun, Hye Rim Eun, Jae Hwa Seo, et al. "Short-Channel Tunneling Field-Effect Transistor with Drain-Overlap and Dual-Metal Gate Structure for Low-Power and High-Speed Operations." Journal of Nanoscience and Nanotechnology 15, no. 10 (2015): 7430–35. http://dx.doi.org/10.1166/jnn.2015.11146.

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We have investigated and proposed a highly scaled tunneling field-effect transistor (TFET) based on Ge/GaAs heterojunction with a drain overlap to suppress drain-induced barrier thinning (DIBT) and improve low-power (LP) performance. The highly scaled TFET with a drain overlap achieves lower leakage tunneling current because of the decrease in tunneling events between the source and drain, whereas a typical short-channel TFET suffers from a great deal of tunneling leakage current due to the DIBT at the off-state. However, the drain overlap inevitably increases the gate-to-drain capacitance (Cg
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Pan, J., A. Gaibrois, M. Marripelly, et al. "Effects of Very High Workfunction Metals or Metal Alloys (NiCr) on High Switching Speed, HV Schottky Diodes for Mixed Signal or RF ASIC." MRS Advances 5, no. 37-38 (2020): 1937–46. http://dx.doi.org/10.1557/adv.2020.336.

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AbstractFor high switching speed HV Schottky diodes, with very high work function metal and extremely lightly doped epi, the built-in potential may be too high for thermionic emission to occur, when the applied external voltage is quite low (near VF = 0.07V). If the epi is lightly doped p type, the built-in potential (VBuilt-in: potential difference between the metal and silicon Fermi levels) is 1.0V (measured with CV). If the external bias is 0.1V, near the measured VF, it is not enough to overcome the built-in potential for thermionic emission as illustrated. It is likely that in addition to
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Park, Seung-Kyu, Jonghyuk Lee, Ran Hee Kim, et al. "Effects on Addition of Metal Oxides with Low Workfunctions on the Ca-Sr-Ba Oxide Cathodes for VUV Ionizers." Korean Journal of Materials Research 29, no. 4 (2019): 241–51. http://dx.doi.org/10.3740/mrsk.2019.29.4.241.

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Tao, Meng. "Valence-Mending Passivation of Si(100) Surface: Principle, Practice and Application." Solid State Phenomena 242 (October 2015): 51–60. http://dx.doi.org/10.4028/www.scientific.net/ssp.242.51.

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Surface states have hindered and degraded many semiconductor devices since the Bardeen era. Surface states originate from dangling bonds on the surface. This paper discusses a generic solution to surface states, i.e. valence-mending passivation. For the Si (100) surface, a single atomic layer of valence-mending sulfur, selenium or tellurium can terminate ~99% of the dangling bonds, while group VII fluorine or chlorine can terminate the remaining 1%. Valence-mending passivation of Si (100) has been demonstrated using CVD, MBE and solution passivation. The keys to valence-mending passivation inc
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Conference papers on the topic "Low workfunction metal"

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Veloso, A., E. Simoen, A. Oliveira, et al. "Scaled, Novel Effective Workfunction Metal Gate Stacks for Advanced Low-VT, Gate-All-Around Vertically Stacked Nanosheet FETs with Reduced Vertical Distance between Sheets." In 2019 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2019. http://dx.doi.org/10.7567/ssdm.2019.n-1-03.

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