Relevant bibliographies by topics / Microprocessors

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Microprocessors'

Author: Grafiati
Published: 4 June 2021
Last updated: 28 July 2024

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Journal articles on the topic "Microprocessors"

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Bindu, A. "A rigorous approach to microprocessor verification using UVM." i-manager’s Journal on Electronics Engineering 13, no. 1 (2022): 39. http://dx.doi.org/10.26634/jele.13.1.19344.

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In today's fast-paced technology industry, microprocessors play an increasingly important role in a wide range of applications. However, verifying the correctness of complex microprocessor designs remains a significant challenge. To address this issue, a rigorous approach to microprocessor verification using the Universal Verification Methodology (UVM) is proposed. UVM provides a standardised and scalable approach to verifying digital designs, including microprocessors, and has been widely adopted in the industry. This research proposes a UVM-based verification framework for microprocessors that can identify and eliminate design errors early in the development cycle. The proposed approach covers functional verification, performance verification, and hardware-software co-verification. The effectiveness of the proposed approach is evaluated through a case study of a commercial microprocessor design, where the UVM-based verification framework successfully detected and resolved several design bugs. The results demonstrate the potential of the proposed rigorous approach to microprocessor verification using UVM to enhance the quality and reliability of microprocessor designs.
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Abdullayevich, Hakimov Zohid. "History, Structure And Types Of Microprocessors." American Journal of Interdisciplinary Innovations and Research 02, no. 11 (November 16, 2020): 39–46. http://dx.doi.org/10.37547/tajiir/volume02issue11-08.

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This article gives you a brief overview on microprocessor types, performance, and computer hardware. The article also provides basic concepts about Microprocessors. Learn about microprocessor types, Intel, Intel Celeron, VIA, NVIDIA, Elbrus, Philips, Hitachi, Sun, AMD Athlon and more. You will learn about the functional parts of the microprocessor, the block diagram of the microprocessor, the command register of the microprocessor.
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Приходько, Д. И. "Basic typing of multibit microprocessor in the structure of modern microprocessors." Vestnik of Russian New University. Series «Complex systems: models, analysis, management», no. 2 (July 8, 2023): 203–9. http://dx.doi.org/10.18137/rnu.v9187.23.02.p.203.

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Рассматриваются мультиразрядные микропроцессы – особый класс значительно улучшенных микропроцессоров, в которые встроены механизмы, отвечающие за повышение надежности работы программного обеспечения, запускаемого на данном микропроцессоре, – табличная структура регистров и система резервного копирования. Рассматривается месторасположение указанного микропроцессора и основные характеристики модельного ряда: система команд (самые популярные типы CISC и RISK), тип организации стэка (Неймана – Лебедева, гарвардская архитектура), тип распределения команд (статический или динамический). В качестве примера взят доработанный вариант микропроцессора AMD64, в котором применена табличная модель организации регистров и использовано резервное копирование. The article considers a special class of microprocessors – multi-bit microprocessors, which are significantly improved microprocessors. They have built-in mechanisms to improve the reliability of software running on a given microprocessor. The main ones are a tabular register structure, and a backup system. The location of the specified microprocessor and the main characteristics of the lineup are considered, which include the command system (the most popular CISC and RISK types), the type of stack organization (Neumann – Lebedev, Harvard architecture), the type of command distribution (static or dynamic). An example for an analysis will be a modified version of the AMD64 microprocessor, in which a tabular model of register organization is applied and backup is used.
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Yim, Joon-Seo, Chang-Jae Park, In-Cheol Park, and Chong-Min Kyung. "Design Verification of Complex Microprocessors." Journal of Circuits, Systems and Computers 07, no. 04 (August 1997): 301–18. http://dx.doi.org/10.1142/s021812669700022x.

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As the complexity of microprocessors increases, functional verification becomes more difficult and emerges as the bottleneck of the design cycle. In this paper, we suggest a functional verification methodology, especially for compatible microprocessor designs. To guarantee perfect compatibility with previous microprocessors, we developed three C models in different abstraction levels, i.e. Polaris, MCV and StreC. An instruction behavioral level C model (Polaris) is verified using the slowed-down PC. In the implemetation of micro-architecture, a micro-operational level model (MCV) and RTL model (StreC) are co-simulated with consistency checking between these two models. The simulation speed of C models makes it possible to test the "real-world" application programs on the RTL design with a software board model (VPC). To increase the confidence level of verifications, Profiler reports the verification coverage of the test program, which is fed-back to the automatic test program generator (Pandora). The Restartability feature also helps to significantly reduce the total simulation time. Using the proposed verification methodology, we designed and verified the HK486, an Intel 80486 pin-compatible microprocessor successfully.
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Mazlan, M., A. Rahim, Mohd Mustafa Al Bakri Abdullah, W. Razak, A. F. Zubair, Y. M. Najib, and A. Bakir Azman. "Thermal Management of Electronic Components by Using Computational Fluid Dynamic (CFD) Software, FLUENTTM in Several Material Applications (Epoxy, Composite Material & Nanosilver)." Advanced Materials Research 795 (September 2013): 141–47. http://dx.doi.org/10.4028/www.scientific.net/amr.795.141.

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This paper presents the thermal management of electronic components, microprocessor by using three dimensional numerical analysis of heat and fluid flow in computer. 3D model of microprocessors is built using GAMBIT and simulated using FLUENT software. The study was made for four microprocessors arranged in line under different types of materials, inlet velocities and package (chip) powers. The results are presented in terms of average junction temperature and thermal resistance of each package The junction temperature is been observed and it was found that the junction temperature of the microprocessors is not exceed 70o C. It also found that the (chip) powers and inlet velocities are the most important elements to control and manage the junction temperature. The strength of CFD software in handling heat transfer problems is proved to be excellent.
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Chertok, Nikita Dmitrievich, and Mikhail Mikhaylovich Chupilko. "Survey of Methods for Functional Online Testing of Microprocessors." Proceedings of the Institute for System Programming of the RAS 33, no. 6 (2021): 131–48. http://dx.doi.org/10.15514/ispras-2021-33(6)-9.

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Online testing is a process of functional verification of microprocessors produced in silicon or their FPGA-prototypes, i.e. post-silicon verification. This type of testing differs both from the manufacturing testing, aimed at checking the workability of manufactured chips (e.g., absence of physical defects, admissibility of physical characteristics) and from simulation-based pre-silicon functional verification of microprocessors models (where internal microprocessor signals are available for observing, and the execution process can be controlled). Post-silicon verification enables to rapidly run huge numbers of tests and detect bugs missed during pre-silicon functional verification. Tests for microprocessors are usually represented by executable programs. Accordingly, the main tasks of online testing are high-performance generation of test programs in the given ISA and creation of a test environment responsible for launching programs, assessing the correctness of their execution by a microprocessor, diagnosing errors, and interacting with the outside world. This paper examines the problems arising in the development of online testing systems (online test program generators), reviews existing solutions in this area, and, on the base on them, proposes a promising approach to organizing online testing.
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Moses, Melanie E., Stephanie Forrest, Alan L. Davis, Mike A. Lodder, and James H. Brown. "Scaling theory for information networks." Journal of The Royal Society Interface 5, no. 29 (May 9, 2008): 1469–80. http://dx.doi.org/10.1098/rsif.2008.0091.

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Networks distribute energy, materials and information to the components of a variety of natural and human-engineered systems, including organisms, brains, the Internet and microprocessors. Distribution networks enable the integrated and coordinated functioning of these systems, and they also constrain their design. The similar hierarchical branching networks observed in organisms and microprocessors are striking, given that the structure of organisms has evolved via natural selection, while microprocessors are designed by engineers. Metabolic scaling theory (MST) shows that the rate at which networks deliver energy to an organism is proportional to its mass raised to the 3/4 power. We show that computational systems are also characterized by nonlinear network scaling and use MST principles to characterize how information networks scale, focusing on how MST predicts properties of clock distribution networks in microprocessors. The MST equations are modified to account for variation in the size and density of transistors and terminal wires in microprocessors. Based on the scaling of the clock distribution network, we predict a set of trade-offs and performance properties that scale with chip size and the number of transistors. However, there are systematic deviations between power requirements on microprocessors and predictions derived directly from MST. These deviations are addressed by augmenting the model to account for decentralized flow in some microprocessor networks (e.g. in logic networks). More generally, we hypothesize a set of constraints between the size, power and performance of networked information systems including transistors on chips, hosts on the Internet and neurons in the brain.
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Wang, Xingyang, and Yutong Zhu. "Intelligent Art Design Management Based on Wireless Communication Microprocessor and Mobile Internet." Wireless Communications and Mobile Computing 2022 (May 18, 2022): 1–12. http://dx.doi.org/10.1155/2022/5012875.

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Art design management is the fusion of art design and business management and the collision between design management and other disciplines. In order to study art design management students in a scientific way, this article combines wireless communication microprocessors and mobile Internet to design a new art design management mode. This paper proposes the inspection technology and its algorithm description, combines the T2 microprocessor and the SOA service architecture of the mobile Internet, and then integrates the theoretical knowledge of art design management to build an intelligent art design management based on wireless communication microprocessors and mobile Internet model. Then this paper designs the finite impulse response (FIR) filter test experiment and the end-to-end delay test experiment. The data collected in the experiment is optimized for the new art design management mode, and the optimized mode is subjected to a control experiment and a favorable opinion survey analysis. The experimental results show that the art design management model based on wireless communication microprocessors and mobile Internet has increased the artistic creation ability by 21.78% compared with the traditional art design model; compared with the traditional art design management mode, the art design management mode based on wireless communication microprocessor and mobile Internet has improved the management ability by 10.61%.
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Tural Suleymanov, Kamaladdin Ramazanov, Tural Suleymanov, Kamaladdin Ramazanov. "MICROPROCESSORS AND DIGITAL COMPUTER TECHNOLOGIES: A COMPREHENSIVE OVERVIEW." PAHTEI-Procedings of Azerbaijan High Technical Educational Institutions 35, no. 12 (December 8, 2023): 122–31. http://dx.doi.org/10.36962/pahtei35122023-122.

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In the fast-paced world of technology, microprocessors and digital computer technologies play a vital role in powering the devices and systems we rely on every day. From smartphones and laptops to cars and industrial machinery, these technologies have revolutionized the way we live and work. In this comprehensive article, we will delve into the intricacies of microprocessors and digital computer technologies, exploring their history, functionality, and applications. Microprocessors and digital computer technologies play a significant role in the energy supply of the devices and systems we use daily in the rapidly evolving world of technology. These technologies transform and enhance various application areas, from smartphones to laptops, and from automobiles to industrial machinery. In this comprehensive article, we will provide an in-depth analysis of microprocessors and digital computer technologies. We will discuss their history, functionality, and recent applications, providing insights into the fascinating world of these technological marvels. The history of these technologies encompasses a range of developments, and their functionalities have evolved significantly. While microprocessors were initially used for basic calculations and data processing, they are now more complex and powerful than ever. We will provide a detailed description of the fundamental components and functions that constitute digital computers. The principles of operation, application fields, and prospects of these technologies are analyzed in detail. This article emphasizes the significance of microprocessors and digital computer technologies in the technological world and highlights the broader prospects of this field. These essential components of the technological world enhance our daily lives and work, making them more efficient and comfortable. Detailed information in this field serves as a valuable resource, providing insights into the development of technology and how it shapes our future. Therefore, let's delve into the fascinating world of microprocessors and digital computer technologies. Keywords: microprocessor, digital computer, modern technology, important components
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SAMEERA A'AMER ABDUL-KADER. "EMULATION OF THE MICROPROCESSOR INTEL 80386." Diyala Journal of Engineering Sciences 2, no. 1 (June 1, 2009): 13–34. http://dx.doi.org/10.24237/djes.2009.01102.

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Microprocessor simulation is one of the recent applications of computer design. It is used for emulating the microprocessors for some purposes such as; learning microprocessor structure and assembly language in laboratories in universities. In this research simulation for the microprocessor Intel 80386 was suggested, designed and implemented. Implementation was verified for some data transfer instructions like MOV instructions in deferent addressing modes. The designed simulation program was implemented using Visual Basic programming. Examples were tested successfully for some MOV instructions.
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Dissertations / Theses on the topic "Microprocessors"

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Taylor, Michael Bedford 1975. "Tiled microprocessors." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/38924.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
Includes bibliographical references (p. 251-258).
Current-day microprocessors have reached the point of diminishing returns due to inherent scalability limitations. This thesis examines the tiled microprocessor, a class of microprocessor which is physically scalable but inherits many of the desirable properties of conventional microprocessors. Tiled microprocessors are composed of an array of replicated tiles connected by a special class of network, the Scalar Operand Network (SON), which is optimized for low-latency, low-occupancy communication between remote ALUs on different tiles. Tiled microprocessors can be constructed to scale to 100's or 1000's of functional units. This thesis identifies seven key criteria for achieving physical scalability in tiled microprocessors. It employs an archetypal tiled microprocessor to examine the challenges in achieving these criteria and to explore the properties of Scalar Operand Networks. The thesis develops the field of SONs in three major ways: it introduces the 5-tuple performance metric, it describes a complete, high-frequency <0,0,1,2,0> SON implementation, and it proposes a taxonomy, called AsTrO, for categorizing them.
(cont.) To develop these ideas, the thesis details the design, implementation and analysis of a tiled microprocessor prototype, the Raw Microprocessor, which was implemented at MIT in 180 nm technology. Overall, compared to Raw, recent commercial processors with half the transistors required 30x as many lines of code, occupied 100x as many designers, contained 50x as many pre-tapeout bugs, and resulted in 33x as many post-tapeout bugs. At the same time, the Raw microprocessor proves to be more versatile in exploiting ILP, stream, and server-farm workloads with modest to large amounts of parallelism.
by Michael Bedford Taylor.
Ph.D.
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Siers, Scott. "Design and implementation of an asynchronous version of the MIPS R3000 microprocessor /." Online version of thesis, 1993. http://hdl.handle.net/1850/11562.

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Hadi, Muntasir J. "Design of a real-time multi-channel microprocessor based data acquisition and control system." Ohio : Ohio University, 1988. http://www.ohiolink.edu/etd/view.cgi?ohiou1182787292.

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Sheth, Khushbooben Agrawal Vishwani D. "A hardware-software processor architecture using pipeline stalls for leakage power management." Auburn, Ala, 2009. http://hdl.handle.net/10415/1590.

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Mivehchi, M. H. "Microprocessors applications to telecommunications." Thesis, Bucks New University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.375601.

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Fournier, Jacques Jean-Alain Michael. "Vector microprocessors for cryptography." Thesis, University of Cambridge, 2007. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.613318.

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Дядечко, Алла Миколаївна, Алла Николаевна Дядечко, Alla Mykolaivna Diadechko, and D. Mulin. "The history of microprocessors." Thesis, Вид-во СумДУ, 2009. http://essuir.sumdu.edu.ua/handle/123456789/16862.

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Johnson, Kevin. "Design and implementation of an asynchronous version of the MIPS R3000 microprocessor /." Online version of thesis, 1994. http://hdl.handle.net/1850/11171.

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Pobbathi, Venkatesh Paneesh Kumar. "Randomization Based Verification for Microprocessors." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-177438.

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Verification of microprocessors is a vital phase in their development. It takes majority of time and cost in the microprocessor development. Verification can be split into two; coverage and check. In coverage we try to find out if all desired conditions are executed. Where as in check, we try to find out if the behaviour of the DUT is as expected. In this thesis we concentrate more on coverage. The test bench should be able to cover all the cases, hence methodologies have to be used which will not only reduce the total time of the project but also get maximum coverage to increase the bug detection chances. Random simulation helps to quickly attain corner cases that would not have been found by the traditional directed testing. In this thesis functional verification for the microprocessor M6802 was implemented. Few verification approaches were implemented to find out their feasibility. It was found out that random generation had many advantages over directed testing but both the approaches failed to attain good coverage in reasonable time. To overcome this other implementations were explored such as coverage driven and machine learning. Machine learning showed significant improvement over the other methods for coverage on the filp side it required a lot of setup time. It was found out that the combination of these approaches have to be used to reduce the setup time and get maximum coverage. The method to be selected depends on the complexity of the processor and the functional coverpoint.
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Balfour, J. "Source level debugging for microprocessors." Thesis, Lancaster University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.379582.

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Books on the topic "Microprocessors"

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Tocci, Ronald J. Microprocessors and microcomputers: Hardware and software. 6th ed. Upper Saddle River, N.J: Prentice Hall, 2003.

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Tocci, Ronald J. Microprocessors and microcomputers: Hardware and software. 4th ed. Upper Saddle River, N.J: Prentice Hall, 1997.

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Tocci, Ronald J. Microprocessors and microcomputers: Hardware and software. 3rd ed. Englewood Cliffs, N.J: Prentice-Hall, 1987.

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Microprocessors and programmed logic. 2nd ed. London: Prentice-Hall International, 1987.

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Corporation, Intel. Microprocessors. Mt. Prospect, IL: Intel, 1994.

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(Group), Heathkit/Zenith Educational Systems, ed. Microprocessors. Benton Harbor, Mich: Heath Co., 1985.

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Corporation, Intel. Microprocessors. Mt. Prospect, IL: Intel Corporation, 1994.

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Hunt, Warren A. FM8501, a verified microprocessor. Berlin: Springer-Verlag, 1994.

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(Firm), Fairchild, ed. CLIPPER 32-bit microprocessor: User's manual. Englewood Cliffs, N.J: Prentice Hall, 1987.

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Rafiquzzaman, Mohamed. Microprocessor theory and applications with 68000/68020 and Pentium. Hoboken, NJ: J. Wiley, 2008.

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Book chapters on the topic "Microprocessors"

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Padua, David, Amol Ghoting, John A. Gunnels, Mark S. Squillante, José Meseguer, James H. Cownie, Duncan Roweth, et al. "Microprocessors." In Encyclopedia of Parallel Computing, 1130. Boston, MA: Springer US, 2011. http://dx.doi.org/10.1007/978-0-387-09766-4_2030.

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Smith, Kenneth C., and Mark A. Scott. "Microprocessors." In Handbook of Advanced Semiconductor Technology and Computer Systems, 346–78. Dordrecht: Springer Netherlands, 1988. http://dx.doi.org/10.1007/978-94-011-7056-7_12.

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Hasuo, S. "Josephson Microprocessors." In The New Superconducting Electronics, 363–99. Dordrecht: Springer Netherlands, 1993. http://dx.doi.org/10.1007/978-94-011-1918-4_12.

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Veronis, Andrew M. "Microprocessors and Multiprocessing." In Survey of Advanced Microprocessors, 221–42. Boston, MA: Springer US, 1991. http://dx.doi.org/10.1007/978-1-4615-3930-8_8.

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Williams, J. B. "Shrinking Computers: Microprocessors." In The Electronics Revolution, 136–44. Cham: Springer International Publishing, 2017. http://dx.doi.org/10.1007/978-3-319-49088-5_15.

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Watson, John. "Microprocessors and Microcomputers." In Mastering Electronics, 353–72. London: Macmillan Education UK, 1986. http://dx.doi.org/10.1007/978-1-349-08533-0_24.

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Cluley, J. C. "16-bit Microprocessors." In An Introduction to Low Level Programming for Microprocessors, 100–108. London: Macmillan Education UK, 1987. http://dx.doi.org/10.1007/978-1-349-09355-7_10.

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Cluley, J. C. "Single Chip Microprocessors." In An Introduction to Low Level Programming for Microprocessors, 95–99. London: Macmillan Education UK, 1987. http://dx.doi.org/10.1007/978-1-349-09355-7_9.

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Warnes, Lionel. "Microprocessors and microcontrollers." In Electronic and Electrical Engineering, 442–76. London: Macmillan Education UK, 1998. http://dx.doi.org/10.1007/978-1-349-15052-6_23.

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Warnes, Lionel. "Microprocessors and microcontrollers." In Electronic and Electrical Engineering, 443–77. London: Macmillan Education UK, 2003. http://dx.doi.org/10.1007/978-0-230-21633-4_23.

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Conference papers on the topic "Microprocessors"

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Draper, Don, and Sonia Leon. "Microprocessors." In 2008 International Solid-State Circuits Conference - (ISSCC). IEEE, 2008. http://dx.doi.org/10.1109/isscc.2008.4523066.

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Rusu, Stefan, and Jim Warnock. "Microprocessors." In 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. IEEE, 2007. http://dx.doi.org/10.1109/isscc.2007.373604.

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Dani, Ashay, James C. Matayabas, and Paul Koning. "Thermal Interface Material Technology Advancements and Challenges: An Overview." In ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference. ASMEDC, 2005. http://dx.doi.org/10.1115/ipack2005-73384.

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With an increase in the number of transistors (higher power), shrinking processor size (smaller die), and increasing clock speeds (higher frequency) for next generation microprocessors, heat dissipation at the silicon die level has become a critical focus area for microprocessor architecture and design. In addition, power removal at low cost continues to remain the key challenge as we develop the next generation packaging technologies. Novel Thermal Interface Materials (TIM) are required to be designed and developed to meet these new package thermal targets. This paper presents an overview of the novel TIM technologies developed at Intel including greases, phase change materials (PCM), gels, polymer solder hybrids, and solder TIM for multiple generations of desktop, server and mobile microprocessors. The advantages and limitations of these TIM technologies in the thermal management of flip chip packaging are reviewed for Intel’s microprocessors.
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Kaisare, Abhijit, Dereje Agonafer, A. Haji-Sheikh, Greg Chrysler, and Ravi Mahajan. "Thermal Based Optimization of Functional Block Distributions in a Non-Uniformly Powered Die." In ASME 2005 Pacific Rim Technical Conference and Exhibition on Integration and Packaging of MEMS, NEMS, and Electronic Systems collocated with the ASME 2005 Heat Transfer Summer Conference. ASMEDC, 2005. http://dx.doi.org/10.1115/ipack2005-73486.

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Microprocessors continue to grow in capabilities, complexity and performance. The current generation of microprocessors integrates functional components such as logic and level two (L2) cache memory into the microprocessor architecture. The functional integration of the microprocessor has resulted in better performance of the microprocessor as the clock speed has increased and the instruction execution time has decreased. However, the integration has introduced a layer of complexity to the thermal design and management of microprocessors. As a direct result of function integration, the power map on a microprocessor is highly non-uniform and the assumption of a uniform heat flux across the chip surface is not valid. The objective of this paper is to minimize the thermal resistance of the package by optimizing the distribution of the uniformly powered functional blocks. In order to model the non-uniform power dissipation on the silicon chip, the chip surface area is divided into a 4 × 4 and 6×6 matrix with a matrix space representing a distinct functional block with a constant heat flux. Finally, using a FEM code, an optimization of the positioning of the functional blocks relative to each other was carried out in order to minimize the junction temperature Tj. This analysis has no constraints placed on the redistribution of functional blocks. The best possible Tjmax reduction could thus be found. In reality (and at a later date) constraints must be placed regarding the maximum separation of any 2 (or more) functional blocks to satisfy electrical timing and compute performance requirements. Design guidelines are then suggested regarding the thermal based optimal distribution for any number of functional blocks. The commercial finite element code ANSYS® is used for this analysis.
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Dickson, Richard L., and William C. McQuiston. "Safety Hazards Associated With the Failure of Safety Barriers Under the Control of Microprocessors." In ASME 2000 International Mechanical Engineering Congress and Exposition. American Society of Mechanical Engineers, 2000. http://dx.doi.org/10.1115/imece2000-1028.

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Abstract Microprocessor-based control systems have become increasingly popular in the work place because of their versatility and functionality. As a result, microprocessors are being used to monitor and control safety barriers associated with fire protection systems, radiation interlock systems, robotics systems, and manufacturing equipment. These systems tend to be complex and subject to single-point and common-cause failures. Failures occur when the control system can not perform its intended function for any of a number of reasons such as microprocessor malfunction or failure, loss of electrical power, power surge, software logic error, design error, or installation error. Failures of microprocessor-based control systems have the potential to adversely impact the safety of workers, the public and the environment, especially when the microprocessor is exclusively responsible for maintaining or monitoring a safety barrier or safety system. Unfortunately, individuals responsible for system design, design review, system operation and safety oversight may not recognize or appreciate the safety consequences of placing a safety barrier under the exclusive control of a microprocessor-based system. Five examples of microprocessor-based control system failures are discussed to illustrate potential problems that have occurred.
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Bleier, Nathaniel, Muhammad Husnain Mubarik, Farhan Rasheed, Jasmin Aghassi-Hagmann, Mehdi B. Tahoori, and Rakesh Kumar. "Printed Microprocessors." In 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA). IEEE, 2020. http://dx.doi.org/10.1109/isca45697.2020.00028.

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Flynn, M. J., and R. I. Winner. "ASIC microprocessors." In the 22nd annual workshop. New York, New York, USA: ACM Press, 1989. http://dx.doi.org/10.1145/75362.75425.

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Eiles, Travis M., Dean Hunt, and David Chi. "Transparent Heat Spreader for Backside Optical Analysis of High Power GHz-Scale Microprocessors." In ISTFA 2000. ASM International, 2000. http://dx.doi.org/10.31399/asm.cp.istfa2000p0547.

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Abstract Optical probing using the Schlumberger IDS-2000 and other infrared-based analysis techniques have proved to be critical in the debug and analysis of flip-chip-packaged microprocessors. During probing, processors are operating with test patterns that generate a large amount of power. This article demonstrates a method for dissipating the generated heat based on a diamond window-based transparent heat spreader. This method controls the microprocessor temperature to a high degree of stability, and reduces thermal gradients across the die. Waveform results are excellent, and the transparent heat spreader provides a path for optical probing to be applied to the entire range of integrated circuit applications. The discussion covers cooling system requirements, and standard configuration specifications, and shows how the transparent heat spreader technique is effective for probing high power microprocessors.
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Kaisare, Abhijit, Dereje Agonafer, A. Haji-Sheikh, Greg Chrysler, and Ravi Mahajan. "Development of an Analytical Model to a Temperature Distribution of First Level Package With a Non-Uniformly Powered Die." In ASME 2007 International Mechanical Engineering Congress and Exposition. ASMEDC, 2007. http://dx.doi.org/10.1115/imece2007-43736.

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Microprocessors continue to grow in capabilities, complexity and performance. Microprocessors typically integrate functional components such as logic and level two (L2) cache memory in their architecture. This functional integration of logic and memory results in improved performance of the microprocessor. However, the integration also introduces a layer of complexity in the thermal design and management of microprocessors. As a direct result of functional integration, the power map on a microprocessor is typically highly non-uniform and the assumption of a uniform heat flux across the chip surface has been shown to be invalid post Pentium II architecture. The active side of the die is divided into several functional blocks with distinct power assigned to each functional block. Previous work has been done which includes numerical analysis and thermal Based optimization of a typical package consisting of a non-uniformly powered die, heat spreader, TIM I &II and the base of the heat sink. In this paper, an analytical approach to temperature distribution of a first level package with a non-uniformly powered die is carried out for the first time. The analytical model for two layer bodies developed by Haji-Sheikh et al. is extended to this typical package which is a multilayer body. The solution is to begin by designating each surface heat flux as a volumetric heat source. An inverse methodology will be applied to solve the equations for various surfaces to calculate maximum junction temperature for given multilayer body. Finally validation of the analytical solution will be carried out using developed numerical model.
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Varner, Elizabeth B., Chi-Lin (Kenny) Young, Hung M. (Paul) Ng, Steven P. Maher, Travis M. Eiles, and Birk Lee. "Single Element Time Resolved Emission Probing for Practical Microprocessor Diagnostic Applications." In ISTFA 2002. ASM International, 2002. http://dx.doi.org/10.31399/asm.cp.istfa2002p0741.

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Abstract This paper presents the first single element time resolved emission (TRE) data collected from microprocessors fabricated with 0.13 µm process silicon using tester loop lengths, and in many cases acquisition times, comparable to laser voltage probing. The data presented here demonstrate that TRE tools with highly sensitive single element detectors can be used for practical microprocessor circuit diagnostics with reasonable acquisition times.
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Reports on the topic "Microprocessors"

1

Levy, J. Computing with Multiple Microprocessors. Office of Scientific and Technical Information (OSTI), June 2018. http://dx.doi.org/10.2172/1453918.

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Postiff, Matthew A., and Trevor Mudge. Smart Register Files for High-Performance Microprocessors. Fort Belvoir, VA: Defense Technical Information Center, June 1999. http://dx.doi.org/10.21236/ada459519.

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Rodrigues, Arun F. Using reconfigurable functional units in conventional microprocessors. Office of Scientific and Technical Information (OSTI), September 2010. http://dx.doi.org/10.2172/1011665.

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SILICON INTEGRATION INITIATIVE INC AUSTIN TX. Electronic Design Automation (EDA) Roadmap Taskforce Report, Design of Microprocessors. Fort Belvoir, VA: Defense Technical Information Center, April 1999. http://dx.doi.org/10.21236/ada408348.

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Koga, R., W. A. Kolasinski, C. King, and J. Cusick. SEU (Single Event Upset) Vulnerability of the Zilog Z-80 and NSC-800 Microprocessors,. Fort Belvoir, VA: Defense Technical Information Center, September 1986. http://dx.doi.org/10.21236/ada176094.

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Napolitano, Marcello R. YF22 Model With On-Board On-Line Learning Microprocessors-Based Neural Algorithms for Autopilot and Fault-Tolerant Flight Control Systems. Fort Belvoir, VA: Defense Technical Information Center, March 2002. http://dx.doi.org/10.21236/ada400639.

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Hammond, Lance, Benedict A. Hubbert, Michael Siu, Manohar K. Prabhu, and Michael Chen. Chip Multiprocessors Offer an Economical, Scalable Architecture for Future Microprocessors, Thread-Level Speculation Support Allows Them to Speed Up Past Software. Fort Belvoir, VA: Defense Technical Information Center, April 2000. http://dx.doi.org/10.21236/ada420740.

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Areti, H. Mass storage for microprocessor farms. Office of Scientific and Technical Information (OSTI), January 1990. http://dx.doi.org/10.2172/7267766.

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Antonacos, John. A Universal Smart Weapon Microprocessor. Fort Belvoir, VA: Defense Technical Information Center, November 1995. http://dx.doi.org/10.21236/ada302264.

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Enslow, P. H., Hamond Jr., Schlag J. L., and J. H. Microprocessor Local Computer Network Evaluation. Fort Belvoir, VA: Defense Technical Information Center, April 1985. http://dx.doi.org/10.21236/ada159914.

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