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Journal articles on the topic 'Simulation in nanoelectronics'

Author: Grafiati

Published: 28 May 2022

Last updated: 29 May 2022

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1

Melnyk, Oleksandr, and Viktoriia Kozarevych. "SIMULATION OF PROGRAMMABLE SINGLE-ELECTRON NANOCIRCUITS." Bulletin of the National Technical University "KhPI". Series: Mathematical modeling in engineering and technologies, no. 1 (March 5, 2021): 64–68. http://dx.doi.org/10.20998/2222-0631.2020.01.05.

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The speed and specializations of large-scale integrated circuits always contradict their versatility, which expands their range and causes the rise in price of electronic devices. It is possible to eliminate the contradictions between universality and specialization by developing programmable nanoelectronic devices, the algorithms of which are changed at the request of computer hardware developers, i.e. by creating arithmetic circuits with programmable characteristics. The development of issues of theory and practice of the majority principle is now an urgent problem, since the nanoelectronic execution of computer systems with programmable structures will significantly reduce their cost and significantly simplify the design stage of automated systems. Today there is an important problem of developing principles for building reliable computer equipment. The use of mathematical and circuit modeling along with computer-aided design systems (CAD) can significantly increase the reliability of the designed devices. The authors prove the advantages of creating programmable nanodevices to overcome the physical limitations of micro-rominiatization. This continuity contributes to the accelerated introduction of mathematical modeling based on programmable nanoelectronics devices. The simulation and computer-aided design of reliable programmable nanoelectronic devices based on the technology of quantum automata is described. While constructing single-electron nanocircuits of combinational and sequential types the theory of majority logic is used. The order of construction and programming of various types of arithmetic-logic units is analyzed.

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2

Fortes, A. B., J. Figueiredo, and M. S. Lundstrom. "Virtual Computing Infrastructures for Nanoelectronics Simulation." Proceedings of the IEEE 93, no. 10 (October 2005): 1839–47. http://dx.doi.org/10.1109/jproc.2005.853545.

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3

de Falco, Carlo, and Massimiliano Culpo. "Dynamical iteration schemes for multiscale simulation in nanoelectronics." PAMM 8, no. 1 (December 2008): 10061–64. http://dx.doi.org/10.1002/pamm.200810061.

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4

Culpo, Massimiliano, and Carlo de Falco. "Dynamical iteration schemes for coupled simulation in nanoelectronics." PAMM 8, no. 1 (December 2008): 10065–68. http://dx.doi.org/10.1002/pamm.200810065.

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5

Chou, Hung Mu, Shao Ming Yu, Jam Wem Lee, and Yiming Li. "A compact model for electrostatic discharge protection nanoelectronics simulation." International Journal of Nanotechnology 2, no. 3 (2005): 226. http://dx.doi.org/10.1504/ijnt.2005.008061.

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6

Sangiorgi, Enrico, Asen Asenov, Herbert S. Bennett, Robert W. Dutton, David Esseni, Martin D. Giles, Masami Hane, et al. "Foreword Special Issue on Simulation and Modeling of Nanoelectronics Devices." IEEE Transactions on Electron Devices 54, no. 9 (September 2007): 2072–78. http://dx.doi.org/10.1109/ted.2007.905342.

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7

Gargini, Paolo A. "Silicon Nanoelectronics and Beyond." Journal of Nanoparticle Research 6, no. 1 (February 2004): 11–26. http://dx.doi.org/10.1023/b:nano.0000023248.65742.6c.

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8

Tatarnikov, Denis A., and Aleksey V. Godovykh. "Molecular Dynamic Simulation of Carbon Nanostructures Formation." Advanced Materials Research 1040 (September 2014): 92–96. http://dx.doi.org/10.4028/www.scientific.net/amr.1040.92.

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This paper is devoted to the study of stable structures of various carbon nanomaterials using molecular dynamic simulation, study of their properties and characteristics, as well as search for possible later use in nanoelectronics and nanomechanics. We develop programs for computation of the system of atoms at every step and visualization of that data, also we research of thermodynamic properties and conditions of formation of different carbon nanostructures, try to predict existence of new materials. Nowadays we have two separate programs: one for computation and one for visualization. We continue to collect statistical data, investigate behavior of the system under different conditions.

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9

Babiker, S., A. Asenov, J. R. Barker, and S. P. Beaumont. "Quadrilateral Finite Element Monte Carlo Simulation of Complex Shape Compound FETs." VLSI Design 6, no. 1-4 (January 1, 1998): 127–30. http://dx.doi.org/10.1155/1998/51378.

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The complex recess and gate shape of modem compound FETs greatly affect the device parasitics and therefore impose the need for proper description of the device geometry and surface conditions in any practical device simulations. In this paper we describe a new Monte Carlo (MC) module incorporated in our Heterojunction 2D Finite element FET simulator H2F [1]. The module combines realistic quadrilateral finite-element description of the device geometry with realistic particle simulation of the non-equilibrium hot carrier transport in short recess gate compound FETs. A Single Programme Multiple Data (SPMD) parallel approach makes it possible to use our MC simulator for practical design work, generating the necessary I-V characteristics in parallel. The capabilities of the finite element MC module are illustrated in example simulations of a 200nm pseudomorphic HEMT fabricated in the Nanoelectronics Research Centre of Glasgow University.

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10

Dinh, Hien Sy. "SIMULATION OF CURRENT-VOLTAGE CHARACTERISTICS OF SPIN FIELD EFFECT TRANSISTOR USING NEMO-VN2." Science and Technology Development Journal 15, no. 3 (September 30, 2012): 5–16. http://dx.doi.org/10.32508/stdj.v15i3.1812.

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We have developed a simulator for nanoelectronics devices, NEMO-VN2. In this work, we provide an overview of spin field effect transistor. We use the simulator to explore the performance of spin FET. The model of the spin FET is based on non-equilibrium Green function method and implemented by using graphic user interface of Matlab. The current-voltage characteristics such as drain current-voltage, drain current-gate voltage ones are explored.

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11

Dinh, Hien Sy. "SIMULATION OF CURRENT-VOLTAGE CHARACTERISTICS OF SINGLE ELECTRON TRANSISTOR USING NEMO-VN2." Science and Technology Development Journal 15, no. 3 (September 30, 2012): 15–25. http://dx.doi.org/10.32508/stdj.v15i3.1843.

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We have developed a simulator for nanoelectronics devices, NEMO-VN2. In this work we use the simulator to explore the performance of single electron transistor. The model is base on non-equilibrium Green function method and implemented by using graphic user interface of Matlab. The current-voltage characteristics such as drain current-voltage, drain current-gate voltage ones are explored. Some characteristics reproduced by the proposed model are compared with experimental results of single electron transistor and good agreements are validated.

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12

Korgel, Brian A., D. C. Lee, Tobias Hanrath, Miguel Jos Yacaman, Alexander Thesen, Marco Matijevic, Roar Kilaas, Christian Kisielowski, and Alain C. Diebold. "Application of Aberration-Corrected TEM and Image Simulation to Nanoelectronics and Nanotechnology." IEEE Transactions on Semiconductor Manufacturing 19, no. 4 (November 2006): 391–96. http://dx.doi.org/10.1109/tsm.2006.884713.

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13

Cavin, R. K., V. V. Zhirnov, D. J. C. Herr, Alba Avila, and J. Hutchby. "Research directions and challenges in nanoelectronics." Journal of Nanoparticle Research 8, no. 6 (September 23, 2006): 841–58. http://dx.doi.org/10.1007/s11051-006-9123-4.

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14

Abdelkrim, Mostefai. "Modeling and Simulation of Single-Electron Transistor (SET) with Aluminum Island Using Neural Network." Carpathian Journal of Electronic and Computer Engineering 12, no. 1 (September 1, 2019): 23–28. http://dx.doi.org/10.2478/cjece-2019-0005.

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Abstract SET is important in the field of nanoelectronics since a decade. This paper presents electrical characteristic of Single-Electron Transistor (SET) with Aluminum Island using Neural Network. The I-V characteristic of the Single-Electron Transistor (SET) is predicted according to different parameters (VG, T, VD, C, and R). The simulation process is based on analytical transistor model and neural network transistor model. Single Electron Transistor (SET) is the simplest device in which the effect of Coulomb blockade can be observed.

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15

Polizzi, Eric, and Ahmed Sameh. "Parallel Algorithms for Large-Scale Nanoelectronics Simulations Using NESSIE." Journal of Computational Electronics 3, no. 3-4 (October 2004): 363–66. http://dx.doi.org/10.1007/s10825-004-7078-1.

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16

Haley, Benjamin P., Gerhard Klimeck, Mathieu Luisier, Dragica Vasileska, Abhijeet Paul, Swaroop Shivarajapura, and Diane L. Beaudoin. "Computational nanoelectronics research and education at nanoHUB.org." Journal of Computational Electronics 8, no. 2 (June 2009): 124–31. http://dx.doi.org/10.1007/s10825-009-0273-3.

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17

Lega, Peter V., Dmitriy S. Kuchin, Victor V. Koledov, Vedamanickam Sampath, Alexey M. Zhikharev, and Vladimir G. Shavrov. "Simulation of Control System for Shape Memory Nanotweezers." Materials Science Forum 845 (March 2016): 142–45. http://dx.doi.org/10.4028/www.scientific.net/msf.845.142.

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Thermoelastic martensitic phase transition in Ni-Ti based shape memory alloys enables designing micro- and nanotools that are controlled by small changes in temperature (~10°С). This makes it feasible creating a new generation of complex microrobotical systems for manipulation and treatment of various nanoobjects in nanoindustry, medicine, nanoelectronics, etc. This work deals with the development of a physical and mathematical model for the micro manipulation system. The system under investigation pertains to shape memory composite nanotweezers with the composition Ti2NiCu/Pt located at the tip of a tungsten microneedle. The activation and control of the nanotweezers is done by heating them by the passage of an electric current flowing through a microdiode located in the needle. The microdiode serves the twin purpose of Joule heating and temperature sensing/measurement so as to close the feedback loop of the control system. The prototype of the control system was manufactured and tested. The data from the simulation were compared with those from the preliminary experiments.

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18

Popov, Alexander Mikhailovich. "NUMERICAL STUDY OF QUANTUM DOT SPECTRUM CALCULATION ON THE BASE OF MONTE CARLO METHOD." Computational nanotechnology 6, no. 3 (September 30, 2019): 74–79. http://dx.doi.org/10.33693/2313-223x-2019-6-3-74-79.

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The work is directed to numerical simulation of quantum dots spectrum for molecular nanostructure of small size for creation of new nanotechnology. Quantum dots are the small peaces of semiconductor which presents the molecular system heterostucture. The cariers of charge are confined in small region. The main acsent is made on development of effective method for determination of eigenfuncions and eigenvalues of quantum dot. Quantum dots are used in nanoelectronics, in bio-sensors of nanosize, and in the systems of medical diagnostics of high precision.

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19

Chen, Yan, and Li Bao An. "Electron Beam Irradiation on Substrate for Precise Dielectrophoretic Assembly of Carbon Nanotubes - A Simulation." Advanced Materials Research 960-961 (June 2014): 69–72. http://dx.doi.org/10.4028/www.scientific.net/amr.960-961.69.

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The effect of electron beam irradiation on permittivity of silicon dioxide insulate layer was investigated. Theoretical analysis indicates that electron beam irradiation will change the permittivity of SiO2through decreasing the molecular number per unit volume and increasing the polarizability of the sample. The escape of impurities during irradiation decreases the permittivity while the accumulation of space charge increases the permittivity. Simulation results show that with the change of permittivity, the electric field of the area irradiated by electron beam is strengthened locally and carbon nanotubes (CNTs) are more likely attracted to this area by dielectrophoresis. Therefore, the method could be used for precise positioning of CNTs for various applications in many areas including nanoelectronics, sensors, and new energies.

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20

Mao, V., V. Thusu, C. Dwyer, and K. Chakrabarty. "Connecting fabrication defects to fault models and simulation program with integrated circuit emphasis simulations for DNA self-assembled nanoelectronics." IET Computers & Digital Techniques 3, no. 6 (2009): 553. http://dx.doi.org/10.1049/iet-cdt.2008.0136.

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21

Basaran, Cemal, and Minghui Lin. "Electromigration induced strain field simulations for nanoelectronics lead-free solder joints." International Journal of Solids and Structures 44, no. 14-15 (July 2007): 4909–24. http://dx.doi.org/10.1016/j.ijsolstr.2006.12.011.

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22

CHEN, Y. J., L. FU, Y. CHEN, J. ZOU, J. LI, and W. H. DUAN. "TUNABLE ELECTRIC CONDUCTIVITIES OF Au-DOPED BORON NITRIDE NANOTUBES." Nano 02, no. 06 (December 2007): 367–72. http://dx.doi.org/10.1142/s1793292007000702.

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Tunable electronic properties of nanotubes are an essential requirement for building nanotube circuits and devices. We have produced BN nanotube films with controlled electric conductivities by Au doping. The Au -doped BN nanotube films have been found to exhibit from semiconducting to metallic behavior under different Au contents. Both experimental and computing simulation studies reveal that the conductivities of the doped film are improved by the incorporation of Au atoms into nanotube walls. The doped BN nanotubes and films are expected to have potential applications in catalysts, sensors and nanoelectronics.

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23

Falaschetti, Laura, Davide Mencarelli, Nicola Pelagalli, Paolo Crippa, Giorgio Biagetti, Claudio Turchetti, George Deligeorgis, and Luca Pierantoni. "A Compact and Robust Technique for the Modeling and Parameter Extraction of Carbon Nanotube Field Effect Transistors." Electronics 9, no. 12 (December 20, 2020): 2199. http://dx.doi.org/10.3390/electronics9122199.

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Carbon nanotubes field-effect transistors (CNTFETs) have been recently studied with great interest due to the intriguing properties of the material that, in turn, lead to remarkable properties of the charge transport of the device channel. Downstream of the full-wave simulations, the construction of equivalent device models becomes the basic step for the advanced design of high-performance CNTFET-based nanoelectronics circuits and systems. In this contribution, we introduce a strategy for deriving a compact model for a CNTFET that is based on the full-wave simulation of the 3D geometry by using the finite element method, followed by the derivation of a compact circuit model and extraction of equivalent parameters. We show examples of CNTFET simulations and extract from them the fitting parameters of the model. The aim is to achieve a fully functional description in Verilog-A language and create a model library for the SPICE-like simulator environment, in order to be used by IC designers.

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24

Sergeyev, D., N. Zhanturina, L. Myasnikova, A. I. Popov, A. Duisenova, and A. Istlyaup. "Computer Simulation of the Electric Transport Properties of the FeSe Monolayer." Latvian Journal of Physics and Technical Sciences 57, no. 6 (December 1, 2020): 3–11. http://dx.doi.org/10.2478/lpts-2020-0029.

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AbstractThe paper deals with the model research of electric transport characteristics of stressed and non-stressed FeSe monolayers. Transmission spectra, current-voltage characteristic (CVC) and differential conductivity spectra of two-dimensional FeSe nanostructure have been calculated within the framework of the density functional theory and non-equilibrium Green’s functions (DFT + NEGF). It has been shown that the electrophysical properties depend on the geometry of the sample, the substrate, and the lattice constant. On CVC of non-stressed sample in the range from −1.2 V to −1 and from 1.2 V to 1.4 V, a region of negative differential resistance (NDR) has been observed. NDR is at both signs of the applied voltage due to the symmetry of the nanostructure. d2I/dV2 is used to determine the nature of the electron-phonon interaction and the features of quasiparticle tunnelling in stressed and non-stressed samples. The results obtained can be useful for calculating new elements of 2D nanoelectronics.

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25

Le, Minh Hoang, and Hien Sy Dinh. "Some physical results of single electron transitor." Science and Technology Development Journal - Natural Sciences 1, no. 6 (December 8, 2018): 206–13. http://dx.doi.org/10.32508/stdjns.v1i6.631.

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Single electron transistor (SET) is a key element in current research area of nanoelectronics and nanotechnology which can offer nano-feature size, low power consumption and high operating speed. SET is a new nanoscale switching device. It can control the motion of the single electron. The goal of this paper is to discuss about some physical properties of the SET and focuses on simulation of basic quantum device characteristics such as tunneling effect, Coulomb blockage, Quantum dot, Coulomb staircase, and Coulomb oscillation. The current-voltage characteristics of SET are explored for illustration. Two types of metallic and semiconducting SETs have been simulated.

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26

Mehrabani, Yavar Safaei, and Mohammad Eshghi. "High-Speed, High-Frequency and Low-PDP, CNFET Full Adder Cells." Journal of Circuits, Systems and Computers 24, no. 09 (August 27, 2015): 1550130. http://dx.doi.org/10.1142/s0218126615501303.

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In this paper, three CNT-based full adder designs, called Design1, Design2 and Design3, are proposed. In these designs 12, 14 and 16 transistors are used, respectively. In all designs only 3-input NAND, Majority-not and NOR functions are used. First, a preliminary structure (Design1) is presented using 12 transistors. Then its weaknesses are tackled in two steps. In fact, in each step a new design is presented by adding two more transistors to its predecessor. Therefore two new structures called Design2 and Design3 are built in which Design3 is the most efficient one. To study the performance of Design3 versus other silicon-based and CNT-based 32-nm classical and state-of-the-art cells, comprehensive simulations with regard to various supplies, loads, operating frequencies, and temperatures are performed using Synopsys HSPICE tool. Simulation results confirm that the proposed cell is superior to the other cells. At last the robustness of Design3 against the diameter mismatches of CNTs which is one of the most important concerns of nanoelectronics is studied using Monte Carlo transient analysis. This simulation reveals that Design3 functions very well against manufacturing process variations.

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27

Cavin, R. K., V. V. Zhirnov, G. I. Bourianoff, J. A. Hutchby, D. J. C. Herr, H. H. Hosack, W. H. Joyner, and T. A. Wooldridge. "A Long-term View of Research Targets in Nanoelectronics." Journal of Nanoparticle Research 7, no. 6 (December 2005): 573–86. http://dx.doi.org/10.1007/s11051-005-7528-0.

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28

AHMED, SHAIKH, GERHARD KLIMECK, DERRICK KEARNEY, MICHAEL MCLENNAN, and M. P. ANANTRAM. "QUANTUM SIMULATIONS OF DUAL GATE MOSFET DEVICES: BUILDING AND DEPLOYING COMMUNITY NANOTECHNOLOGY SOFTWARE TOOLS ON NANOHUB.ORG." International Journal of High Speed Electronics and Systems 17, no. 03 (September 2007): 485–94. http://dx.doi.org/10.1142/s0129156407004679.

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Undesirable short-channel effects associated with the relentless downscaling of conventional CMOS devices have led to the emergence of new classes of MOSFETs. This has led to new and unprecedented challenges in computational nanoelectronics. The device sizes have already reached the level of tens of nanometers where quantum nature of charge-carriers dominates the device operation and performance. The goal of this paper is to describe an on-going initiative on nanoHUB.org to provide new models, algorithms, approaches, and a comprehensive suite of freely-available web-based simulation tools for nanoscale devices with capabilities not yet available commercially. Three software packages nanoFET, nanoMOS and QuaMC are benchmarked in the simulation of a widely-studied high-performance novel MOSFET device. The impact of quantum mechanical effects on the device properties is elucidated and key design issues are suggested.

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29

Пузанов, А. С., М. М. Венедиктов, С. В. Оболенский, and В. А. Козлов. "Расчетно-экспериментальное моделирование обратимых сбоев ячеек статической памяти субмикронных микросхем при воздействии потоков нейтронов." Физика и техника полупроводников 53, no. 9 (2019): 1250. http://dx.doi.org/10.21883/ftp.2019.09.48133.16.

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AbstractThe simulation of reversible single events in test samples of static memory microcircuits with design norms of 0.5, 0.35, 0.25, and 0.1 μm under the effect of neutron fluxes with various energies is performed. It is shown theoretically and experimentally that reversible single events can occur in modern microelectronics and nanoelectronics products under the effect of a fission-spectrum neutron flux caused by the passage of primary recoil atoms and nuclear reaction products along the microcircuit surface perpendicularly to the electric current lines in the near-drain transistor area. A series of irradiation experiments of static memory circuits with design norms of 0.35 μm is interpreted based on the proposed model.

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30

Kortshagen, Uwe, Lorenzo Mangolini, and Ameya Bapat. "Plasma synthesis of semiconductor nanocrystals for nanoelectronics and luminescence applications." Journal of Nanoparticle Research 9, no. 1 (November 23, 2006): 39–52. http://dx.doi.org/10.1007/s11051-006-9174-6.

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31

Raza, Hassan, and Edwin C. Kan. "An extended Hückel theory based atomistic model for graphene nanoelectronics." Journal of Computational Electronics 7, no. 3 (February 1, 2008): 372–75. http://dx.doi.org/10.1007/s10825-008-0180-z.

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32

Zhang, Hengji, Geunsik Lee, Alexandre F. Fonseca, Tammie L. Borders, and Kyeongjae Cho. "Isotope Effect on the Thermal Conductivity of Graphene." Journal of Nanomaterials 2010 (2010): 1–5. http://dx.doi.org/10.1155/2010/537657.

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The thermal conductivity (TC) of isolated graphene with different concentrations of isotope (C13) is studied with equilibrium molecular dynamics method at 300 K. In the limit of pure C12or C13graphene, TC of graphene in zigzag and armchair directions are ~630 W/mK and ~1000W/mK, respectively. We find that the TC of graphene can be maximally reduced by ~80%, in both armchair and zigzag directions, when a random distribution of C12and C13is assumed at different doping concentrations. Therefore, our simulation results suggest an effective way to tune the TC of graphene without changing its atomic and electronic structure, thus yielding a promising application for nanoelectronics and thermoelectricity of graphene-based nano device.

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33

LIM, C. S., M. H. HONG, Y. LIN, L. S. TAN, A. SENTHIL KUMAR, and M. RAHMAN. "LARGE AREA PARALLEL SURFACE NANOSTRUCTURING WITH LASER IRRADIATION THROUGH MICROLENS ARRAYS." Surface Review and Letters 17, no. 03 (June 2010): 383–87. http://dx.doi.org/10.1142/s0218625x10011085.

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In the past decade, the development of nanoelectronics and nano-optics has attracted much interest in surface nanostructuring of semiconductor materials. The irradiation of a microlens array by a laser beam generates many focused light spots, which can act as a direct writing tool on photo-polymer materials. This maskless surface nanostructuring technique enables thousands to millions of identical nano-features to be patterned in a couple of laser pulses. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) images show that nano-features were patterned uniformly on the substrate surface, which suggests a versatile way of parallel surface nanostructuring over a large area. The simulation results of the energy flux distribution at the focal plane of the microlens arrays will also be discussed.

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34

Cavin, R. K., and V. V. Zhirnov. "Silicon Nanoelectronics and Beyond: Reflections from a Semiconductor Industry–government workshop." Journal of Nanoparticle Research 6, no. 2/3 (June 2004): 137–47. http://dx.doi.org/10.1023/b:nano.0000034745.79206.b7.

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35

Laribi, Asma, and Ahlam Guen Bouazza. "Effect of Chirality and Oxide Thikness on the Performance of a Ballistic CNTFET." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 6 (December 1, 2018): 4941. http://dx.doi.org/10.11591/ijece.v8i6.pp4941-4950.

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<p>Since the discovery of 1D nano-object, they are constantly revealing significant physical properties. In this regard, carbon nanotube (CNT) is considered as a promising candidate for application in future nanoelectronics devices like carbon nanotube field effect transistor (CNTFET). In this work, the impact of chirality and gate oxide thikness on the electrical characteristics of a CNTFET are studied. The chiralities used are (5, 0), (10, 0), (19, 0), (26, 0), and the gate oxide thikness varied from 1 to 5 nm.This work is based on a numerical simulation program based on surface potential model. CNTFET Modeling is useful for semiconductor industries for nano scale devices manufacturing. From our results we have observed that the output current increases with chirality increasing.We have also highlight the importance of the gate oxide thickness on the drain current that increases when gate oxide is thin.</p>

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Chuan, Mu Wen, Munawar Agus Riyadi, Afiq Hamzah, Nurul Ezaila Alias, Suhana Mohamed Sultan, Cheng Siong Lim, and Michael Loong Peng Tan. "Device performances analysis of p-type doped silicene-based field effect transistor using SPICE-compatible model." PLOS ONE 17, no. 3 (March 3, 2022): e0264483. http://dx.doi.org/10.1371/journal.pone.0264483.

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Moore’s Law is approaching its end as transistors are scaled down to tens or few atoms per device, researchers are actively seeking for alternative approaches to leverage more-than-Moore nanoelectronics. Substituting the channel material of a field-effect transistors (FET) with silicene is foreseen as a viable approach for future transistor applications. In this study, we proposed a SPICE-compatible model for p-type (Aluminium) uniformly doped silicene FET for digital switching applications. The performance of the proposed device is benchmarked with various low-dimensional FETs in terms of their on-to-off current ratio, subthreshold swing and drain-induced barrier lowering. The results show that the proposed p-type silicene FET is comparable to most of the selected low-dimensional FET models. With its decent performance, the proposed SPICE-compatible model should be extended to the circuit-level simulation and beyond in future work.

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Toral-Lopez, A., H. Santos, E. G. Marin, F. G. Ruiz, J. J. Palacios, and A. Godoy. "Multi-scale modeling of 2D GaSe FETs with strained channels." Nanotechnology 33, no. 10 (December 13, 2021): 105201. http://dx.doi.org/10.1088/1361-6528/ac3ce2.

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Abstract Electronic devices based on bidimensional materials (2DMs) are the subject of an intense experimental research, that demands a tantamount theoretical activity. The latter must be hold up by a varied set of tools able to rationalize, explain and predict the operation principles of the devices. However, in the broad context of multi-scale computational nanoelectronics, there is currently a lack of simulation tools connecting atomistic descriptions with semi-classical mesoscopic device-level simulations and able to properly explain the performance of many state-of-the-art devices. To contribute to filling this gap we present a multi-scale approach that combines fine-level material calculations with a semi-classical drift-diffusion transport model. Its use is exemplified by assessing 2DM field effect transistors with strained channels, showing excellent capabilities to capture the changes in the crystal structure and their impact into the device performance. Interestingly, we verify the capacity of strain in monolayer GaSe to enhance the conduction of one type of carrier, enabling the possibility to mimic the effect of chemical doping on 2D materials. These results illustrate the great potential of the proposed approach to bridge levels of abstraction rarely connected before and thus contribute to the theoretical modeling of state-of-the-art 2DM-based devices.

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Svetlichnyi, Alexander M., Oleg A. Ageev, Evgeny Yu Volkov, Igor L. Jityaev, and Maxim V. Dem'yanenko. "Modelling of the Influence of a Pointed Field Emission Cathode Design from the Silicon Carbide with Graphene Film on the Electric Field Strength." Applied Mechanics and Materials 752-753 (April 2015): 163–67. http://dx.doi.org/10.4028/www.scientific.net/amm.752-753.163.

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Graphene film on silicon carbide is considered to be promising material for high-frequency vacuum nanoelectronics. However, the possibility of graphene application in this area is still poorly understood. We have carried out the simulation of the electric field distribution in interelectrode gap of the anode-cathode system pointed field emission cathode based on silicon carbide with graphene film on its surface subject to the rounding-off radius of the top, interelectrode gap, height and cathode forming half-angle of the cone opening by the finite element method. The influence of constructional parameters on the electric field strength in the test structure was analyzed. It is shown that the values of rounding-off radius of the cone point and interelectrode distance has the biggest influence on the electric field in the investigated structure. Changing of the height and cathode forming half-angle of the cone opening does not lead to a significant increase or decrease of the electric field value.

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Yu, Lianhua, Ming Diao, Xiaobo Chen, and Xiaochun Cheng. "XOR Multiplexing Technique for Nanocomputers." Applied Sciences 10, no. 8 (April 19, 2020): 2825. http://dx.doi.org/10.3390/app10082825.

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In emerging nanotechnologies, due to the manufacturing process, a significant percentage of components may be faulty. In order to make systems based on unreliable nano-scale components reliable, it is necessary to design fault-tolerant architectures. This paper presents a novel fault-tolerant technique for nanocomputers, namely the XOR multiplexing technique. This hardware redundancy technique is based on a numerous duplication of faulty components. We analyze the error distributions of the XOR multiplexing unit and the error distributions of multiple stages of the XOR multiplexing system, then compare them to the NAND multiplexing unit and the NAND multiplexing multiple stages system, respectively. The simulation results show that XOR multiplexing is more reliable than NAND multiplexing. Bifurcation theory is used to analyze the fault-tolerant ability of the system and the results show that XOR multiplexing technique has a high fault-tolerant ability. Similarly to the NAND multiplexing technique, this fault-tolerant technique is a potentially effective fault tolerant technique for future nanoelectronics.

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Ivashchyshyn, F. O., I. I. Grygorchak, O. V. Balaban, and B. O. Seredyuk. "The impact of phase state of guest histidine on properties and practical applications of nanohybrids on InSe and GaSe basis." Materials Science-Poland 35, no. 1 (April 29, 2017): 239–45. http://dx.doi.org/10.1515/msp-2017-0019.

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AbstractA new technological approach to the synthesis of multilayer nanostructures which allows their use in high-performance storage of electrical energy at the nanoscale level is discussed in this paper. In particular, the effect of co-intercalation of histidine (his), water and a solution of KOH into layered semiconductors of GaSe and InSe on the charge accumulation are studied. Based on the data of the cyclic current-voltage characteristics (CVC) a power storage mechanism (capacitive/pseudocapacitive) in each of these structures is described. This mechanism is in a good accord with the results of galvanostatic studies. The simulation of the parameters of the impedance equivalent circuit has been carried out, proving the possibility of using the described structures for nanoelectronics and nanoenergy devices. The observed values of tangent of electrical losses tgδ (<1) in coherence with a high dielectric constant ε are promising for the creation of quantum batteries and capacitors.

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Kim, Donghwi, Ridha Kamoua, and Andrea Pacelli. "Design-Oriented Introduction of Nanotechnology into the Electrical and Computer Engineering Curriculum." Journal of Educational Technology Systems 34, no. 2 (December 2005): 155–64. http://dx.doi.org/10.2190/d1h1-yydt-eqw8-uyju.

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Nanoelectronics has the potential, and is indeed expected, to revolutionize information technology by the use of the impressive characteristics of nanodevices such as carbon nanotube transistors, molecular diodes and transistors, etc. A great effort is being put into creating an introductory course in nanotechnology. However, practically all courses focus on the physics, chemistry, and materials science aspects of this discipline. On the other hand, a more abstract, design-oriented introduction is desirable for electrical and computer engineering majors. In order to teach design-oriented nanotechnology, the teaching curriculum must be extended to include new concepts. In particular, it is necessary to supply the design principles, device models, and software simulation tools. This article describes our approach for introducing nanotechnology system design into the Electrical and Computer Engineering undergraduate curriculum at Stony Brook University. The approach consists of developing a nanodevice library for SPICE-like simulator and a 3-week module on nanotechnology system design utilizing this library. The module will be woven into an existing course on Integrated Electronics.

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Natarajamoorthy, Mathan, Jayashri Subbiah, Nurul Ezaila Alias, and Michael Loong Peng Tan. "Stability Improvement of an Efficient Graphene Nanoribbon Field-Effect Transistor-Based SRAM Design." Journal of Nanotechnology 2020 (April 30, 2020): 1–7. http://dx.doi.org/10.1155/2020/7608279.

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The development of the nanoelectronics semiconductor devices leads to the shrinking of transistors channel into nanometer dimension. However, there are obstacles that appear with downscaling of the transistors primarily various short-channel effects. Graphene nanoribbon field-effect transistor (GNRFET) is an emerging technology that can potentially solve the issues of the conventional planar MOSFET imposed by quantum mechanical (QM) effects. GNRFET can also be used as static random-access memory (SRAM) circuit design due to its remarkable electronic properties. For high-speed operation, SRAM cells are more reliable and faster to be effectively utilized as memory cache. The transistor sizing constraint affects conventional 6T SRAM in a trade-off in access and write stability. This paper investigates on the stability performance in retention, access, and write mode of 15 nm GNRFET-based 6T and 8T SRAM cells with that of 16 nm FinFET and 16 nm MOSFET. The design and simulation of the SRAM model are simulated in synopsys HSPICE. GNRFET, FinFET, and MOSFET 8T SRAM cells give better performance in static noise margin (SNM) and power consumption than 6T SRAM cells. The simulation results reveal that the GNRFET, FinFET, and MOSFET-based 8T SRAM cells improved access static noise margin considerably by 58.1%, 28%, and 20.5%, respectively, as well as average power consumption significantly by 97.27%, 99.05%, and 83.3%, respectively, to the GNRFET, FinFET, and MOSFET-based 6T SRAM design.

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Jia, Xiaofei, Wenhao Chen, Bing Ding, and Liang He. "Noise test method for dual-gate MOSFET device." Modern Physics Letters B 33, no. 31 (November 10, 2019): 1950387. http://dx.doi.org/10.1142/s0217984919503871.

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In recent years, with the development of mesoscopic physics and nanoelectronics, the research on noise and testing technology of electronic components has been developed. It is well known that noise can characterize the transmission characteristics of carriers in nanoscale electronic components. With the continuous shrinking of the device size, the carrier transport of nanoscale MOSFET devices has been gradually transformed from the traditional drift-diffusion to become the quasi-ballistic or ballistic transport, and its current noise contains granular and thermal noise. The paper by Jeon et al. [The first observation of shot noise characteristics in 10-nm scale MOSFETs, in Proc. 2009 Symp. VLSI Technology (IEEE, Honolulu, 2009), pp. 48–49] presents the variation relation of 20 nm MOSFET current noise with source–drain current and voltage, and its current noise characteristic is between thermal noise and shot noise, so 20 nm MOSFET current noise is shot noise and thermal noise. The paper by Navid et al. [J. Appl. Phys. 101 (2007) 124501] shows through simulation that the 60 nm MOSFET current noise is suppressed shot noise and thermal noise. At present, the current noise has seriously affected the basic performance of the device, thus the circuit cannot work normally. Therefore, it is necessary to study the generation mechanism and characteristics of current noise in electronic components so as to suppress device noise, which can not only realize the reduction of device noise, but also play a positive role in the work-efficiency, life-span and reliability of electronic components.

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Gamiz, F., A. Godoy, L. Donetti, C. Sampedro, J. B. Roldan, F. Ruiz, I. Tienda, N. Rodriguez, and F. Jimenez-Molinos. "Monte Carlo simulation of nanoelectronic devices." Journal of Computational Electronics 8, no. 3-4 (October 2009): 174–91. http://dx.doi.org/10.1007/s10825-009-0295-x.

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Мустафаев, Гасан Абакарович, Арслан Гасанович Мустафаев, Валерий Александрович Панченко, and Наталья Васильевна Черкесова. "DEVELOPMENT OF A LOGICAL ELEMENT BASED ON POLYPHENYLENE MOLECULES." Physical and Chemical Aspects of the Study of Clusters, Nanostructures and Nanomaterials, no. 12() (December 15, 2020): 662–71. http://dx.doi.org/10.26456/pcascnn/2020.12.662.

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Большое энергопотребление изделий интегральной электроники и дорогостоящие методы их производства, делает масштабирование кремниевых полупроводниковых устройств до размеров менее 50 нм непростой технологической и конструкторской задачей. В последнее время были достигнуты значительные успехи в разработке и исследовании изделий молекулярной электроники: молекулярных проводов, молекулярных диодов, изготовленных из отдельных молекул. Также были получены хорошие результаты в технологии формирования надежного электрического контакта с электропроводящими молекулами. Достижения в области наноэлектроники делают возможным разработку более сложных молекулярных электронных структур, например, цифровых логических схем. В данной работе проведено квантовохимическое моделирование молекулы, выполняющей функцию логического элемента, выполнена оптимизация равновесной пространственной конфигурации молекулы, разработана конструкция и синтезирована топология слоев для изготовления подложки для монтажа молекулы и создания внешних интерфейсов. Полученные результаты демонстрируют перспективность органической электроники как альтернативы кремниевым полупроводниковым материалам при разработке интегральных схем. The high energy consumption of integrated electronics products and expensive methods of their production makes scaling silicon semiconductor devices to sizes less than 50 nm a difficult technological and design task. Recently, significant advances have been made in the development and research of molecular electronics products: molecular wires, molecular diodes made from individual molecules. Good results also obtained in the technology of forming a reliable electrical contact with electrically conductive molecules. Advances in nanoelectronics make it possible to develop more complex molecular electronic structures such as digital logic circuits. In this work, a quantum-chemical simulation of a molecule performing the function of a logical element is carried out, the equilibrium spatial configuration of the molecule is optimized, the design is developed and the topology of the layers for fabricating a substrate for mounting a molecule and creating external interfaces is developed. The obtained results demonstrate the promise of organic electronics as an alternative to silicon semiconductor materials in the development of integrated circuits.

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Millar, Campbell, Scott Roy, Andrew R. Brown, and Asen Asenov. "Simulating the bio–nanoelectronic interface." Journal of Physics: Condensed Matter 19, no. 21 (May 1, 2007): 215205. http://dx.doi.org/10.1088/0953-8984/19/21/215205.

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Zhang, Qian, Peter W. Voorhees, and Stephen H. Davis. "Modeling of the growth of GaAs–AlGaAs core–shell nanowires." Beilstein Journal of Nanotechnology 8 (February 24, 2017): 506–13. http://dx.doi.org/10.3762/bjnano.8.54.

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Heterostructured GaAs–AlGaAs core–shell nanowires with have attracted much attention because of their significant advantages and great potential for creating high performance nanophotonics and nanoelectronics. The spontaneous formation of Al-rich stripes along certain crystallographic directions and quantum dots near the apexes of the shell are observed in AlGaAs shells. Controlling the formation of these core–shell heterostructures remains challenging. A two-dimensional model valid on the wire cross section, that accounts for capillarity in the faceted surface limit and deposition has been developed for the evolution of the shell morphology and concentration in Al x Ga1− x As alloys. The model includes a completely faceted shell–vapor interface. The objective is to understand the mechanisms of the formation of the radial heterostructures (Al-rich stripes and Al-poor quantum dots) in the nanowire shell. There are two issues that need to be understood. One is the mechanism responsible for the morphological evolution of the shells. Analysis and simulation results suggest that deposition introduces facets not present on the equilibrium Wulff shapes. A balance between diffusion and deposition yields the small facets with sizes varying slowly over time, which yield stripe structures, whereas deposition-dominated growth can lead to quantum-dot structures observed in experiments. There is no self-limiting facet size in this case. The other issue is the mechanism responsible for the segregation of Al atoms in the shells. It is found that the mobility difference of the atoms on the {112} and {110} facets together determine the non-uniform concentration of the atoms in the shell. In particular, even though the mobility of Al on {110} facets is smaller than that of Ga, Al-rich stripes are predicted to form along the {112} facets when the difference of the mobilities of Al and Ga atoms is sufficiently large on {112} facets. As the size of the shell increases, deposition becomes more important. The Al-poor dots are obtained at the apices of {112} facets, if the attachment rate of Al atoms is smaller there.

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Luisier, Mathieu. "Atomistic simulation of transport phenomena in nanoelectronic devices." Chem. Soc. Rev. 43, no. 13 (2014): 4357–67. http://dx.doi.org/10.1039/c4cs00084f.

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Luisier, Mathieu, and Gerhard Klimeck. "Numerical strategies towards peta-scale simulations of nanoelectronics devices." Parallel Computing 36, no. 2-3 (February 2010): 117–28. http://dx.doi.org/10.1016/j.parco.2010.01.003.

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Korol, Roman, and Dvira Segal. "From Exhaustive Simulations to Key Principles in DNA Nanoelectronics." Journal of Physical Chemistry C 122, no. 8 (February 15, 2018): 4206–16. http://dx.doi.org/10.1021/acs.jpcc.7b12744.

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