Dissertations / Theses: 'Surface mount technology'

1

Hui, Ip Kee. "Analysis of surface mount technology solder joints." Thesis, Brunel University, 1996. http://bura.brunel.ac.uk/handle/2438/5380.

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The factors determining the quality of surface mount technology (SMT) solder joints are numerous, and complex. The exploration of these factors, and how they may affect the reliability and quality of the joints can only be achieved through continuous research. In this project, essential areas of SMT joints were selected for study and analysis, with the intention of providing additional design and process guidelines for the production of quality SMT joints. In the infrared reflow process, one of the common defect phenomena is the occurrence of tombstoning; that is after soldering only one end of the component is soldered while the other is lifted up, assuming a position like a tombstone. The initiation of tombstoning during reflow was analysed based on the forces acting on the component. A model was developed to predict the initiation of this phenomenon. The model shows that, under vibration-free conditions, the surface tension of the molten solder is the source of the force causing the initiation of tombstoning. The contact angle, which varies with the length of the printed circuit board solder land, has a significant effect on the value of the surface tension acting as a force pulling upward on the component. The model further shows that tombstoning initiation is due to the combined effects of the surface tension; the weight of the component; the dimensions of the component; the length of the solder underneath the component; and the length of the solder protruding from the end of the component. Selected components were used as examples for predicting the conditions of initiation, and these conditions were further substantiated by a series of experiments. Another area of study was a method which directly pulled the components off printed circuit boards and this was used as a means for testing the bond quality of surface mount technology leadless chip solder joints. Components D7243, CC1206, RC1206, RC121O, and CC1 812 were selected for this study. It was found that the ultimate tensile force which breaks a component off the printed circuit board has the potential to be used as a parameter for measuring the quality of the solder joint. The effect of solder thickness on the strength of a joint has also been investigated. The shape of joints soldered by two methods, wave soldering and infrared reflow, were compared. Joints at the two ends of a component produced by infrared reflow were found more uniform than the ones produced by wave soldering. A recommendation is made here for the wave soldering approach in achieving uniform solder joints. The effects of solder shape on the joint strength were further investigated by finite element analysis. A convex joint was found marginally more robust than a concave joint. Two aspects of the internal structure of SMT solder joints were investigated, void content and copper/tin intermetallic compounds. The voiding conditions of wave-soldered and infrared reflow joints were compared. No voids were found in all specimens that were produced by wave soldering. However, there were always voids inside joints produced by infrared reflow. Microhardness tests indicated that the hardness of compounds at the copper/solder interface of infrared reflowed joints is lower than that in the wave-soldered joints. It is considered that the lower hardness of the interfacial region of the infrared reflowed joints is due to the presence of voids. Scanning electron microscopy was used to study the formation of copper/tin intermetallic compounds for joints produced by infrared reflow. The results show that Cu 6 Sn5 was the only compound with a detectable thickness. Other compounds such as Cu3 Sn, were virtually not found at all. Aging of the joints at 100°C, shows that both the Cu 6Sn5 and the overall interfacial thickness grew with time. One of the important areas which had been overlooked previously and was studied in some details was the effects of solder paste exposure on the quality of solder paste. The characteristic changes of solder paste due to exposure were investigated in three areas, weight loss, tackiness, and rheology. The evaporation of low boiling point solvents was considered as the main contribution to the loss in the weight of the solder paste. The weight loss against exposure time was found to follow an exponential behaviour. A method was designed to evaluate the tackiness changes of solder paste due to exposure. It was found that the decay of tackiness against exposure time can be expressed by a power law. It is recommended that solder paste manufacturers should provide the necessary characteristic constants so as to enable the characteristics to be calculated after a specific exposure. The rheological changes of the solder paste as a result of exposure were also investigated. The implication on the printability of the solder paste due to these changes was studied and discussed.

2

Bhave, Aniket. "A leaded and lead-free solder paste evaluation screening procedure." Diss., Online access via UMI:, 2005. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&res_dat=xri:pqdiss&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&rft_dat=xri:pqdiss:1425610.

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3

Sylvan, Andreas. "Internet of Things in Surface Mount TechnologyElectronics Assembly." Thesis, KTH, Medieteknik och interaktionsdesign, MID, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-209243.

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Currently manufacturers in the European Surface Mount Technology (SMT) industry seeproduction changeover, machine downtime and process optimization as their biggestchallenges. They also see a need for collecting data and sharing information betweenmachines, people and systems involved in the manufacturing process. Internet of Things (IoT)technology provides an opportunity to make this happen. This research project gives answers tothe question of what the potentials and challenges of IoT implementation are in European SMTmanufacturing. First, key IoT concepts are introduced. Then, through interviews with expertsworking in SMT manufacturing, the current standpoint of the SMT industry is defined. The studypinpoints obstacles in SMT IoT implementation and proposes a solution. Firstly, local datacollection and sharing needs to be achieved through the use of standardized IoT protocols andAPIs. Secondly, because SMT manufacturers do not trust that sensitive data will remain securein the Cloud, a separation of proprietary data and statistical data is needed in order take a stepfurther and collect Big Data in a Cloud service. This will allow for new services to be offered byequipment manufacturers.
I dagsläget upplever tillverkare inom den europeiska ytmonteringsindustrin för elektronikproduktionsomställningar, nedtid för maskiner och processoptimering som sina störstautmaningar. De ser även ett behov av att samla data och dela information mellan maskiner,människor och system som som är delaktiga i tillverkningsprocessen.Sakernas internet, även kallat Internet of Things (IoT), erbjuder teknik som kan göra dettamöjligt. Det här forskningsprojektet besvarar frågan om vilken potential som finns samt vilkautmaningar en implementation av sakernas internet inom europeisk ytmonteringstillverkning avelektronik innebär. Till att börja med introduceras nyckelkoncept inom sakernas internet. Sedandefinieras utgångsläget i elektroniktillverkningsindustrin genom intervjuer med experter.Studien belyser de hinder som ligger i vägen för implementation och föreslår en lösning. Dettainnebär först och främst att datainsamling och delning av data måste uppnås genomanvändning av standardiserade protokoll för sakernas internet ochapplikationsprogrammeringsgränssnitt (APIer). På grund av att elektroniktillverkare inte litar påatt känslig data förblir säker i molnet måste proprietär data separeras från statistisk data. Dettaför att möjliggöra nästa steg som är insamling av så kallad Big Data i en molntjänst. Dettamöjliggör i sin tur för tillverkaren av produktionsmaskiner att erbjuda nya tjänster.

4

Chu, Ming-hei. "Solder paste inspection and 3D shape estimation using directional LED lightings." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/hkuto/record/B39634176.

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5

Kaiser, Todd Jeffrey. "A micromachined pendulous oscillating gyroscopic accelerometer." Diss., Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/13729.

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6

Nambiar, Sudeep. "Process development of 01005 assembly." Diss., Online access via UMI:, 2007.

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7

Ramaswamy, Harish Krishna Valenzuela Jorge F. "Feeder allocation policy for a turret head placement machine using dynamic programming." Auburn, Ala., 2005. http://hdl.handle.net/10415/1269.

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8

Ismail, Ismarani. "Stencil printing of solder paste for reflow soldering of surface mount technology assembly." Thesis, University of Salford, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.426875.

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9

Bowskill, Jeremy Michael. "An object-oriented framework for integrating vision systems into surface mount technology manufacturing." Thesis, University of Brighton, 1995. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.260975.

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10

Tsai, Wen-Kai Mike. "High yield flip chip processing and failure mode analysis for surface mount applications." Thesis, Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/17063.

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11

Afshari, Houtan. "Finding optimum batch sizes for a high mix, low volume surface mount technology line." Thesis, Mälardalens högskola, Akademin för innovation, design och teknik, 2014. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-26182.

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12

Greenwood, Thomas A. "A modular supply chain architecture for low-volume high-mix surface mount technology manufacturers." Thesis, Massachusetts Institute of Technology, 2002. http://hdl.handle.net/1721.1/84340.

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Thesis (S.M.)--Massachusetts Institute of Technology, Sloan School of Management; and, (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science; in conjunction with the Leaders for Manufacturing Program at MIT, 2002.
Includes bibliographical references (p. 109).
by Thomas A. Greenwood.
S.M.

13

Chu, Ming-hei, and 朱銘熙. "Solder paste inspection and 3D shape estimation using directional LED lightings." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B39634176.

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14

Koche, Rahulkumar Sadanand. "Measurement and modeling of passive surface mount devices on FR4 substrates." PDXScholar, 2012. https://pdxscholar.library.pdx.edu/open_access_etds/754.

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Passive components like resistors, capacitors and inductors are used in every electronic system. These are the very basic components which affect the system performance at higher frequencies and it is necessary to understand and model the behavior of these components in a very accurate manner. This work focuses on utilizing Printed Circuit Board (PCB) test boards, or fixtures, made of FR4 for characterizing Surface Mount Device (SMD) components. Agilent's Advanced Design System (ADS) microwave circuit simulation software was used for designing the microstrip transmission lines as well as for generating the layout for manufacturing of the PCB. SMD resistors, capacitors and inductors were soldered into the fixture and then measured using the Vector Network Analyzer (VNA). The calibration kit was developed in ADS. The measured data were calibrated using the TRL (Thru-Reflect-Line) calibration algorithm. A calibration kit consisting of through, three transmission lines of various lengths, open and short was designed and manufactured. Calibration procedures were performed using Cascade Microtech's WinCal XE software. Based on our experience, TRL calibration did not perform to its full potential due to errors in the value of the characteristic impedance of microstrip transmission line. This impedance is ideally assumed to be 50 Ohm, but our lines had characteristic impedance of around 49 Ohm. Simple models for the resistors and capacitors were developed by our collaborators at the University of Zagreb and we developed the model for the inductors. We used ADS for simulations and comparison with the measured data. Extensive optimization of these models was done so as to fit the measured and modeled data. As the frequency goes above 4 GHz models and measurements don't match due to the limitations of the PCB material, the increasing effects of the parasitics and calibration artifacts. This work shows how and when we can use inexpensive FR4 PCB for the characterization of the passive SMD components in the low GHz frequency range. It also examines the range of operating frequency of SMD components, verifies the parameters extracted from the simple model and tests the TRL calibration algorithm.

15

Shen, Lan. "Temporal design for core-based systems : a formal approach." Diss., Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/13077.

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16

Dar, Iqbal Mahmud. "An intelligent sensor fusion approach to pattern recognition with an application to bond validation of surface-mount components." Diss., Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/15717.

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17

Bukhari, Sarfaraz. "Evaluation of the effects of processing conditions on shear strength in Pb-free surface mount assembly." Diss., Online access via UMI:, 2004. http://wwwlib.umi.com/dissertations/fullcit/1422361.

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18

Hoffman, Anton, and Mikael Johansson. "Framtagning av universell fixtur för SMD-lina." Thesis, Mälardalens högskola, Akademin för innovation, design och teknik, 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:mdh:diva-49415.

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Det här projektet har utförts i samarbete med företaget Eskilstuna Elektronikpartner AB (EEPAB). Företaget arbetar med tillverkning av kretskort där de använder sig av ytmontering och hålmontering. Vissa mönsterkort kan vara böjda och kan därmed orsaka problem i Surface Mount Device (SMD)-linan. Syftet med projektet var att ta fram en fixtur som gör mönsterkorten planare vilket innebär att minska höjdskillnaden mellan högsta och lägsta punkten på korten. Detta för att effektivisera och förhindra stopp i produktionen. Två forskningsfrågor togs fram som fungerade som ett stöd under projektets gång: F1:Hur förbättras produktionen i en SMD-lina när mönsterkorten hålls plana? F2:Vilka faktorer bör beaktas när en fixtur tas fram för en SMD-lina? Projektet har följt en produktutvecklingsprocess där fokuset har legat på konceptstadiet. Data har samlats in genomen litteraturstudie, intervjuer samt ett formulär. Projektet resulterade i ett slutgiltigt koncept i form av en fixtur. Resultatet i projektet visar att genom att spänna fast mönsterkortets kortsidor så minskas nedböjningen. Genom planare mönsterkort minskas risken för fel mängdapplicering av lödpasta som i sin tur kan orsaka kortslutning eller en öppen slutning. Att problemen med fel mängd lödpasta minskas leder även till att manuellt arbete som tvättning och applicering av lödpasta kan reduceras. När lödpasta appliceras för hand är det även svårt att veta om rätt mängd har applicerats, detta kan även leda till problem under lödningen. Sedan kan det konstateras att designen av fixturen måste samspela med alla maskiner i SMD-linan för att inte orsaka problem eller hindra maskinerna från att utföra dess arbete. Utifrån ett koncepttest visade det sig att det framtagna konceptet gör mönsterkorten cirka 42% planare. Detta bör kunna minska problemen i SMD-linan och spara in tiden det tar att åtgärda dessa problem. Koncepttestet utfördes inte i den rätta maskinen och måste därmed undersökas ordentligt. Det var endast ett sorts mönsterkort som testades, dessa faktorer är exempel på felkällor. I framtiden bör ett flertal olika mönsterkort testas för att få en högre reliabilitet. Det behövs även tas fram en exakt tolerans för när mönsterkorten är för böjda och problem uppstår. I dagsläget finns endast maskinens egentolerans som inte stämmer särskilt bra och en generell tolerans för SMD-linor.

19

Islam, Mohd Nokibul LAll Pradeep. "Investigations on damage mechanics and life prediction of fine-pitch electronics in harsh environments." Auburn, Ala., 2005. http://repo.lib.auburn.edu/2005%20Summer/doctoral/ISLAM_MOHD_11.pdf.

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20

Garratt, Jeffery David. "Prediction of thermally induced printed wiring board warpage." Thesis, Georgia Institute of Technology, 1993. http://hdl.handle.net/1853/17052.

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21

Petriccione, Gregory James. "Design and integration of a large area warpage measurement system." Thesis, Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/18207.

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22

Polsky, Yarom. "Improved prediction modeling with validation for thermally-induced PWB warpage." Diss., Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/19062.

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23

Hui, Tak-wai. "Solder paste inspection based on phase shift profilometry." Click to view the E-thesis via HKUTO, 2007. http://sunzi.lib.hku.hk/HKUTO/record/B39558411.

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24

Thorpe, Ryan. "High throughput flip chip assembly process and reliability analysis using no-flow underfill materials." Thesis, Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/17514.

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25

Hui, Tak-wai, and 許德唯. "Solder paste inspection based on phase shift profilometry." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2007. http://hub.hku.hk/bib/B39558411.

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26

Creswell, Steven Howard 1961. "Solution to a bay design and production sequencing problem." Thesis, The University of Arizona, 1989. http://hdl.handle.net/10150/277124.

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This thesis addresses the problem of setting up a surface mount placement machine for production. The objective is to minimize the number of machine changeovers made during a production run consisting of a number of circuit cards. The solution to the problem involves two separate decisions. The first decision considers determining how to combine feeders together in "bays" or groups of feeders, and how to assign the bays to the circuit cards. The second decision considers the circuit card production sequence. A mathematical programming formulation is given, however, its solution is very difficult for problems of a realistic size. Several heuristic approaches are suggested and used to solve actual and test problems. The heuristic for bay design uses clustering techniques used in Group Technology while the sequencing problem is solved using heuristics based on solution techniques for the Traveling Salesman problem.

27

Manjeshwar, Praveen Kumar. "Scheduling batch processing machines in a flow shop." Diss., Online access via UMI:, 2005.

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28

Hidle, Frederick B. "Application of the integral equation asymptotic phase method to penetrable scatterers." Thesis, Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/15797.

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29

McGovern, Lawrence P. "Analysis of interconnect yield for a high throughput flip chip assembly process." Thesis, Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/16605.

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30

Ramkumar, S. Manian. "Process analysis and performance characterization of a novel anisotropic conductive adhesive for lead-free surface mount electronics assembly." Diss., Online access via UMI:, 2008.

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31

Rodriguez, German Dario. "Analysis of the solder paste release in fine pitch stencil printing processes." Thesis, Georgia Institute of Technology, 1998. http://hdl.handle.net/1853/18867.

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32

Pike, Randy T. "Reworkable high temperature adhesives for Multichip Module (MCM-D) and Chip-on-Board (COB) applications." Thesis, Georgia Institute of Technology, 1999. http://hdl.handle.net/1853/19506.

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33

Horsley, Robert Michael. "Microstructural characterisation of solder joints using the Sn-Ag-Cu eutectic alloy in a no-clean surface mount technology (SMT) assembly process." Thesis, University of Salford, 2002. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.272696.

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34

George, Gikku J. "A simulation model to analyze post reflow processes at an electronics manufacturing facility." Diss., Online access via UMI:, 2006.

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35

Zheng, Leo Young. "Modeling and experiments of underfill flow in a large die with a non-uniform bump pattern." Diss., Online access via UMI:, 2008.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Mechanical Engineering, 2008.
Includes bibliographical references.

36

Lin, Ta-Hsuan. "Assembly process development, reliability and numerical assessment of copper column flexible flip chip technology." Diss., Online access via UMI:, 2008.

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Thesis (Ph. D.)--State University of New York at Binghamton, Department of Systems Science and Industrial Engineering, Thomas J. Watson School of Engineering and Applied Science, 2008.
Includes bibliographical references.

37

Ramasubramanian, Arun Shrrivats. "Advanced process window design for 01005 assemblies." Diss., Online access via UMI:, 2008.

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Thesis (M.S.)--State University of New York at Binghamton, Department of Systems Science and Industrial Engineering, Thomas J. Watson School of Engineering and Applied Science, 2008.
Includes bibliographical references.

38

Cope, Alexander Randon. "Solid State Pre-Formed Electronics Adhesive (SPEA)." PDXScholar, 2013. https://pdxscholar.library.pdx.edu/open_access_etds/1842.

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In mobile and handheld consumer electronic markets, product use conditions drive the requirement for mechanical strength and device durability. The majority of relatively large form factor electronic components in a laptop, mobile internet device, PDA, or mobile phone use an adhesive as a stiffener to help protect the component from physical stresses imposed by daily wear and tear. Described herein is an innovative solution referred to as Solid State Pre-Formed Electronics Adhesive (SPEA), which enables a decrease in circuit board manufacturing throughput time while increasing mechanical durability with a consistent and characterized adhesive application process. Today, many consumer electronic ODM's (Original Design Manufacturers) and CM's (Contract Manufacturers) use a liquid adhesive dispensed after placement of an electronic component within the SMT (Surface Mount Technology) process. On average, this adds up to 60 seconds to the throughput time of a typical motherboard as the material needs to be applied and then cured. In addition, the current adhesive dispense application process is not tightly controlled and is highly variable depending on operator, material type, and circuit board density. Data will demonstrate that the effect of the adhesive deposition profile and consistency in application directly affects repeatable margin increase gains in a dynamic stress event. In partnership with a specialty chemical company, a unique thermoset epoxy compound was designed to provide maximum component to circuit board interconnect strength while maintaining its form at ambient temperatures. When applied to electronics manufacturing, the compound has the following advantages over current solutions: 1. Reduced Manufacturing Processing Time: Enables a solution that can be transitioned transparently into a circuit board manufacturing facility which reduces the average processing time for a typical device motherboard. 2. Improved Application Repeatability: Enables a solution that increases adhesive deposition consistency and placement repeatability, critical in achieving improved dynamic performance. 3. Delivers a Reference, Characterized Solution: Current industry adhesive application techniques and materials vary widely and component manufacturers cannot validate reliability performance with a confident baseline. This is due to the high variability of performance in commercially available adhesives. SPEA provides a characterized adhesive solution with a clear baseline margin increase on which to evaluate dynamically stressed system performance. The need to continually increase the resistance to component damage through dynamic testing is a critical aspect to consider given market trends and device roadmaps. Large component manufacturers have the opportunity to further embed themselves into untapped markets where portability and performance converge and drive the need for more robust packaging solutions. The development and application of SPEA will continue to maintain silicon and packaging reliability as consumer devices continue to shrink, becoming ever more portable.

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Godbole, Gaurav Vinod. "Pad cratering characterizing crack propagation and the effects of humidity and reflow on reliability /." Diss., Online access via UMI:, 2009.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009.
Includes bibliographical references.

40

McCaslin, Luke. "Methodology for predicting microelectronic substrate warpage incorporating copper trace pattern characteristics." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/24641.

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41

Raut, Rahul. "Thermal management of heat sensitive components in Pb-free assembly." Diss., Online access via UMI:, 2005.

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42

Tumne, Pushkraj Satish. "Investigation of bulk solder and intermetallic failures in PB free BGA by joint level testing." Diss., Online access via UMI:, 2009.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department or Systems Science and Industrial Engineering, 2009.
Includes bibliographical references.

43

Vishwanathan, Krishnan. "Process development and microstructural analysis of capacitor filter assemblies using lead free solder preforms." Diss., Online access via UMI:, 2007.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2007.
Includes bibliographical references.

44

Shah, Vatsal. "Pb-free process development and microstructural analysis of capacitor filter assemblies using solder preforms." Diss., Online access via UMI:, 2005.

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45

Miller, Ross Alan. "Thermo-Mechanical Selective Laser Assisted Die Transfer." Thesis, North Dakota State University, 2011. https://hdl.handle.net/10365/29859.

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Laser Induced Forward Transfer (LIFT) techniques show promise as a disruptive technology which will enable the placement of components smaller than what conventional pick-and-place techniques are capable of today. Limitations of current die-attach techniques are presented and discussed and present the opportunity for a new placement method. This study introduces the Thermo-Mechanical Selective Laser Assisted Die Transfer (tmSLADT) process and is an application of the unique blistering behavior of a dynamic releasing layer when irradiated by low energy focused UV laser pulses. The potential of tmSLADT as the next generation LIFT technique is demonstrated by the "touchless" transfer of 65 ?m thick silicon tiles between two substrates spaced 195 ?m apart. Additionally, the advantages of an enclosed blister-actuator mechanism over previously studied ablative and thermal releasing techniques are discussed. Finally, experimental results studying transfer precision indicate this non optimized die transfer process compares with, and may exceed, the placement precision of current assembly techniques.
Defense Microelectronics Activity (DMEA) under agreement number H94003-09-2-0905

46

Majeed, Sulman. "Rework & reliability of area array components." Diss., Online access via UMI:, 2009.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engfineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009.
Includes bibliographical references.

47

Marquez, de Tino Ursula. "Reduction of nitrogen consumption of lead-free reflow processes and prediction models for behaviors of lead-free assemblies." Diss., Online access via UMI:, 2009.

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Thesis (Ph. D.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2009.
Includes bibliographical references.

48

MURTAZA, ALEXANDER. "Parameter Tuning in a Jet Printing Machine usingReinforcement Learning." Thesis, KTH, Skolan för industriell teknik och management (ITM), 2021. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-299505.

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Surface mount technology is a common way to assembly electrical components onto PrintedCircuit Boards (PCB). To assemble the components, solder paste is used. One way to apply solderpaste onto PCB is jet printing.The quality of the solder paste deposits on the PCB depends on the properties of the solder pasteand the ejection parameters settings of the jet printer. Every solder paste is unique with its owncharacteristics. Solder paste dots are of good quality if the positioning of the dot is good, the dotis circular, and the number of satellites is at a minimum. A satellite is a droplet that has fallenoutside the main droplet. The parameters that have the most effect on the solder paste are thewaveform parameters Rise time and Voltage level.This master thesis examined the possibility to design and implement a feedback-based machinelearning algorithm that can find the most suitable value for the Rise time and Voltage level, thatgives good quality of the solder paste deposits. The algorithm that was used was a ReinforcementLearning algorithm. Reinforcement Learning is a reward-based learning algorithm where an agentlearns to interact with an environment by using trial and error. The specific algorithm that wasused was a Deep-Q-Learning algorithm. In this master thesis, it was also examined how the cameraresolution affects the decision of the algorithm. To see the implication of the camera resolution,two machines were used, an older and a newer machine were used where one of the biggestdifferences is that the camera resolution.It was concluded that a Deep-Q-Learning algorithm can be used to find the most suitable value forthe waveform parameters Rise time and Voltage level, which results in specified quality of thesolder paste deposits. It was also concluded that the algorithm converges faster for a lower cameraresolution, but the results obtained are more optional with the higher camera resolution.
Ytmontering är en metod som används för att montera elektriska komponenter på kretskort. Föratt kunna montera komponenterna används lödpasta. En teknik för att applicera lödpasta påkretskort är jet printing.Kvaliteten på lödpastavolymen på ett kretskort beror dels på egenskaperna hos lödpastan, dels påutskjutningssparametrarna hos jetprintern. Varje lödpasta är unik med hänsyn till flödesegenskaper. En lödpastadeposition har god kvalitet om depositionen har en bra position, omdepositionen är cirkulär och om mängden satelliter är minimal. En satellit är en droppe lödpastasom fallit utanför huvuddepositionen. Parametrarna som har störst effekt på lödpasta ärvågformsparameterna stigtid och spänningsnivå.Detta examensarbete undersökte möjligheten att hitta en feedbackbaserad maskininlärningsalgoritm som kan hitta de mest lämpliga värdena för stigtiden och spänningsnivå som ger godkvalitet på lödpastadepositionen. Algoritmen som användes var en Förstärkande inlärningsalgoritm.Förstärkande inlärning är en belöningsbaserad inlärningsalgoritm där en agent lär sig attinteragera med en miljö genom att använda trial and error. Den specifika algoritmen som användesvar en Deep-Q-Learning-algoritm. I examensarbetet undersöktes även hur kameraupplösningenspåverkar algoritmen och dess beslut. För att undersöka detta användes två maskiner, en nyare ochäldre version där att kameraupplösningen är lägre.Slutsatsen som drogs var att en Deep-Q-Learning-algoritm kan användas för att hitta det mestlämpliga värdena för vågformsparametrarna stigtid och spänningsnivå. En annan slutsats somdrogs var att algoritmen konvergerade snabbare när kameraupplösningen är lägre. Parapeternasom är optimala för den kameran med lägre upplösning är inte optimala för den kameran medhögre upplösning.

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Wu, Yujing. "Diffusion kinetics and microstructure of eutectic and composite solder/copper joints." Thesis, access full-text online access from Digital dissertation consortium, 1994. http://libweb.cityu.edu.hk/cgi-bin/er/db/ddcdiss.pl?9424414.

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Bhalerao, Vikram. "Process development and reliability study for 01005 components in a lead-free assembly environment." Diss., Online access via UMI:, 2008.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Systems Science and Industrial Engineering, 2008.
Includes bibliographical references.

Dissertations / Theses on the topic 'Surface mount technology'

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