Relevant bibliographies by topics / Triple Modular Redundancy

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Academic literature on the topic 'Triple Modular Redundancy'

Author: Grafiati
Published: 4 June 2021
Last updated: 25 July 2025

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Journal articles on the topic "Triple Modular Redundancy"

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Wikipedia. "Triple modular redundancy." ACM SIGDA Newsletter 37, no. 24 (2007): 1. http://dx.doi.org/10.1145/1859863.1859864.

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Cașcaval, Petru, and Florin Leon. "Optimization Methods for Redundancy Allocation in Hybrid Structure Large Binary Systems." Mathematics 10, no. 19 (2022): 3698. http://dx.doi.org/10.3390/math10193698.

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This paper addresses the issue of optimal redundancy allocation in hybrid structure large binary systems. Two aspects of optimization are considered: (1) maximizing the reliability of the system under the cost constraint, and (2) obtaining the necessary reliability at a minimum cost. The complex binary system considered in this work is composed of many subsystems with redundant structure. To cover most of the cases encountered in practice, the following kinds of redundancy are considered: active redundancy, passive redundancy, hybrid standby redundancy with a hot or warm reserve and possibly o
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Arifeen, Tooba, Abdus Sami Hassan, and Jeong-A. Lee. "Approximate Triple Modular Redundancy: A Survey." IEEE Access 8 (2020): 139851–67. http://dx.doi.org/10.1109/access.2020.3012673.

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Philp, Kenneth W., and Norman D. Deans. "Comparative redundancy, an alternative to triple modular redundant system design." Microelectronics Reliability 37, no. 4 (1997): 581–85. http://dx.doi.org/10.1016/0026-2714(95)00217-0.

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Ammes, Gabriel, Paulo Francisco Butzen, André Inácio Reis, and Renato Perez Ribas. "A Survey of Approximate Triple Modular Redundancy." Journal of Integrated Circuits and Systems 19, no. 3 (2024): 1–14. https://doi.org/10.29292/jics.v19i3.970.

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The advancement of semiconductor technology has driven the continuous reduction in transistor sizes, resulting in significant improvements in both area efficiency and power consumption. However, these advancements have also increased susceptibility to faults caused by energetic particles. Triple modular redundancy (TMR) is a well-known logical masking technique that employs three copies of a given circuit alongside majority voters, guaranteeing 100\% single-fault coverage in the replicated modules. This reliability, however, comes at the cost of over 200\% area overhead. The approximate TMR (A
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Mukherjee, Atin, and Anindya Sundar Dhar. "Triple transistor based triple modular redundancy with embedded voter circuit." Microelectronics Journal 87 (May 2019): 101–9. http://dx.doi.org/10.1016/j.mejo.2019.03.014.

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Efimenko, E. V., and S. S. Fanchenko. "On FPGA SEU Mitigatiom under Irradiation Conditions." Nano- i Mikrosistemnaya Tehnika 25, no. 2 (2023): 78–81. http://dx.doi.org/10.17587/nmst.25.78-81.

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It is shown that in the case of soft errors even redundancy with casual choice for equiprobable configurations is equivalent to odd redundancy with less by one number of elements. The efficiencies of triple and quintuple modular redundancy are estimated.
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Beltrame, Giovanni. "Triple Modular Redundancy verification via heuristic netlist analysis." PeerJ Computer Science 1 (August 26, 2015): e21. http://dx.doi.org/10.7717/peerj-cs.21.

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Li, Yuanqing, Anselm Breitenreiter, Marko Andjelkovic, Junchao Chen, Milan Babic, and Milos Krstic. "Double cell upsets mitigation through triple modular redundancy." Microelectronics Journal 96 (February 2020): 104683. http://dx.doi.org/10.1016/j.mejo.2019.104683.

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Vial, J., A. Virazel, A. Bosio, P. Girard, C. Landrault, and S. Pravossoudovitch. "Is triple modular redundancy suitable for yield improvement?" IET Computers & Digital Techniques 3, no. 6 (2009): 581. http://dx.doi.org/10.1049/iet-cdt.2008.0127.

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Dissertations / Theses on the topic "Triple Modular Redundancy"

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Al-Kofahi, Khalid A. "Reliability analysis of triple modular redundancy system with spare /." Online version of thesis, 1993. http://hdl.handle.net/1850/11565.

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Baldwin, Andrew Lockett. "A Fault-Tolerant Alternative to Lockstep Triple Modular Redundancy." PDXScholar, 2012. https://pdxscholar.library.pdx.edu/open_access_etds/331.

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Semiconductor manufacturing defects adversely affect yield and reliability. Manufacturers expend vast resources to reduce defects within their processes. As the minimum feature size get smaller, defects become increasingly difficult to prevent. Defects can change the behavior of a logic circuit resulting in a fault. Manufacturers and designers may improve yield, reliability, and profitability by using design techniques that make products robust even in the presence of faults. Triple modular redundancy (TMR) is a fault tolerant technique commonly used to mask faults using voting outcomes from t
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Johnson, Jonathan Mark. "Synchronization Voter Insertion Algorithms for FPGA Designs Using Triple Modular Redundancy." Diss., CLICK HERE for online access, 2010. http://contentdm.lib.byu.edu/ETD/image/etd3418.pdf.

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Kakarla, Sujana. "Partial evaluation based triple modular redundancy for single event upset mitigation." [Tampa, Fla.] : University of South Florida, 2005. http://purl.fcla.edu/fcla/etd/SFE0001146.

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Gallagher, William Lynn. "Fault tolerant multipliers and dividers using time shared triple modular redundancy /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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Albandes, Iuri. "Use of Approximate Triple Modular Redundancy for Fault Tolerance in Digital Circuits." Doctoral thesis, Universidad de Alicante, 2018. http://hdl.handle.net/10045/88248.

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La triple redundancia modular (TMR) es una técnica bien conocida de mitigación de fallos que proporciona una alta protección frente a fallos únicos pero con un gran coste en términos de área y consumo de potencia. Por esta razón, la redundancia parcial se suele aplicar para aligerar estos sobrecostes. En este contexto, la TMR aproximada (ATMR), que consisten en la implementación de la redundancia triple con versiones aproximadas del circuito a proteger, ha surgido en los últimos años como una alternativa a la replicación parcial, con la ventaja de obtener mejores soluciones de compromiso entre
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Majewicz, Peter J. "Implementation of a Configurable Fault Tolerant Processor (CFTP) using Internal Triple Modular Redundancy (TMR)." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2005. http://library.nps.navy.mil/uhtbin/hyperion/05Dec%5FMajewicz.pdf.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, December 2005.<br>Thesis Advisor(s): Herschel H Loomis, Jr., Alan A. Ross. Includes bibliographical references (p. 85). Also available online.
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Yuan, Rong. "Triple modular redundancy (TMR) in a configurable fault-tolerant processor (CFTP) for space applications." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2003. http://library.nps.navy.mil/uhtbin/hyperion-image/03Dec%5FYuan.pdf.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, December 2003.<br>Thesis advisor(s): Herschel H. Loomis Jr., Alan A. Ross. Includes bibliographical references (p. 259). Also available online.
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Benites, Luis Alberto Contreras. "Automated design flow for applying triple modular redundancy in complex semi-custom digital integrated circuits." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2018. http://hdl.handle.net/10183/181177.

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Os efeitos de radiação têm sido um dos problemas mais sérios em aplicações militares e espaciais. Mas eles também são uma preocupação crescente em tecnologias modernas, mesmo para aplicações comerciais no nível do solo. A proteção dos circuitos integrados contra os efeitos da radiação podem ser obtidos através do uso de processos de fabricação aprimorados e de estratégias em diferentes estágios do projeto do circuito. A técnica de TMR é bem conhecida e amplamente empregada para mascarar falhas únicas sem detectálas. No entanto, o projeto de circuitos TMR não é automatizado por ferramentas EDA
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Cannon, Matthew Joel. "Improving the Single Event Effect Response of Triple Modular Redundancy on SRAM FPGAs Through Placement and Routing." BYU ScholarsArchive, 2019. https://scholarsarchive.byu.edu/etd/7551.

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Triple modular redundancy (TMR) with repair is commonly used to improve the reliability of systems. TMR is often employed for circuits implemented on field programmable gate arrays (FPGAs) to mitigate the radiation effects of single event upsets (SEUs). This has proven to be an effective technique by improving a circuit's sensitive cross-section by up to 100x. However, testing has shown that the improvement offered by TMR is limited by upsets in single configuration bits that cause TMR to fail.This work proposes a variety of mitigation techniques that improve the effectiveness of TMR on FPGAs.
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Books on the topic "Triple Modular Redundancy"

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Triple Modular Redundancy (TMR) in a Configurable Fault-Tolerant Processor (CFTP) for Space Applications. Storming Media, 2003.

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Book chapters on the topic "Triple Modular Redundancy"

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Hudson, Sharon, R. S. Shyama Sundar, and Srinivas Koppu. "Fault Control Using Triple Modular Redundancy (TMR)." In Advances in Intelligent Systems and Computing. Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-7871-2_45.

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He, Hongjie, Baolong Guo, and Yunyi Yan. "Area Estimation for Triple Modular Redundancy Field Programmable Gate Arrays." In Advances in Intelligent Systems and Computing. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-48499-0_30.

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Anjankar, Shubham C., Ajinkya M. Pund, Rajesh Junghare, and Jitendra Zalke. "Real-Time FPGA-Based Fault Tolerant and Recoverable Technique for Arithmetic Design Using Functional Triple Modular Redundancy (FRTMR)." In Proceedings of the Second International Conference on Computational Intelligence and Informatics. Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-10-8228-3_45.

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Chen, Yukun, Jiangkang Wang, Dezhi Zhang, Gang Rong, and Yanchen Zhao. "Research on Triple-Module Redundancy Computer with Reconfigurable Capacity." In Lecture Notes in Electrical Engineering. Springer Nature Singapore, 2024. http://dx.doi.org/10.1007/978-981-99-7505-1_53.

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Goswami, Kumar K., and Ravishankar K. Iyer. "A Simulation-Based Study of a Triple Modular Redundant System using DEPEND." In Fault-Tolerant Computing Systems. Springer Berlin Heidelberg, 1991. http://dx.doi.org/10.1007/978-3-642-76930-6_25.

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Watanabe, Takahiro, and Minoru Watanabe. "Triple Module Redundancy of a Laser Array Driver Circuit for Optically Reconfigurable Gate Arrays." In Lecture Notes in Computer Science. Springer Berlin Heidelberg, 2012. http://dx.doi.org/10.1007/978-3-642-28365-9_14.

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"Triple Modular Redundancy in Transactional Memory System." In International Conference on Instrumentation, Measurement, Circuits and Systems (ICIMCS 2011). ASME Press, 2011. http://dx.doi.org/10.1115/1.859902.paper284.

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Sundararajan, Gopalakrishnan. "Fault Tolerance in Carbon Nanotube Transistors Based Multi Valued Logic." In Carbon Nanotubes - Redefining the World of Electronics [Working Title]. IntechOpen, 2021. http://dx.doi.org/10.5772/intechopen.95361.

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This Chapter presents a solution for fault-tolerance in Multi-Valued Logic (MVL) circuits comprised of Carbon Nano-Tube Field Effect Transistors (CNTFET). This chapter reviews basic primitives of MVL and describes ternary implementations of CNTFET circuits. Finally, this chapter describes a method for error correction called Restorative Feedback (RFB). The RFB method is a variant of Triple-Modular Redundancy (TMR) that utilizes the fault masking capabilities of the Muller C element to provide added protection against noisy transient faults. Fault tolerant properties of Muller C element is disc
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"1Chapter 1 Assuring Robust Triple Modular Redundancy Protected Circuits in SRAM-Based FPGAs." In Radiation Effects in Semiconductors. CRC Press, 2018. http://dx.doi.org/10.1201/9781315217864-20.

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Kucera, Pavel. "On Analogue TMR System." In Knowledge-Based Intelligent System Advancements. IGI Global, 2011. http://dx.doi.org/10.4018/978-1-61692-811-7.ch002.

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This chapter presents a reliability model of the TMR (Triple Modular Redundancy) system based on analogue measurement channels. While reliability modelling of the standard TMR system (based on digital channels) has been well described in many previous publications, an applicable reliability solution for analogue measurement channels is still missing. First, the structure of analogue measurement channel is described in this chapter. Then, the reliability model of the wiring system is introduced. Next, the standard TMR model is presented and its reliability model is mentioned. An analogue TMR me
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Conference papers on the topic "Triple Modular Redundancy"

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Watanabe, Nobuya, and Minoru Watanabe. "Triple Modular Redundancy Logic Design from High-Level Hardware Description." In 2025 IEEE International Conference on Consumer Electronics (ICCE). IEEE, 2025. https://doi.org/10.1109/icce63647.2025.10930101.

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Schrape, Oliver, Anselm Breitenreiter, Li Lu, et al. "Radiation-Hardening-by-Design Triple Modular Redundancy Flip-Flop with Self-Correction." In 2024 IEEE Nordic Circuits and Systems Conference (NorCAS). IEEE, 2024. http://dx.doi.org/10.1109/norcas64408.2024.10752481.

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Saikawa, Yamato, and Yoichi Tomioka. "Approximated Triple Modular Redundancy of Convolutional Neural Networks Based on Residual Quantization." In 2024 IEEE 17th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC). IEEE, 2024. https://doi.org/10.1109/mcsoc64144.2024.00057.

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Violante, Mauricio. "Radiation Evaluation of a Dual D-Type Flip-Flop with Triple Modular Redundancy." In 2024 RADECS Data Workshop. IEEE, 2024. https://doi.org/10.1109/radecs61975.2024.11017534.

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Sun, Hanwen, Jianxiong Zhang, Darui Hu, Ran Tian, and Xiaobin Jiao. "A flexible and automatic partial triple modular redundancy design based on fault injection simulation result." In Second International Conference on Optoelectronic Information and Optical Engineering (OIOE 2025), edited by Yang Yue, Ming Jiang, and Qingyang Wei. SPIE, 2025. https://doi.org/10.1117/12.3068282.

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Sekioka, Utsuki, Minoru Watanabe, and Nobuya Watanabe. "Radiation-Hardened Triple Modular Redundant Serial Communication System Using Triple Communication Lines." In 2025 IEEE International Conference on Consumer Electronics (ICCE). IEEE, 2025. https://doi.org/10.1109/icce63647.2025.10930157.

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Kiskis, D. l., and K. G. Shin. "Embedding triple-modular redundancy into a hypercube architecture." In the third conference. ACM Press, 1988. http://dx.doi.org/10.1145/62297.62334.

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Reddy, P. Venkata, M. M. Nayak, and K. Rajanna. "MEMS based Pressure Sensor with Triple Modular Redundancy." In 2007 IEEE Sensors. IEEE, 2007. http://dx.doi.org/10.1109/icsens.2007.4388552.

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Lechner, Jakob. "Designing Robust GALS Circuits with Triple Modular Redundancy." In 2012 Ninth European Dependable Computing Conference (EDCC). IEEE, 2012. http://dx.doi.org/10.1109/edcc.2012.25.

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Almeida, Felipe, Levent Aksoy, Jaan Raik, and Samuel Pagliarini. "Side-Channel Attacks on Triple Modular Redundancy Schemes." In 2021 IEEE 30th Asian Test Symposium (ATS). IEEE, 2021. http://dx.doi.org/10.1109/ats52891.2021.00026.

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Reports on the topic "Triple Modular Redundancy"

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Baldwin, Andrew. A Fault-Tolerant Alternative to Lockstep Triple Modular Redundancy. Portland State University Library, 2000. http://dx.doi.org/10.15760/etd.331.

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