Relevant bibliographies by topics / UMOSFET

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'UMOSFET'

Author: Grafiati
Published: 3 June 2025
Last updated: 31 July 2025

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Journal articles on the topic "UMOSFET"

1

Hung, Chia Lung, Yi Kai Hsiao, Chang Ching Tu, and Hao Chung Kuo. "Investigation of 4H-SiC UMOSFET Architectures for High Voltage and High Speed Power Switching Applications." Materials Science Forum 1088 (May 18, 2023): 41–49. http://dx.doi.org/10.4028/p-56sbi2.

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A comparative TCAD (Technology Computer Aided Design) simulation study of various 4H-SiC trench gate MOSFET (Metal Oxide Semiconductor Field Effect Transistor) (or U-shaped trench gate MOSFET abbreviated for UMOSFET) architectures for high voltage and high-speed switching applications is reported. The DC (Direct Current) and AC (Alternating Current) characteristics of the different trench gate structures are investigated. Particularly, compared to conventional 4H-SiC UMOSFETs, the breakdown voltage of the UMOSFET having a p-type implanted bottom shield is increased by 44%. However, due to the
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Jiang, Jheng-Yi, Tian-Li Wu, Feng Zhao, and Chih-Fang Huang. "Numerical Study of 4H-SiC UMOSFETs with Split-Gate and P+ Shielding." Energies 13, no. 5 (2020): 1122. http://dx.doi.org/10.3390/en13051122.

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In this paper, performances of a 4H-SiC UMOSFET with split gate and P+ shielding in different configurations are simulated and compared, with an emphasis on the switching characteristics and short circuit capability. A novel structure with the split gate in touch with the P+ shielding is proposed. The key design issues for 4H-SiC UMOSFETs are trench gate dielectric protection and reverse transfer capacitance Crss reduction. Based on simulation results, it is concluded that a UMOSFET with a gate structure combining split gate grounded to the trench bottom protection P+ shielding layer and a cur
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Cheon, Jinhee, and Kwangsoo Kim. "Numerical Simulation Analysis of Switching Characteristics in the Source-Trench MOSFET’s." Electronics 9, no. 11 (2020): 1895. http://dx.doi.org/10.3390/electronics9111895.

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In this paper, we compare the static and switching characteristics of the 4H-SiC conventional UMOSFET (C-UMOSFET), double trench MOSFET (DT-MOSFET) and source trench MOSFET (ST-MOSFET) through TCAD simulation. In particular, the effect of the trenched source region and the gate trench bottom P+ shielding region on the capacitance is analyzed, and the dynamic characteristics of the three structures are compared. The input capacitance is almost identical in all three structures. On the other hand, the reverse transfer capacitance of DT-MOSFET and ST-MOSFET is reduced by 44% and 24%, respectively
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Borca-Tasciuc, Giorgian, and Tat-Sing Paul Chow. "Comparative Performance Evaluation for GaN Bidirectional, 1.2–10kV, Conventional and Superjunction Current Aperture Vertical Electron Transistors (CAVETs) and UMOSFETs." ECS Meeting Abstracts MA2025-01, no. 35 (2025): 1700. https://doi.org/10.1149/ma2025-01351700mtgabs.

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The performance potentials and limits of bidirectional (BD) GaN current aperture vertical electron transistor (CAVET) and BD GaN UMOSFETs are evaluated for breakdown voltage (BV) ratings ranging from 1.2–10kV. Bidirectionality is achieved by connecting two transistors in either a common-source (CS) or common-drain (CD) configuration. For both CAVETs and UMOSFETs, the drift region design is varied among conventional, doped superjunction (DSJ), and polarized superjunction (PSJ) structures. In the case of CD designs with a conventional drift region, the monolithic approach involves sharing a comm
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Chen, Runze, Lixin Wang, Hongkai Zhang, Mengyao Cui, and Min Guo. "A New Split Gate Resurf Stepped Oxide UMOSFET Structure with High Doped Epitaxial Layer for Improving Figure of Merit (FOM)." Applied Sciences 10, no. 21 (2020): 7895. http://dx.doi.org/10.3390/app10217895.

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The split gate resurf stepped oxide with highly doped epitaxial layer (HDSGRSO) UMOSFET has been proposed. The epitaxial layer of HDSGRSO u-shape metal oxide semiconductor field effect transistor (UMOSFET) has been divided into three parts: the upper epitaxial layer, the lower epitaxial layer and the middle epitaxial layer with higher doping concentration. The research shows that the reduced SURface field (RESURF) active has been enhanced due to the high doped epitaxial layer, which can modulate the electric field distribution and reduce the internal high electric field. Therefore, the HDGRSO
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Chen, Runze, Lixin Wang, Naixia Jiu, Hongkai Zhang, and Min Guo. "Simulation and Result Analysis of Split Gate Resurf Stepped Oxide UMOFSET with Floating Electrode for Improved Performance." Electronics 8, no. 12 (2019): 1553. http://dx.doi.org/10.3390/electronics8121553.

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In this study, a split-gate resurf stepped oxide with a floating electrode (FSGRSO) UMOSFET has been proposed. The source in the trench is divided into two electrodes, namely: the upper electrode and the lower electrode. The upper one is the floating electrode, which redistributes the electric potential vertically, and improves the breakdown voltage and figure of merit (FOM). The breakdown (BV) and FOM of the FSGRSO UMOSFET have been improved up to 27.3% and 62.7%, respectively, compared with the SGRSO UMOSFET, according to the simulation results.
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Chen, Runze, Lixin Wang, Naixia Jiu, Hongkai Zhang, and Min Guo. "An Optimized Structure of Split-Gate Resurf Stepped Oxide UMOSFET." Electronics 9, no. 5 (2020): 745. http://dx.doi.org/10.3390/electronics9050745.

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In this paper, a split-gate resurf stepped oxide with double floating electrodes (DFSGRSO) U-shape metal oxide semiconductor field-effect transistor (UMOSFET) is proposed. The floating electrodes are symmetrically distributed on both sides of the source electrode in the trench. The performance of the DFSGRSO UMOSFET with different size of floating electrodes is simulated and analyzed. The simulation results reveal that the floating electrodes can modulate the distribution of the electric field in the drift area, improving the performance of the device significantly. The breakdown voltage (BV)
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Harada, Shinsuke, Sachiko Ito, Makoto Kato, et al. "Isotropic Channel Mobility in UMOSFETs on 4H-SiC C-Face with Vicinal Off-Angle." Materials Science Forum 645-648 (April 2010): 999–1004. http://dx.doi.org/10.4028/www.scientific.net/msf.645-648.999.

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UMOSFET is theoretically suitable to decrease the on-resistance of the MOSFET. In this study, in order to determine the cell structure of the SiC UMOSFET with extremely low on-resistance, influences of the orientation of the trench and the off-angle of the wafer on the MOS properties are investigated. The channel resistance, gate I-V curves and instability of threshold voltage are superior on the {11-20} planes as compared with other planes. On the vicinal off wafer, influence of the off-angle disappears and the properties on the equivalent planes are almost the same. The obtained results indi
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Alberton, S. G., A. C. V. Bôas, N. H. Medina, et al. "Neutron-Induced Radiation Effects in UMOS Transistor." Journal of Physics: Conference Series 2340, no. 1 (2022): 012046. http://dx.doi.org/10.1088/1742-6596/2340/1/012046.

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Abstract Ground level electronics and avionics systems may suffer from radiation effects induced by neutrons. Neutrons can induce radiation effects in electronic devices via fusion-evaporation nuclear reactions, but few studies have been reported for technologies such as UMOSFET. In this work, estimates and experimental studies on neutron-induced radiation effects via nuclear reactions in a Si-based UMOSFET are presented. Methods for probability estimates of neutron-induced Single-Event Effects (SEEs) in Si-based power transistors and neutron beam energy measurement is presented. The energy sp
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Harada, Shinsuke, Yusuke Kobayashi, A. Kinoshita, et al. "1200 V SiC IE-UMOSFET with Low On-Resistance and High Threshold Voltage." Materials Science Forum 897 (May 2017): 497–500. http://dx.doi.org/10.4028/www.scientific.net/msf.897.497.

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A critical issue with the SiC UMOSFET is the need to develop a shielding structure for the gate oxide at the trench bottom without any increase in the JFET resistance. This study describes our new UMOSFET named IE-UMOSFET, which we developed to cope with this trade-off. A simulation showed that a low on-resistance is accompanied by an extremely low gate oxide field even with a negative gate voltage. The low RonA was sustained as Vth increases. The RonA values at VG=25 V (Eox=3.2 MV/cm) and VG=20V (Eox=2.5 MV/cm), respectively, for the 3mm x 3mm device were 2.4 and 2.8 mWcm2 with a lowest Vth o
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Dissertations / Theses on the topic "UMOSFET"

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Lu, Hsin-Hung, and 呂信宏. "Optimum Design of SiC Pinch-Accumulation UMOSFET." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/58769924891930651784.

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碩士<br>國立清華大學<br>電子工程研究所<br>91<br>Silicon Carbide(SiC) has 2.9 times higher bandgap energy,10 times higher critical breakdown electric field,3.3 times higher thermal conductivity and 2 times higher electron saturation drift velocity compared to silicon. The specific on-resistance in SiC power device at a given breakdown voltage is about 200 times to 400 times lower than in silicon device. The SiC power device can operate at an environment temperature higher than 350℃ and need no expensive cooling equipments, so, it will play an important role in the development of future power device. Because o
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Yen, Hao-Hsiang, and 顏皓祥. "Process and Characterization of 4H-SiC UMOSFET with Thick Bottom Oxide." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/3fs3kh.

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碩士<br>國立交通大學<br>電子研究所<br>107<br>As a wide-bandgap material, SiC has the advantages of high blocking voltage and high thermal conductivity. This is suitable for the applications of high voltage power devices and occupies the market of Si-based power devices. Nevertheless, large amounts of interface traps density of the SiO2/SiC interface decreases the mobility of inversion carriers. Moreover, the trench bottom oxide of the thick bottom oxide UMOSFET (TBOX-UMOSFET) would suffer from the high electric field and lead to oxide breakdown. As a consequence, they are important issues to improve the qu
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Yu, Chia-Jung, and 游嘉榕. "A Study on the Characteristics of 4H-SiC UMOSFETs." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/aw9b45.

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碩士<br>國立交通大學<br>電子研究所<br>106<br>Wide bandgap semiconductors are promising materials to replace Si to implement high-voltage and high current power device operating at high temperature. Among those materials, 4H-SiC is the most promising candidate due to its physical property, such as high critical electric field and high thermal conductivity. However, the low mobility characteristics of 4H-SiC MOSFET results from high interface state density at the SiO2/4H-SiC interface. The charge-pumping method is a reliable technique to directly characterize interface state density in 4H-SiC MOSFET. Additio
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Imam, Syed Sarwar, and Syed Sarwar Imam. "Design and Analysis of a 90V Microwave P-I-N Diode Switches&Design of High performance UMOSFETs for power switching Application." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/86204723793871452601.

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碩士<br>亞洲大學<br>資訊工程學系<br>105<br>A.Design and Analysis of a 90V Microwave P-I-N Diode Switches A PIN diode is very similar to a PN diode (a pn junction), except that an intrinsic layer1, sometimes referred to as the bulk of the diode, is placed in between the p and n type materials. PIN diodes are more commonly used in photo detectors than PN diodes since the intrinsic region presents a larger volume in which photons can produce electron-hole pairs and so the thickness of this region can be adapted to increase quantum efficiency. The thickness of this region also gives them a lower capacitance
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Books on the topic "UMOSFET"

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ill, Buckley Barris, Kuhl Reinhard, Eidam Kerstin, and Sikakane Solomon, eds. Moses, der starke Bergmann =: UMoses uMvukuzi, Onamandla. Ithemba Publishing, 1996.

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Jones, Bronwen. Moses, the mighty miner =: UMoses uMvukuzi, Onamandla. Ithemba Publishing, 1996.

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Linda, Sophia. New Umost 2023 Arabian Diet Cookbook: The Essential Guides with Quick and Easy Recipes for Weight Loss, Rich in Calorie and Healthy Lifestyles. Independently Published, 2022.

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Book chapters on the topic "UMOSFET"

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Yano, Hiroshi, H. Nakao, Tomoaki Hatayama, Yukiharu Uraoka, and Takashi Fuyuki. "Increased Channel Mobility in 4H-SiC UMOSFETs Using On-Axis Substrates." In Materials Science Forum. Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.807.

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Conference papers on the topic "UMOSFET"

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Peyvast, N., and M. Fathipour. "AC analysis of UMOSFET ACCUFET." In 2009 International Semiconductor Device Research Symposium (ISDRS 2009). IEEE, 2009. http://dx.doi.org/10.1109/isdrs.2009.5378265.

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Takenaka, Kensuke, Takeshi Tawara, Syunki Narita, and Shinsuke Harada. "Double-Implanted 4H-SiC Superjunction UMOSFET without Bipolar Degradation." In 2024 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2024. http://dx.doi.org/10.7567/ssdm.2024.d-6-02.

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Goh, Jinyoung, and Kwangsoo Kim. "High Efficiency 1700V 4H-SiC UMOSFET with Local Floating Superjunction." In 2020 International Conference on Electronics, Information, and Communication (ICEIC). IEEE, 2020. http://dx.doi.org/10.1109/iceic49074.2020.9051234.

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Zou, Xian, Zhiming Wu, Weiping Wang, et al. "Optimized design of 4H-SiC UMOSFET for high breakdown voltage." In Conference on Optical Sensing and Imaging Technology, edited by Dong Liu, Xiangang Luo, Yadong Jiang, and Jin Lu. SPIE, 2020. http://dx.doi.org/10.1117/12.2580265.

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Krishnamurthy, Saranya, Ramani Kannan, Fawnizu Azmadi Hussin, and Erman Azwan Yahya. "Enhanced Trench Shielded Power UMOSFET for Single Event Burnout Hardening." In 2019 IEEE Regional Symposium on Micro and Nanoelectronics (RSM). IEEE, 2019. http://dx.doi.org/10.1109/rsm46715.2019.8943495.

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Yuan, Lei, Sicheng Liu, Qingwen Song, et al. "Simultaneous Fabrication of 4H-SiC BJT and UMOSFET on Same Wafer." In 2019 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC). IEEE, 2019. http://dx.doi.org/10.1109/edssc.2019.8754198.

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Bharti, Deepshikha, and Aminul Islam. "Performance improvement in 4H-SiC UMOSFET with HfO2/Al2O3 gate dielectric stack." In 2017 Devices for Integrated Circuit (DevIC). IEEE, 2017. http://dx.doi.org/10.1109/devic.2017.8074064.

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Oraon, Alisha, Shradha Shreya, Renuka Kumari, and Aminul Islam. "A double trench 4H — SiC MOSFET as an enhanced model of SiC UMOSFET." In 2017 7th International Symposium on Embedded Computing and System Design (ISED). IEEE, 2017. http://dx.doi.org/10.1109/ised.2017.8303939.

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Selvendran, Sivaji, Gene Sheu, S. Krishna Sai, et al. "Performance improvement for drain expansion and Quasi Saturation by using Vertical RESURF in UMOSFET." In 2017 International Conference on Applied System Innovation (ICASI). IEEE, 2017. http://dx.doi.org/10.1109/icasi.2017.7988124.

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Kobayashi, Kenya, Atsushi Kaneko, Yoshimitsu Murase, and Hideo Yamamoto. "Sub-micron Cell Pitch 30 V N-channel UMOSFET with Ultra Low On-resistance." In 19th International Symposium on Power Semiconductor Devices and Ics. IEEE, 2007. http://dx.doi.org/10.1109/ispsd.2007.4294968.

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Reports on the topic "UMOSFET"

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Kollman, Robert, Guy Sills, James Yuan, Tsengyou Syau, and Prasad Venkatraman. A Comparison of Silicon UMOSFETs Versus GaAs Vertical FETs For Low Voltage, Synchronous Rectification at 2.5 MHz. Defense Technical Information Center, 1992. http://dx.doi.org/10.21236/ada294524.

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