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Relevant bibliographies by topics / Wafer manufacturing process

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Journal articles

Academic literature on the topic 'Wafer manufacturing process'

Author: Grafiati

Published: 4 June 2021

Last updated: 6 February 2022

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Journal articles on the topic "Wafer manufacturing process"

1

Lee, Seungchul, and Jun Ni. "Genetic Algorithm for Job Scheduling with Maintenance Consideration in Semiconductor Manufacturing Process." Mathematical Problems in Engineering 2012 (2012): 1–16. http://dx.doi.org/10.1155/2012/875641.

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This paper presents wafer sequencing problems considering perceived chamber conditions and maintenance activities in a single cluster tool through the simulation-based optimization method. We develop optimization methods which would lead to the best wafer release policy in the chamber tool to maximize the overall yield of the wafers in semiconductor manufacturing system. Since chamber degradation will jeopardize wafer yields, chamber maintenance is taken into account for the wafer sequence decision-making process. Furthermore, genetic algorithm is modified for solving the scheduling problems i

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2

Hagimoto, Yoshiya, Hayato Iwamoto, Yasushi Honbe, Takuro Fukunaga, and Hitoshi Abe. "Defects of Silicon Substrates Caused by Electro-Static Discharge in Single Wafer Cleaning Process." Solid State Phenomena 145-146 (January 2009): 185–88. http://dx.doi.org/10.4028/www.scientific.net/ssp.145-146.185.

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While batch wafer cleaning processes have been conventionally used in the semiconductor manufacturing for many years, the use of single wafer cleaning processes in the manufacturing has recently become increasingly widespread. Single wafer cleaning processes have the advantages of reducing particle and metal contamination, however, electric charge or electrostatic discharge phenomena occurring in these processes causes serious problems such as device destruction through insulation failure and circuit disconnection [1,2]. Well-known examples are the breakdown of the ultra-thin gate oxide and th

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3

KANNO, Itaru. "Clean Technology Supporting Semiconductor Manufacturing Process. Wafer Cleaning Technology." Journal of the Surface Finishing Society of Japan 50, no. 10 (1999): 861–66. http://dx.doi.org/10.4139/sfj.50.861.

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4

Strothmann, Tom, Damien Pricolo, Seung Wook Yoon, and Yaojian Lin. "A Flexible Manufacturing Method for Wafer Level Packages." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, DPC (2014): 000815–29. http://dx.doi.org/10.4071/2014dpc-tp21.

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The demand for Wafer Level Chip Scale Packages (WLCSP) has experienced tremendous growth due to the surge in demand for advanced mobile products. The increased demand is seen for both 200mm wafers and 300mm wafers, however a significant segment of the market continues to be driven by 200mm designs. The infrastructure capacity supporting 200mm WLCSP has been stressed as a result of the mature status of 200mm technology and the rate of conversion of alternative package formats to WLCSP. This creates a dilemma for WLP service providers because adding 200mm capacity continues to require a signific

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5

Tian, Y. B., Li Bo Zhou, Jun Shimizu, H. Sato, and Ren Ke Kang. "A Novel Single Step Thinning Process for Extremely Thin Si Wafers." Advanced Materials Research 76-78 (June 2009): 434–39. http://dx.doi.org/10.4028/www.scientific.net/amr.76-78.434.

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The demand for extremely-thin Si wafers is expanding. Current manufacturing technologies are meeting great challenges with the continuous decrease in Si wafer thickness. In this study, a novel single step thinning process for extremely thin Si wafers was put forward by use of an integrated cup grinding wheel (ICGW) in which diamond segments and chemo-mechanical grinding (CMG) segments are alternately allocated along the wheel periphery. The basic machining principle and key technologies were introduced in detail. Grinding experiments were performed on 8-in. Si wafers with a developed ICGW to e

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6

Saidin, Mohd Hazmuni, and Norlena Hasnan. "HUMAN ERROR REDUCTION PROGRAM THROUGH CANONICAL ACTION RESEARCH (CAR) IN WAFER FABRICATION MANUFACTURING FACILITY." Journal of Technology and Operations Management 14, Number 1 (2019): 8–18. http://dx.doi.org/10.32890/jtom.14.1.2.

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In a wafer fabrication manufacturing facility, thousands of wafers are being processed daily. To manufacture the product, the wafers need to go thru hundreds of steps according to the technologies required. The cycle time to complete a standard product ranges from few weeks to few months, depends on the complexity of the technologies. Due to the difficulty and the complexity of the product, Computer Integrated Manufacturing system (CIM), is widely used as a manufacturing platform. As such, all the processes, equipment and wafers are fully integrated. Nevertheless, not all processes could be pr

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7

Shelton, Doug. "Advanced Manufacturing Technology for Fan-Out Wafer Level Packaging." International Symposium on Microelectronics 2015, no. 1 (2015): 000251–55. http://dx.doi.org/10.4071/isom-2015-wa34.

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Advanced process technology is required to develop and enable mass production of Fan-Out Wafer-Level Packaging (FOWLP) solutions for high-density 3D and 2.5D packaging. Canon has identified key challenges that must be solved for successful implementation of high-density integration technologies and has developed key technology for Canon Litho Systems to support the most challenging processes. In this paper, Canon will present process optimization results for high-resolution patterning of wafers across large topography as well as solutions that enable litho systems to compensate for FOWLP grid

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8

Hünten, Martin, Daniel Hollstegge, and Fritz Klocke. "Wafer Level Glass Molding." Key Engineering Materials 523-524 (November 2012): 1001–5. http://dx.doi.org/10.4028/www.scientific.net/kem.523-524.1001.

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Manufacturing of micro optical components is approached with many different technologies. In this paper it is presented how the precision glass molding process is enabled to manufacture micro optical components made out of glass. In comparison to the existing glass molding technology the new approach aims for molding entire glass wafers including multiple micro optical components. It is explained which developments in the filed of simulation, mold manufacturing and molding were accomplished in order to enable the precision glass molding on wafer scale.

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9

KIM, Jongwon. "New Wafer Alignment Process Using Multiple Vision Method for Industrial Manufacturing." Electronics 7, no. 3 (2018): 39. http://dx.doi.org/10.3390/electronics7030039.

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10

Tuck-Boon Chan, A. Pant, Lerong Cheng, and P. Gupta. "Design-Dependent Process Monitoring for Wafer Manufacturing and Test Cost Reduction." IEEE Transactions on Semiconductor Manufacturing 25, no. 3 (2012): 447–59. http://dx.doi.org/10.1109/tsm.2012.2196709.

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