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1

Litovski, V. VLSI circuit simulation and optimization. Chapman & Hall, 1997.

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2

Hochet, Bertrand, Antonio J. Acosta, and Manuel J. Bellido, eds. Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2002. http://dx.doi.org/10.1007/3-540-45716-x.

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3

Liu, Hsiao-Hsuan, and Francky Catthoor. Circuit-Technology Co-Optimization of SRAM Design in Advanced CMOS Nodes. Springer Nature Switzerland, 2025. https://doi.org/10.1007/978-3-031-76109-6.

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4

Tlelo-Cuautle, Esteban, Mourad Fakhfakh, and Maria Helena Fino. Performance optimization techniques in analog mixed-signal, and radio-frequency circuit design. Engineering Science Reference, and imprint of IGI Global, 2015.

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5

Kourtev, Ivan S. Timing optimization through clock skew scheduling. Kluwer Academic, 2000.

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6

Paliouras, Vassilis, Johan Vounckx, and Diederik Verkest, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11556930.

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7

Azémard, Nadine, and Lars Svensson, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2007. http://dx.doi.org/10.1007/978-3-540-74442-9.

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8

Ayala, José L., Braulio García-Cámara, Manuel Prieto, Martino Ruggiero, and Gilles Sicard, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation. Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-24154-3.

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9

Ayala, José L., Delong Shang, and Alex Yakovlev, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2013. http://dx.doi.org/10.1007/978-3-642-36157-9.

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10

van Leuken, René, and Gilles Sicard, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation. Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-17752-1.

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11

Monteiro, José, and René van Leuken, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2010. http://dx.doi.org/10.1007/978-3-642-11802-9.

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12

Svensson, Lars, and José Monteiro, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2009. http://dx.doi.org/10.1007/978-3-540-95948-9.

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13

Macii, Enrico, Vassilis Paliouras, and Odysseas Koufopavlou, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2004. http://dx.doi.org/10.1007/b100662.

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14

Vounckx, Johan, Nadine Azemard, and Philippe Maurine, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2006. http://dx.doi.org/10.1007/11847083.

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15

Chico, Jorge Juan, and Enrico Macii, eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. Springer Berlin Heidelberg, 2003. http://dx.doi.org/10.1007/b12033.

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16

Bing, Lu. Layout optimizations in VLSI designs. Kluwer Academic Publishers, 2001.

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17

Lounsbury, David Michael. Optimization of the Kidd Creek Mine primary grinding circuit and subsequent model development. Laurentian University, School of Engineering, 1995.

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18

1953-, Villa Tiziano, ed. Synthesis of finite state machines: Logic optimization. Kluwer Academic, 1997.

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19

Chang, Jui-ming. Power optimization and synthesis at behavioral and system levels using formal methods. Kluwer, 1999.

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20

Chang, Jui-ming. Power optimization and synthesis at behavioral and system levels using formal methods. Kluwer, 1999.

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21

D, Wilson Jeffrey, and United States. National Aeronautics and Space Administration., eds. Novel high-gain, improved-bandwidth, finned-ladder V-band traveling-wave tube slow-wave circuit design. National Aeronautics and Space Administration, 1995.

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22

D, Wilson Jeffrey, and United States. National Aeronautics and Space Administration., eds. Novel high-gain, improved-bandwidth, finned-ladder V-band traveling-wave tube slow-wave circuit design. National Aeronautics and Space Administration, 1995.

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23

D, Wilson Jeffrey, and United States. National Aeronautics and Space Administration., eds. Novel high-gain, improved-bandwidth, finned-ladder V-band traveling-wave tube slow-wave circuit design. National Aeronautics and Space Administration, 1995.

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24

D, Wilson Jeffrey, and United States. National Aeronautics and Space Administration., eds. Novel high-gain, improved-bandwidth, finned-ladder V-band traveling-wave tube slow-wave circuit design. National Aeronautics and Space Administration, 1995.

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25

D, Wilson Jeffrey, and United States. National Aeronautics and Space Administration., eds. Novel high-gain, improved-bandwidth, finned-ladder V-band traveling-wave tube slow-wave circuit design. National Aeronautics and Space Administration, 1995.

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26

Drechsler, Rolf. Towards One-Pass Synthesis. Springer US, 2002.

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27

1961-, Hochet Bertrand, Acosta Antonio J. 1966-, and Bellido Manuel J. 1964-, eds. Integrated circuit design: Power and timing modeling, optimization and simulation ; 12th international workshop, PATMOS 2002, Seville, Spain, September 11-13, 2002 ; proceedings. Springer, 2002.

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28

1964-, Soudris Dimitrios, Pirsch P, and Barke Erich 1946-, eds. Integrated circuit design: Power and timing modeling, optimization, and simulation : 10th International Workshop, PATMOS 2000, Göttingen, Germany, September 13-15, 2000 : proceedings. Springer, 2000.

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29

Vassilis, Paliouras, Vounckx Johan, and Verkest Diederik, eds. Integrated circuit and system design: Power and timing modeling, optimization and simulation : 15th international workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005 : proceedings. Springer, 2005.

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30

PATMOS 2004 (2004 Santorini, Greece). Integrated circuit and system design: Power and timing modeling, optimization and simulation : 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004 : proceedings. Springer, 2004.

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31

PATMOS 2004 (14th 2004 Santorini, Greece). Integrated circuit and system design: Power and timing modeling, optimization and simulation : 14th International Workshop, PATMOS 2004, Santorinim, Greece, September 15-17, 2004 : proceedings. Springer, 2004.

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32

1963-, Azemard Nadine, and Svensson Lars, eds. Integrated circuit and system design: Power and timing modeling, optimization and simulation ; 17th international workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007 ; proceedings. Springer, 2007.

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33

Jorge, Juan Chico, and Macii Enrico, eds. Integrated circuit and system design: Power and timing modeling, optimization and simulation : 13th International Workshop, PATMOS 2003, Turin, Italy, September 10-12, 2003 : proceedings. Springer, 2003.

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34

Braulio, García-Cámara, Prieto Manuel, Ruggiero Martino, Sicard Gilles, and SpringerLink (Online service), eds. Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation: 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings. Springer-Verlag GmbH Berlin Heidelberg, 2011.

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35

Johan, Vounckx, Maurine Philippe, and Azemard Nadine 1963-, eds. Integrated circuit and system design: Power and timing modeling, optimization and simulation : 16th international workshop, PATMOS 2006, Montpellier, France, September 13-15, 2006 : proceedings. Springer, 2006.

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36

PATMOS 2009 (2009 Delft, Netherlands). Integrated circuit and system design: Power and timing modeling, optimization and simulation : 19th international workshop, PATMOS 2009, Delft, the Netherlands, September 9-11, 2009 : revised selected papers. Springer, 2010.

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37

Leuken, René Van. Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation: 20th International Workshop, PATMOS 2010, Grenoble, France, September 7-10, 2010, Revised Selected Papers. Springer Berlin Heidelberg, 2011.

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38

David, Hutchison. Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation: 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers. Springer Berlin Heidelberg, 2009.

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39

Heidelberg Colloquium on Glassy Dynamics (1986). Heidelberg Colloquium on Glassy Dynamics: Proceedings of a colloquium on spin glasses, optimization and neural networks held at the University of Heidelberg, June 9-13, 1986. Springer-Verlag, 1987.

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40

Melikyan, Vazgen. Simulation and Optimization of Digital Circuits. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-71637-4.

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41

Micheli, G. De. Synthesis and optimization of digital circuits. McGraw-Hill, 1994.

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42

Maheshwari, Naresh. Timing Analysis and Optimization of Sequential Circuits. Springer US, 1999.

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43

Maheshwari, Naresh, and Sachin S. Sapatnekar. Timing Analysis and Optimization of Sequential Circuits. Springer US, 1999. http://dx.doi.org/10.1007/978-1-4615-5637-4.

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44

Zhang, J. C., and M. A. Styblinski. Yield and Variability Optimization of Integrated Circuits. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4615-2225-6.

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45

Antreich, Kurt, Roland Bulirsch, Albert Gilg, and Peter Rentrop, eds. Modeling, Simulation, and Optimization of Integrated Circuits. Birkhäuser Basel, 2003. http://dx.doi.org/10.1007/978-3-0348-8065-7.

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46

Zhang, J. C. Yield and Variability Optimization of Integrated Circuits. Springer US, 1995.

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47

Trimberger, Stephen. Automated performance optimization of custom integrated circuits. UMI Research Press, 1986.

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48

Zhang, J. C. Yield and variability optimization of integrated circuits. Kluwer Academic Publishers, 1995.

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49

Maheshwari, Naresh. Timing analysis and optimization of sequential circuits. Kluwer Academic, 1999.

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50

Litovski, V., and M. Zwolinski. VLSI Circuit Simulation and Optimization. Springer, 1996.

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